From: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com>
Instead of passing in the target engine, pass in the target engine class.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com>
---
src/gen6_mfc.c | 6 ++++--
src/gen6_mfd.c | 3 ++-
src/gen75_mfc.c | 6 ++++--
src/gen75_mfd.c | 3 ++-
src/gen75_vpp_gpe.c | 3 ++-
src/gen75_vpp_vebox.c | 3 ++-
src/gen7_mfd.c | 3 ++-
src/gen8_mfc.c | 10 ++++++++--
src/gen8_mfd.c | 5 ++++-
src/gen9_hevc_encoder.c | 2 +-
src/gen9_mfc_hevc.c | 5 ++++-
src/gen9_mfd.c | 3 ++-
src/i965_avc_encoder.c | 2 +-
src/i965_drv_video.c | 8 ++++++--
src/i965_encoder.c | 3 ++-
src/i965_media.c | 3 ++-
src/i965_post_processing.c | 3 ++-
src/intel_batchbuffer.c | 26 ++++++++++++++++++--------
src/intel_batchbuffer.h | 5 ++++-
19 files changed, 72 insertions(+), 30 deletions(-)
diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index c79053d17868..2ed6b4d3ab89 100644
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -620,8 +620,10 @@ gen6_mfc_init(VADriverContextP ctx,
if (mfc_context->aux_batchbuffer)
intel_batchbuffer_free(mfc_context->aux_batchbuffer);
- mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel,
I915_EXEC_BSD,
- slice_batchbuffer_size);
+ mfc_context->aux_batchbuffer =
+ intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_VIDEO,
+ slice_batchbuffer_size);
mfc_context->aux_batchbuffer_surface.bo =
mfc_context->aux_batchbuffer->buffer;
dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo);
mfc_context->aux_batchbuffer_surface.pitch = 16;
diff --git a/src/gen6_mfd.c b/src/gen6_mfd.c
index bcc455be1935..69f9a1f98acf 100644
--- a/src/gen6_mfd.c
+++ b/src/gen6_mfd.c
@@ -1896,7 +1896,8 @@ gen6_dec_hw_context_init(VADriverContextP ctx, struct object_config
*obj_config)
gen6_mfd_context->base.destroy = gen6_mfd_context_destroy;
gen6_mfd_context->base.run = gen6_mfd_decode_picture;
- gen6_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ gen6_mfd_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_RENDER, 0);
for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) {
gen6_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID;
diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c
index aa291d540683..faa638bd1f41 100644
--- a/src/gen75_mfc.c
+++ b/src/gen75_mfc.c
@@ -512,8 +512,10 @@ static void gen75_mfc_init(VADriverContextP ctx,
if (mfc_context->aux_batchbuffer)
intel_batchbuffer_free(mfc_context->aux_batchbuffer);
- mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel,
I915_EXEC_BSD,
- slice_batchbuffer_size);
+ mfc_context->aux_batchbuffer =
+ intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_VIDEO,
+ slice_batchbuffer_size);
mfc_context->aux_batchbuffer_surface.bo =
mfc_context->aux_batchbuffer->buffer;
dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo);
mfc_context->aux_batchbuffer_surface.pitch = 16;
diff --git a/src/gen75_mfd.c b/src/gen75_mfd.c
index 08855a0b8da5..71943632565b 100644
--- a/src/gen75_mfd.c
+++ b/src/gen75_mfd.c
@@ -3276,7 +3276,8 @@ gen75_dec_hw_context_init(VADriverContextP ctx, struct object_config
*obj_config
assert(gen7_mfd_context);
gen7_mfd_context->base.destroy = gen75_mfd_context_destroy;
gen7_mfd_context->base.run = gen75_mfd_decode_picture;
- gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ gen7_mfd_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_RENDER, 0);
for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) {
gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID;
diff --git a/src/gen75_vpp_gpe.c b/src/gen75_vpp_gpe.c
index ad893e83fb6c..c57a1741238a 100644
--- a/src/gen75_vpp_gpe.c
+++ b/src/gen75_vpp_gpe.c
@@ -858,7 +858,8 @@ vpp_gpe_context_init(VADriverContextP ctx)
vpp_gpe_ctx->surface_tmp = VA_INVALID_ID;
vpp_gpe_ctx->surface_tmp_object = NULL;
- vpp_gpe_ctx->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER,
0);
+ vpp_gpe_ctx->batch =
+ intel_batchbuffer_new(&i965->intel, I915_ENGINE_CLASS_RENDER, 0);
vpp_gpe_ctx->is_first_frame = 1;
gpe_ctx->vfe_state.max_num_threads = 60 - 1;
diff --git a/src/gen75_vpp_vebox.c b/src/gen75_vpp_vebox.c
index 9b33e36b8c4c..4f3e3cf40d28 100644
--- a/src/gen75_vpp_vebox.c
+++ b/src/gen75_vpp_vebox.c
@@ -1832,7 +1832,8 @@ struct intel_vebox_context *
gen75_vebox_context_init(VADriverContextP ctx)
int i;
assert(proc_context);
- proc_context->batch = intel_batchbuffer_new(intel, I915_EXEC_VEBOX, 0);
+ proc_context->batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
for (i = 0; i < ARRAY_ELEMS(proc_context->frame_store); i++)
proc_context->frame_store[i].surface_id = VA_INVALID_ID;
diff --git a/src/gen7_mfd.c b/src/gen7_mfd.c
index 1e6911e2ab0f..5ed9029f0ae1 100644
--- a/src/gen7_mfd.c
+++ b/src/gen7_mfd.c
@@ -2756,7 +2756,8 @@ gen7_dec_hw_context_init(VADriverContextP ctx, struct object_config
*obj_config)
assert(gen7_mfd_context);
gen7_mfd_context->base.destroy = gen7_mfd_context_destroy;
gen7_mfd_context->base.run = gen7_mfd_decode_picture;
- gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ gen7_mfd_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_RENDER, 0);
for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) {
gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID;
diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c
index b62e71f618ed..6d4926ac2096 100644
--- a/src/gen8_mfc.c
+++ b/src/gen8_mfc.c
@@ -625,7 +625,10 @@ static void gen8_mfc_init(VADriverContextP ctx,
if (mfc_context->aux_batchbuffer)
intel_batchbuffer_free(mfc_context->aux_batchbuffer);
- mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel,
I915_EXEC_BSD, slice_batchbuffer_size);
+ mfc_context->aux_batchbuffer =
+ intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_VIDEO,
+ slice_batchbuffer_size);
mfc_context->aux_batchbuffer_surface.bo =
mfc_context->aux_batchbuffer->buffer;
dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo);
mfc_context->aux_batchbuffer_surface.pitch = 16;
@@ -3707,7 +3710,10 @@ static void gen8_mfc_vp8_init(VADriverContextP ctx,
mfc_context->aux_batchbuffer = NULL;
}
- mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel,
I915_EXEC_BSD, slice_batchbuffer_size);
+ mfc_context->aux_batchbuffer =
+ intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_VIDEO,
+ slice_batchbuffer_size);
mfc_context->aux_batchbuffer_surface.bo =
mfc_context->aux_batchbuffer->buffer;
dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo);
mfc_context->aux_batchbuffer_surface.pitch = 16;
diff --git a/src/gen8_mfd.c b/src/gen8_mfd.c
index 78719b2f5967..c693b9ad3c68 100644
--- a/src/gen8_mfd.c
+++ b/src/gen8_mfd.c
@@ -3217,7 +3217,10 @@ gen8_dec_hw_context_init(VADriverContextP ctx, struct object_config
*obj_config)
gen7_mfd_context->base.destroy = gen8_mfd_context_destroy;
gen7_mfd_context->base.run = gen8_mfd_decode_picture;
- gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ gen7_mfd_context->base.batch =
+ intel_batchbuffer_new(intel,
+ I915_ENGINE_CLASS_RENDER,
+ 0);
for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) {
gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID;
diff --git a/src/gen9_hevc_encoder.c b/src/gen9_hevc_encoder.c
index 80d9d9c1aee9..9a72722c1b9f 100644
--- a/src/gen9_hevc_encoder.c
+++ b/src/gen9_hevc_encoder.c
@@ -7062,7 +7062,7 @@ gen9_hevc_pak_pipeline_prepare(VADriverContextP ctx,
intel_batchbuffer_free(priv_ctx->res_pak_slice_batch_buffer);
priv_ctx->res_pak_slice_batch_buffer =
- intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD,
+ intel_batchbuffer_new(&i965->intel, I915_ENGINE_CLASS_VIDEO,
GEN9_HEVC_ENC_PAK_SLICE_STATE_SIZE *
encode_state->num_slice_params_ext);
if (!priv_ctx->res_pak_slice_batch_buffer)
diff --git a/src/gen9_mfc_hevc.c b/src/gen9_mfc_hevc.c
index 53556442e00f..6d64f5293e3c 100644
--- a/src/gen9_mfc_hevc.c
+++ b/src/gen9_mfc_hevc.c
@@ -1064,7 +1064,10 @@ static void gen9_hcpe_init(VADriverContextP ctx,
if (mfc_context->aux_batchbuffer)
intel_batchbuffer_free(mfc_context->aux_batchbuffer);
- mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel,
I915_EXEC_BSD, slice_batchbuffer_size);
+ mfc_context->aux_batchbuffer =
+ intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_VIDEO,
+ slice_batchbuffer_size);
mfc_context->aux_batchbuffer_surface.bo =
mfc_context->aux_batchbuffer->buffer;
dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo);
mfc_context->aux_batchbuffer_surface.pitch = 16;
diff --git a/src/gen9_mfd.c b/src/gen9_mfd.c
index 2490b217a3c7..3a79e0c90272 100644
--- a/src/gen9_mfd.c
+++ b/src/gen9_mfd.c
@@ -1905,7 +1905,8 @@ gen9_hcpd_context_init(VADriverContextP ctx, struct object_config
*object_config
gen9_hcpd_context->base.destroy = gen9_hcpd_context_destroy;
gen9_hcpd_context->base.run = gen9_hcpd_decode_picture;
- gen9_hcpd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_VEBOX, 0);
+ gen9_hcpd_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) {
gen9_hcpd_context->reference_surfaces[i].surface_id = VA_INVALID_ID;
diff --git a/src/i965_avc_encoder.c b/src/i965_avc_encoder.c
index 692f3c162706..21fedb845682 100644
--- a/src/i965_avc_encoder.c
+++ b/src/i965_avc_encoder.c
@@ -9472,7 +9472,7 @@ gen9_avc_pak_pipeline_prepare(VADriverContextP ctx,
}
avc_ctx->pres_slice_batch_buffer_2nd_level =
- intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD,
+ intel_batchbuffer_new(&i965->intel, I915_ENGINE_CLASS_VIDEO,
4096 *
encode_state->num_slice_params_ext);
if (!avc_ctx->pres_slice_batch_buffer_2nd_level)
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index 02f489571fba..cfa066349255 100644
--- a/src/i965_drv_video.c
+++ b/src/i965_drv_video.c
@@ -6721,8 +6721,12 @@ i965_driver_data_init(VADriverContextP ctx)
SUBPIC_ID_OFFSET))
goto err_subpic_heap;
- i965->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER, 0);
- i965->pp_batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER, 0);
+ i965->batch = intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_RENDER,
+ 0);
+ i965->pp_batch = intel_batchbuffer_new(&i965->intel,
+ I915_ENGINE_CLASS_RENDER,
+ 0);
_i965InitMutex(&i965->render_mutex);
_i965InitMutex(&i965->pp_mutex);
diff --git a/src/i965_encoder.c b/src/i965_encoder.c
index 4c2fc037fcb1..4d6da8a93956 100644
--- a/src/i965_encoder.c
+++ b/src/i965_encoder.c
@@ -1448,7 +1448,8 @@ intel_enc_hw_context_init(VADriverContextP ctx,
encoder_context->base.destroy = intel_encoder_context_destroy;
encoder_context->base.run = intel_encoder_end_picture;
encoder_context->base.get_status = intel_encoder_get_status;
- encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ encoder_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_RENDER, 0);
encoder_context->input_yuv_surface = VA_INVALID_SURFACE;
encoder_context->is_tmp_id = 0;
encoder_context->low_power_mode = 0;
diff --git a/src/i965_media.c b/src/i965_media.c
index 8f2875617e11..e103de15f35a 100644
--- a/src/i965_media.c
+++ b/src/i965_media.c
@@ -341,7 +341,8 @@ g4x_dec_hw_context_init(VADriverContextP ctx, struct object_config
*obj_config)
assert(media_context);
media_context->base.destroy = i965_media_context_destroy;
media_context->base.run = i965_media_decode_picture;
- media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ media_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_RENDER, 0);
switch (obj_config->profile) {
case VAProfileMPEG2Simple:
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 9d902fb036cf..64eec9aae1fa 100644
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -6336,7 +6336,8 @@ i965_proc_context_init(VADriverContextP ctx, struct object_config
*obj_config)
proc_context->base.destroy = i965_proc_context_destroy;
proc_context->base.run = i965_proc_picture;
- proc_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0);
+ proc_context->base.batch =
+ intel_batchbuffer_new(intel, I915_ENGINE_CLASS_RENDER, 0);
proc_context->driver_context = ctx;
i965->codec_info->post_processing_context_init(ctx,
&proc_context->pp_context, proc_context->base.batch);
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index e7d038079e5f..1815632325a8 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -75,16 +75,26 @@ intel_batchbuffer_space(struct intel_batchbuffer *batch)
struct intel_batchbuffer *
-intel_batchbuffer_new(struct intel_driver_data *intel, int flag, int buffer_size)
+intel_batchbuffer_new(struct intel_driver_data *intel,
+ enum drm_i915_gem_engine_class class,
+ int buffer_size)
{
struct intel_batchbuffer *batch = calloc(1, sizeof(*batch));
int ring_flag;
- ring_flag = flag & I915_EXEC_RING_MASK;
- assert(ring_flag == I915_EXEC_RENDER ||
- ring_flag == I915_EXEC_BSD ||
- ring_flag == I915_EXEC_BLT ||
- ring_flag == I915_EXEC_VEBOX);
+ switch (class) {
+ case I915_ENGINE_CLASS_RENDER:
+ ring_flag = I915_EXEC_RENDER;
+ break;
+ case I915_ENGINE_CLASS_VIDEO:
+ ring_flag = I915_EXEC_BSD;
+ break;
+ case I915_ENGINE_CLASS_VIDEO_ENHANCE:
+ ring_flag = I915_EXEC_VEBOX;
+ break;
+ default:
+ assert(0);
+ }
if (!buffer_size || buffer_size < BATCH_SIZE) {
buffer_size = BATCH_SIZE;
@@ -97,13 +107,13 @@ intel_batchbuffer_new(struct intel_driver_data *intel, int flag, int
buffer_size
assert(batch);
batch->intel = intel;
- batch->flag = flag;
+ batch->flag = ring_flag;
batch->run = drm_intel_bo_mrb_exec;
if (intel->ctx)
batch->run_ctx = drm_intel_gem_bo_context_exec;
if (IS_GEN6(intel->device_info) &&
- flag == I915_EXEC_RENDER)
+ class == I915_ENGINE_CLASS_RENDER)
batch->wa_render_bo = dri_bo_alloc(intel->bufmgr,
"wa scratch",
4096,
diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h
index a4a3ed27fd45..51664006537a 100644
--- a/src/intel_batchbuffer.h
+++ b/src/intel_batchbuffer.h
@@ -30,7 +30,10 @@ struct intel_batchbuffer {
dri_bo *wa_render_bo;
};
-struct intel_batchbuffer *intel_batchbuffer_new(struct intel_driver_data *intel, int
flag, int buffer_size);
+struct intel_batchbuffer *
+intel_batchbuffer_new(struct intel_driver_data *intel,
+ enum drm_i915_gem_engine_class class,
+ int buffer_size);
void intel_batchbuffer_free(struct intel_batchbuffer *batch);
void intel_batchbuffer_start_atomic(struct intel_batchbuffer *batch, unsigned int size);
void intel_batchbuffer_start_atomic_bcs(struct intel_batchbuffer *batch, unsigned int
size);
--
2.14.1