[linux-next:master 1703/5794] arceb-elf-ld: stack.c:undefined reference to `init_net'
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
commit: f54ec58fee837ec847cb8b50593e81bfaa46107f [1703/5794] wimax: move out to staging
config: arc-randconfig-r011-20201113 (attached as .config)
compiler: arceb-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi...
git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
git fetch --no-tags linux-next master
git checkout f54ec58fee837ec847cb8b50593e81bfaa46107f
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Note: the linux-next/master HEAD 92edc4aef86780a8ad01b092c6d6630bb3cb423d builds fine.
It may have been fixed somewhere.
All errors (new ones prefixed by >>):
arceb-elf-ld: drivers/staging/wimax/stack.o: in function `wimax_gnl_re_state_change_send':
stack.c:(.text+0xf2): undefined reference to `init_net'
>> arceb-elf-ld: stack.c:(.text+0xf2): undefined reference to `init_net'
>> arceb-elf-ld: stack.c:(.text+0x108): undefined reference to `netlink_broadcast'
>> arceb-elf-ld: stack.c:(.text+0x108): undefined reference to `netlink_broadcast'
arceb-elf-ld: drivers/staging/wimax/stack.o: in function `wimax_gnl_re_state_change_alloc.constprop.0':
stack.c:(.text+0x1e4): undefined reference to `__alloc_skb'
>> arceb-elf-ld: stack.c:(.text+0x1e4): undefined reference to `__alloc_skb'
>> arceb-elf-ld: stack.c:(.text+0x212): undefined reference to `genlmsg_put'
>> arceb-elf-ld: stack.c:(.text+0x212): undefined reference to `genlmsg_put'
>> arceb-elf-ld: stack.c:(.text+0x238): undefined reference to `nla_put'
>> arceb-elf-ld: stack.c:(.text+0x238): undefined reference to `nla_put'
arceb-elf-ld: stack.c:(.text+0x25a): undefined reference to `nla_put'
arceb-elf-ld: stack.c:(.text+0x25a): undefined reference to `nla_put'
arceb-elf-ld: stack.c:(.text+0x288): undefined reference to `nla_put'
arceb-elf-ld: drivers/staging/wimax/stack.o:stack.c:(.text+0x288): more undefined references to `nla_put' follow
arceb-elf-ld: drivers/staging/wimax/stack.o: in function `wimax_gnl_re_state_change_alloc.constprop.0':
>> stack.c:(.text+0x2fe): undefined reference to `kfree_skb'
>> arceb-elf-ld: stack.c:(.text+0x2fe): undefined reference to `kfree_skb'
arceb-elf-ld: drivers/staging/wimax/stack.o: in function `__wimax_state_change':
stack.c:(.text+0x4f2): undefined reference to `netif_carrier_off'
>> arceb-elf-ld: stack.c:(.text+0x4f2): undefined reference to `netif_carrier_off'
>> arceb-elf-ld: stack.c:(.text+0x528): undefined reference to `netif_carrier_on'
>> arceb-elf-ld: stack.c:(.text+0x528): undefined reference to `netif_carrier_on'
>> arceb-elf-ld: stack.c:(.text+0x532): undefined reference to `netif_tx_wake_queue'
>> arceb-elf-ld: stack.c:(.text+0x532): undefined reference to `netif_tx_wake_queue'
arceb-elf-ld: drivers/staging/wimax/stack.o: in function `wimax_subsys_init':
stack.c:(.init.text+0x50): undefined reference to `genl_register_family'
>> arceb-elf-ld: stack.c:(.init.text+0x50): undefined reference to `genl_register_family'
arceb-elf-ld: lib/stackdepot.o: in function `filter_irq_stacks':
stackdepot.c:(.text+0x332): undefined reference to `__irqentry_text_start'
arceb-elf-ld: stackdepot.c:(.text+0x332): undefined reference to `__irqentry_text_start'
arceb-elf-ld: stackdepot.c:(.text+0x33a): undefined reference to `__irqentry_text_end'
arceb-elf-ld: stackdepot.c:(.text+0x33a): undefined reference to `__irqentry_text_end'
arceb-elf-ld: stackdepot.c:(.text+0x342): undefined reference to `__softirqentry_text_start'
arceb-elf-ld: stackdepot.c:(.text+0x342): undefined reference to `__softirqentry_text_start'
arceb-elf-ld: stackdepot.c:(.text+0x34a): undefined reference to `__softirqentry_text_end'
arceb-elf-ld: stackdepot.c:(.text+0x34a): undefined reference to `__softirqentry_text_end'
arceb-elf-ld: drivers/staging/wimax/op-msg.o: in function `wimax_msg_alloc':
op-msg.c:(.text+0x9e): undefined reference to `__alloc_skb'
>> arceb-elf-ld: op-msg.c:(.text+0x9e): undefined reference to `__alloc_skb'
>> arceb-elf-ld: op-msg.c:(.text+0xba): undefined reference to `genlmsg_put'
>> arceb-elf-ld: op-msg.c:(.text+0xba): undefined reference to `genlmsg_put'
>> arceb-elf-ld: op-msg.c:(.text+0xe4): undefined reference to `nla_put'
arceb-elf-ld: op-msg.c:(.text+0xe4): undefined reference to `nla_put'
arceb-elf-ld: op-msg.c:(.text+0x108): undefined reference to `nla_put'
arceb-elf-ld: op-msg.c:(.text+0x108): undefined reference to `nla_put'
arceb-elf-ld: op-msg.c:(.text+0x12a): undefined reference to `nla_put'
arceb-elf-ld: drivers/staging/wimax/op-msg.o:op-msg.c:(.text+0x12a): more undefined references to `nla_put' follow
arceb-elf-ld: drivers/staging/wimax/op-msg.o: in function `wimax_msg_alloc':
op-msg.c:(.text+0x162): undefined reference to `kfree_skb'
arceb-elf-ld: op-msg.c:(.text+0x162): undefined reference to `kfree_skb'
arceb-elf-ld: drivers/staging/wimax/op-msg.o: in function `wimax_msg_data_len':
op-msg.c:(.text+0x188): undefined reference to `nla_find'
arceb-elf-ld: op-msg.c:(.text+0x188): undefined reference to `nla_find'
arceb-elf-ld: drivers/staging/wimax/op-msg.o: in function `wimax_msg_data':
op-msg.c:(.text+0x1c8): undefined reference to `nla_find'
arceb-elf-ld: op-msg.c:(.text+0x1c8): undefined reference to `nla_find'
arceb-elf-ld: drivers/staging/wimax/op-msg.o: in function `wimax_msg_len':
op-msg.c:(.text+0x1fc): undefined reference to `nla_find'
arceb-elf-ld: drivers/staging/wimax/op-msg.o:op-msg.c:(.text+0x1fc): more undefined references to `nla_find' follow
arceb-elf-ld: drivers/staging/wimax/op-msg.o: in function `wimax_msg_send':
op-msg.c:(.text+0x2e6): undefined reference to `init_net'
arceb-elf-ld: op-msg.c:(.text+0x2e6): undefined reference to `init_net'
arceb-elf-ld: op-msg.c:(.text+0x2fc): undefined reference to `netlink_broadcast'
arceb-elf-ld: op-msg.c:(.text+0x2fc): undefined reference to `netlink_broadcast'
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0
[morse:mpam/resctrl_merge_cdp/v1 16/24] arch/x86/kernel/cpu/resctrl/rdtgroup.c:2022:5: warning: no previous prototype for 'resctrl_arch_set_cdp_enabled'
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git mpam/resctrl_merge_cdp/v1
head: e0c1639ccf91b5ccc7aeb559fcf403c60309d895
commit: fcba0fa2171682e1b8cf6a1cfdddc0c5e68c322a [16/24] x86/resctrl: Add a helper to read/set the CDP configuration
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git/commit/?i...
git remote add morse https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git
git fetch --no-tags morse mpam/resctrl_merge_cdp/v1
git checkout fcba0fa2171682e1b8cf6a1cfdddc0c5e68c322a
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
arch/x86/kernel/cpu/resctrl/rdtgroup.c: In function 'rdt_last_cmd_printf':
arch/x86/kernel/cpu/resctrl/rdtgroup.c:77:2: warning: function 'rdt_last_cmd_printf' might be a candidate for 'gnu_printf' format attribute [-Wsuggest-attribute=format]
77 | seq_buf_vprintf(&last_cmd_status, fmt, ap);
| ^~~~~~~~~~~~~~~
arch/x86/kernel/cpu/resctrl/rdtgroup.c: At top level:
>> arch/x86/kernel/cpu/resctrl/rdtgroup.c:2022:5: warning: no previous prototype for 'resctrl_arch_set_cdp_enabled' [-Wmissing-prototypes]
2022 | int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +/resctrl_arch_set_cdp_enabled +2022 arch/x86/kernel/cpu/resctrl/rdtgroup.c
2021
> 2022 int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable)
2023 {
2024 struct rdt_hw_resource *hw_res = &rdt_resources_all[l];
2025 enum resctrl_res_level code_type, data_type;
2026
2027 if (!hw_res->cdp_capable)
2028 return -EINVAL;
2029
2030 if (l == RDT_RESOURCE_L3) {
2031 code_type = RDT_RESOURCE_L3CODE;
2032 data_type = RDT_RESOURCE_L3DATA;
2033 } else if (l == RDT_RESOURCE_L2) {
2034 code_type = RDT_RESOURCE_L2CODE;
2035 data_type = RDT_RESOURCE_L2DATA;
2036 } else {
2037 return -EINVAL;
2038 }
2039
2040 if (enable)
2041 return cdp_enable(l, data_type, code_type);
2042
2043 cdp_disable(l, data_type, code_type);
2044
2045 return 0;
2046 }
2047
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0
[linux-next:master 4603/5468] drivers/net/ethernet/microchip/lan743x_main.c:1049 lan743x_phy_open() error: uninitialized symbol 'phydev'.
by Dan Carpenter
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: a60b1e1fe9ca5f9d9a79e89a8d71228a8e04d35c
commit: 902a66e08ceaadb9a7a1ab3a4f3af611cd1d8cba [4603/5468] lan743x: correctly handle chips with internal PHY
config: x86_64-randconfig-m001-20201111 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
smatch warnings:
drivers/net/ethernet/microchip/lan743x_main.c:1049 lan743x_phy_open() error: uninitialized symbol 'phydev'.
vim +/phydev +1049 drivers/net/ethernet/microchip/lan743x_main.c
23f0703c125be49 Bryan Whitehead 2018-03-05 1019 static int lan743x_phy_open(struct lan743x_adapter *adapter)
23f0703c125be49 Bryan Whitehead 2018-03-05 1020 {
23f0703c125be49 Bryan Whitehead 2018-03-05 1021 struct lan743x_phy *phy = &adapter->phy;
6f197fb63850b26 Roelof Berg 2020-05-29 1022 struct device_node *phynode;
23f0703c125be49 Bryan Whitehead 2018-03-05 1023 struct phy_device *phydev;
23f0703c125be49 Bryan Whitehead 2018-03-05 1024 struct net_device *netdev;
23f0703c125be49 Bryan Whitehead 2018-03-05 1025 int ret = -EIO;
23f0703c125be49 Bryan Whitehead 2018-03-05 1026
23f0703c125be49 Bryan Whitehead 2018-03-05 1027 netdev = adapter->netdev;
6f197fb63850b26 Roelof Berg 2020-05-29 1028 phynode = of_node_get(adapter->pdev->dev.of_node);
6f197fb63850b26 Roelof Berg 2020-05-29 1029
6f197fb63850b26 Roelof Berg 2020-05-29 1030 if (phynode) {
902a66e08ceaadb Sven Van Asbroeck 2020-11-08 1031 /* try devicetree phy, or fixed link */
6f197fb63850b26 Roelof Berg 2020-05-29 1032 of_get_phy_mode(phynode, &adapter->phy_mode);
6f197fb63850b26 Roelof Berg 2020-05-29 1033
6f197fb63850b26 Roelof Berg 2020-05-29 1034 if (of_phy_is_fixed_link(phynode)) {
6f197fb63850b26 Roelof Berg 2020-05-29 1035 ret = of_phy_register_fixed_link(phynode);
6f197fb63850b26 Roelof Berg 2020-05-29 1036 if (ret) {
6f197fb63850b26 Roelof Berg 2020-05-29 1037 netdev_err(netdev,
6f197fb63850b26 Roelof Berg 2020-05-29 1038 "cannot register fixed PHY\n");
6f197fb63850b26 Roelof Berg 2020-05-29 1039 of_node_put(phynode);
6f197fb63850b26 Roelof Berg 2020-05-29 1040 goto return_error;
6f197fb63850b26 Roelof Berg 2020-05-29 1041 }
6f197fb63850b26 Roelof Berg 2020-05-29 1042 }
6f197fb63850b26 Roelof Berg 2020-05-29 1043 phydev = of_phy_connect(netdev, phynode,
6f197fb63850b26 Roelof Berg 2020-05-29 1044 lan743x_phy_link_status_change, 0,
6f197fb63850b26 Roelof Berg 2020-05-29 1045 adapter->phy_mode);
6f197fb63850b26 Roelof Berg 2020-05-29 1046 of_node_put(phynode);
902a66e08ceaadb Sven Van Asbroeck 2020-11-08 1047 }
Not initialized on else path.
902a66e08ceaadb Sven Van Asbroeck 2020-11-08 1048
902a66e08ceaadb Sven Van Asbroeck 2020-11-08 @1049 if (!phydev) {
^^^^^^^
902a66e08ceaadb Sven Van Asbroeck 2020-11-08 1050 /* try internal phy */
23f0703c125be49 Bryan Whitehead 2018-03-05 1051 phydev = phy_find_first(adapter->mdiobus);
23f0703c125be49 Bryan Whitehead 2018-03-05 1052 if (!phydev)
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 2
- 1
ERROR: modpost: "mac_pton" undefined!
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 585e5b17b92dead8a3aca4e3c9876fbca5f7e0ba
commit: 0c86d774883fa17e7c81b0c8838b88d06c2c911e vdpasim: allow to assign a MAC address
date: 2 weeks ago
config: openrisc-randconfig-r035-20201113 (attached as .config)
compiler: or1k-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit...
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 0c86d774883fa17e7c81b0c8838b88d06c2c911e
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=openrisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>, old ones prefixed by <<):
>> ERROR: modpost: "mac_pton" [drivers/vdpa/vdpa_sim/vdpa_sim.ko] undefined!
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 4
- 6
Re: [PATCH RFC 12/12] vdpa_sim_blk: implement ramdisk behaviour
by kernel test robot
Hi Stefano,
[FYI, it's a private test report for your RFC patch.]
[auto build test WARNING on linus/master]
[also build test WARNING on v5.10-rc3 next-20201113]
[cannot apply to vhost/linux-next linux/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Stefano-Garzarella/vdpa-generali...
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 585e5b17b92dead8a3aca4e3c9876fbca5f7e0ba
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/65adaf3b3bcf9692c072ae2f93c1d7844...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Stefano-Garzarella/vdpa-generalize-vdpa-simulator-and-add-block-device/20201113-215247
git checkout 65adaf3b3bcf9692c072ae2f93c1d784426a224d
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c: In function 'vdpasim_blk_handle_req':
>> drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:68:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
68 | "reading over the capacity - offset: 0x%llx len: 0x%lx\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:67:4: note: in expansion of macro 'dev_err'
67 | dev_err(&vdpasim->vdpa.dev,
| ^~~~~~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:68:58: note: format string is defined here
68 | "reading over the capacity - offset: 0x%llx len: 0x%lx\n",
| ~~^
| |
| long unsigned int
| %x
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
>> drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:79:5: warning: format '%ld' expects argument of type 'long int', but argument 3 has type 'ssize_t' {aka 'int'} [-Wformat=]
79 | "vringh_iov_push_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:78:4: note: in expansion of macro 'dev_err'
78 | dev_err(&vdpasim->vdpa.dev,
| ^~~~~~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:79:39: note: format string is defined here
79 | "vringh_iov_push_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ~~^
| |
| long int
| %d
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:79:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 5 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
79 | "vringh_iov_push_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:78:4: note: in expansion of macro 'dev_err'
78 | dev_err(&vdpasim->vdpa.dev,
| ^~~~~~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:79:65: note: format string is defined here
79 | "vringh_iov_push_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ~~^
| |
| long unsigned int
| %x
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:91:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
91 | "writing over the capacity - offset: 0x%llx len: 0x%lx\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:90:4: note: in expansion of macro 'dev_err'
90 | dev_err(&vdpasim->vdpa.dev,
| ^~~~~~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:91:58: note: format string is defined here
91 | "writing over the capacity - offset: 0x%llx len: 0x%lx\n",
| ~~^
| |
| long unsigned int
| %x
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:102:5: warning: format '%ld' expects argument of type 'long int', but argument 3 has type 'ssize_t' {aka 'int'} [-Wformat=]
102 | "vringh_iov_pull_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:101:4: note: in expansion of macro 'dev_err'
101 | dev_err(&vdpasim->vdpa.dev,
| ^~~~~~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:102:39: note: format string is defined here
102 | "vringh_iov_pull_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ~~^
| |
| long int
| %d
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:102:5: warning: format '%lx' expects argument of type 'long unsigned int', but argument 5 has type 'size_t' {aka 'unsigned int'} [-Wformat=]
102 | "vringh_iov_pull_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:101:4: note: in expansion of macro 'dev_err'
101 | dev_err(&vdpasim->vdpa.dev,
| ^~~~~~~
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:102:65: note: format string is defined here
102 | "vringh_iov_pull_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
| ~~^
| |
| long unsigned int
| %x
In file included from include/linux/device.h:15,
from include/linux/genhd.h:35,
from include/linux/blkdev.h:8,
from drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:10:
drivers/vdpa/vdpa_sim/vdpa_sim_blk.c:117:5: warning: format '%ld' expects argument of type 'long int', but argument 3 has type 'ssize_t' {aka 'int'} [-Wformat=]
117 | "vringh_iov_push_iotlb() error: %ld\n", bytes);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
19 | #define dev_fmt(fmt) fmt
| ^~~
vim +68 drivers/vdpa/vdpa_sim/vdpa_sim_blk.c
27
28 static int vdpasim_blk_handle_req(struct vdpasim *vdpasim,
29 struct vdpasim_virtqueue *vq)
30 {
31 size_t wrote = 0, to_read = 0, to_write = 0;
32 struct virtio_blk_outhdr hdr;
33 uint8_t status;
34 uint32_t type;
35 ssize_t bytes;
36 loff_t offset;
37 int i, ret;
38
39 vringh_kiov_cleanup(&vq->riov);
40 vringh_kiov_cleanup(&vq->wiov);
41
42 ret = vringh_getdesc_iotlb(&vq->vring, &vq->riov, &vq->wiov,
43 &vq->head, GFP_ATOMIC);
44 if (ret != 1)
45 return ret;
46
47 for (i = 0; i < vq->wiov.used; i++)
48 to_write += vq->wiov.iov[i].iov_len;
49 to_write -= 1; /* last byte is the status */
50
51 for (i = 0; i < vq->riov.used; i++)
52 to_read += vq->riov.iov[i].iov_len;
53
54 bytes = vringh_iov_pull_iotlb(&vq->vring, &vq->riov, &hdr, sizeof(hdr));
55 if (bytes != sizeof(hdr))
56 return 0;
57
58 to_read -= bytes;
59
60 type = le32_to_cpu(hdr.type);
61 offset = le64_to_cpu(hdr.sector) << SECTOR_SHIFT;
62 status = VIRTIO_BLK_S_OK;
63
64 switch (type) {
65 case VIRTIO_BLK_T_IN:
66 if (offset + to_write > VDPASIM_BLK_CAPACITY << SECTOR_SHIFT) {
67 dev_err(&vdpasim->vdpa.dev,
> 68 "reading over the capacity - offset: 0x%llx len: 0x%lx\n",
69 offset, to_write);
70 status = VIRTIO_BLK_S_IOERR;
71 break;
72 }
73
74 bytes = vringh_iov_push_iotlb(&vq->vring, &vq->wiov,
75 vdpasim->buffer + offset,
76 to_write);
77 if (bytes < 0) {
78 dev_err(&vdpasim->vdpa.dev,
> 79 "vringh_iov_push_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
80 bytes, offset, to_write);
81 status = VIRTIO_BLK_S_IOERR;
82 break;
83 }
84
85 wrote += bytes;
86 break;
87
88 case VIRTIO_BLK_T_OUT:
89 if (offset + to_read > VDPASIM_BLK_CAPACITY << SECTOR_SHIFT) {
90 dev_err(&vdpasim->vdpa.dev,
91 "writing over the capacity - offset: 0x%llx len: 0x%lx\n",
92 offset, to_read);
93 status = VIRTIO_BLK_S_IOERR;
94 break;
95 }
96
97 bytes = vringh_iov_pull_iotlb(&vq->vring, &vq->riov,
98 vdpasim->buffer + offset,
99 to_read);
100 if (bytes < 0) {
101 dev_err(&vdpasim->vdpa.dev,
102 "vringh_iov_pull_iotlb() error: %ld offset: 0x%llx len: 0x%lx\n",
103 bytes, offset, to_read);
104 status = VIRTIO_BLK_S_IOERR;
105 break;
106 }
107 break;
108
109 case VIRTIO_BLK_T_GET_ID: {
110 char id[VIRTIO_BLK_ID_BYTES] = "vdpa_blk_sim";
111
112 bytes = vringh_iov_push_iotlb(&vq->vring,
113 &vq->wiov, id,
114 VIRTIO_BLK_ID_BYTES);
115 if (bytes < 0) {
116 dev_err(&vdpasim->vdpa.dev,
117 "vringh_iov_push_iotlb() error: %ld\n", bytes);
118 status = VIRTIO_BLK_S_IOERR;
119 break;
120 }
121
122 wrote += bytes;
123 break;
124 }
125
126 default:
127 dev_warn(&vdpasim->vdpa.dev,
128 "Unsupported request type %d\n", type);
129 status = VIRTIO_BLK_S_IOERR;
130 break;
131 }
132
133 /* if VIRTIO_BLK_T_IN or VIRTIO_BLK_T_GET_ID fail, we need to skip
134 * the remaining bytes to put the status in the last byte
135 */
136 if (to_write - wrote > 0) {
137 vringh_iov_push_iotlb(&vq->vring, &vq->wiov, NULL,
138 to_write - wrote);
139 }
140
141 /* last byte is the status */
142 bytes = vringh_iov_push_iotlb(&vq->vring, &vq->wiov, &status, 1);
143 if (bytes != 1)
144 return 0;
145
146 wrote += bytes;
147
148 /* Make sure data is wrote before advancing index */
149 smp_wmb();
150
151 vringh_complete_iotlb(&vq->vring, vq->head, wrote);
152
153 return ret;
154 }
155
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0
[linux-next:master 4454/5794] drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9248:111: warning: initialized field overwritten
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 92edc4aef86780a8ad01b092c6d6630bb3cb423d
commit: 9713158cb2a918c3f6f5522eed23cdeb61f22e75 [4454/5794] drm/amdgpu: Add and use seperate reg headers for dcn302
config: i386-randconfig-a011-20201111 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
# https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi...
git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
git fetch --no-tags linux-next master
git checkout 9713158cb2a918c3f6f5522eed23cdeb61f22e75
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:315:15: note: in expansion of macro 'BASE'
315 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:105:2: note: in expansion of macro 'SRI'
105 | SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:502:12: note: in expansion of macro 'SE_DCN3_REG_LIST'
502 | [id] = { SE_DCN3_REG_LIST(id) }
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:509:3: note: in expansion of macro 'stream_enc_regs'
509 | stream_enc_regs(4)
| ^~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:365:52: warning: initialized field overwritten [-Woverride-init]
365 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:315:15: note: in expansion of macro 'BASE'
315 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
106 | SRI(DIG_FE_CNTL, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:502:12: note: in expansion of macro 'SE_DCN3_REG_LIST'
502 | [id] = { SE_DCN3_REG_LIST(id) }
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:509:3: note: in expansion of macro 'stream_enc_regs'
509 | stream_enc_regs(4)
| ^~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:365:52: note: (near initialization for 'stream_enc_regs[4].DIG_FE_CNTL')
365 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:315:15: note: in expansion of macro 'BASE'
315 | .reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: in expansion of macro 'SRI'
106 | SRI(DIG_FE_CNTL, DIG, id), \
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:502:12: note: in expansion of macro 'SE_DCN3_REG_LIST'
502 | [id] = { SE_DCN3_REG_LIST(id) }
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:509:3: note: in expansion of macro 'stream_enc_regs'
509 | stream_enc_regs(4)
| ^~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:365:52: warning: initialized field overwritten [-Woverride-init]
365 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:309:15: note: in expansion of macro 'BASE'
309 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:170:2: note: in expansion of macro 'SR'
170 | SR(DCFCLK_CNTL), \
| ^~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:424:2: note: in expansion of macro 'HWSEQ_DCN_REG_LIST'
424 | HWSEQ_DCN_REG_LIST(), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:585:3: note: in expansion of macro 'HWSEQ_DCN302_REG_LIST'
585 | HWSEQ_DCN302_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/dimgrey_cavefish_ip_offset.h:365:52: note: (near initialization for 'hwseq_reg.DCFCLK_CNTL')
365 | #define DCN_BASE__INST0_SEG2 0x000034C0
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:304:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2'
304 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
| ^~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:306:19: note: in expansion of macro 'BASE_INNER'
306 | #define BASE(seg) BASE_INNER(seg)
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:309:15: note: in expansion of macro 'BASE'
309 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:170:2: note: in expansion of macro 'SR'
170 | SR(DCFCLK_CNTL), \
| ^~
drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:424:2: note: in expansion of macro 'HWSEQ_DCN_REG_LIST'
424 | HWSEQ_DCN_REG_LIST(), \
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:585:3: note: in expansion of macro 'HWSEQ_DCN302_REG_LIST'
585 | HWSEQ_DCN302_REG_LIST()
| ^~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:64:
>> drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9248:111: warning: initialized field overwritten [-Woverride-init]
9248 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:404:2: note: in expansion of macro 'HUBP_SF'
404 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, REFCYC_PER_REQ_DELIVERY, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:621:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
621 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9248:111: note: (near initialization for 'hubp_shift.REFCYC_PER_REQ_DELIVERY')
9248 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:404:2: note: in expansion of macro 'HUBP_SF'
404 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, REFCYC_PER_REQ_DELIVERY, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:621:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
621 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9249:111: warning: initialized field overwritten [-Woverride-init]
9249 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:405:2: note: in expansion of macro 'HUBP_SF'
405 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_LEVEL_FIXED, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:621:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
621 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9249:111: note: (near initialization for 'hubp_shift.QoS_LEVEL_FIXED')
9249 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:405:2: note: in expansion of macro 'HUBP_SF'
405 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_LEVEL_FIXED, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:621:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
621 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9250:111: warning: initialized field overwritten [-Woverride-init]
9250 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:406:2: note: in expansion of macro 'HUBP_SF'
406 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:621:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
621 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9250:111: note: (near initialization for 'hubp_shift.QoS_RAMP_DISABLE')
9250 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:406:2: note: in expansion of macro 'HUBP_SF'
406 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL0, QoS_RAMP_DISABLE, mask_sh),\
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
| ^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn302/dcn302_resource.c:621:3: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN30'
621 | HUBP_MASK_SH_LIST_DCN30(__SHIFT)
| ^~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h:9255:111: warning: initialized field overwritten [-Woverride-init]
9255 | #define HUBPREQ0_DCN_CUR0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT 0x0
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:251:16: note: in expansion of macro 'HUBPREQ0_DCN_CUR0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT'
251 | .field_name = reg_name ## __ ## field_name ## post_fix
| ^~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/../dcn10/dcn10_hubp.h:407:2: note: in expansion of macro 'HUBP_SF'
407 | HUBP_SF(HUBPREQ0_DCN_CUR0_TTU_CNTL1, REFCYC_PER_REQ_DELIVERY_PRE, mask_sh)
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.h:191:2: note: in expansion of macro 'HUBP_MASK_SH_LIST_DCN_VM'
191 | HUBP_MASK_SH_LIST_DCN_VM(mask_sh),\
vim +9248 drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_3_0_2_sh_mask.h
9028
9029
9030 // addressBlock: dce_dc_dcbubp0_dispdec_hubpreq_dispdec
9031 //HUBPREQ0_DCSURF_SURFACE_PITCH
9032 #define HUBPREQ0_DCSURF_SURFACE_PITCH__PITCH__SHIFT 0x0
9033 #define HUBPREQ0_DCSURF_SURFACE_PITCH__META_PITCH__SHIFT 0x10
9034 #define HUBPREQ0_DCSURF_SURFACE_PITCH__PITCH_MASK 0x00003FFFL
9035 #define HUBPREQ0_DCSURF_SURFACE_PITCH__META_PITCH_MASK 0x3FFF0000L
9036 //HUBPREQ0_DCSURF_SURFACE_PITCH_C
9037 #define HUBPREQ0_DCSURF_SURFACE_PITCH_C__PITCH_C__SHIFT 0x0
9038 #define HUBPREQ0_DCSURF_SURFACE_PITCH_C__META_PITCH_C__SHIFT 0x10
9039 #define HUBPREQ0_DCSURF_SURFACE_PITCH_C__PITCH_C_MASK 0x00003FFFL
9040 #define HUBPREQ0_DCSURF_SURFACE_PITCH_C__META_PITCH_C_MASK 0x3FFF0000L
9041 //HUBPREQ0_VMID_SETTINGS_0
9042 #define HUBPREQ0_VMID_SETTINGS_0__VMID__SHIFT 0x0
9043 #define HUBPREQ0_VMID_SETTINGS_0__VMID_MASK 0x0000000FL
9044 //HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS
9045 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS__PRIMARY_SURFACE_ADDRESS__SHIFT 0x0
9046 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS__PRIMARY_SURFACE_ADDRESS_MASK 0xFFFFFFFFL
9047 //HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH
9048 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH__PRIMARY_SURFACE_ADDRESS_HIGH__SHIFT 0x0
9049 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH__PRIMARY_SURFACE_ADDRESS_HIGH_MASK 0x0000FFFFL
9050 //HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_C
9051 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_C__PRIMARY_SURFACE_ADDRESS_C__SHIFT 0x0
9052 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_C__PRIMARY_SURFACE_ADDRESS_C_MASK 0xFFFFFFFFL
9053 //HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C
9054 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C__PRIMARY_SURFACE_ADDRESS_HIGH_C__SHIFT 0x0
9055 #define HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C__PRIMARY_SURFACE_ADDRESS_HIGH_C_MASK 0x0000FFFFL
9056 //HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS
9057 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS__SECONDARY_SURFACE_ADDRESS__SHIFT 0x0
9058 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS__SECONDARY_SURFACE_ADDRESS_MASK 0xFFFFFFFFL
9059 //HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH
9060 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH__SECONDARY_SURFACE_ADDRESS_HIGH__SHIFT 0x0
9061 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH__SECONDARY_SURFACE_ADDRESS_HIGH_MASK 0x0000FFFFL
9062 //HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_C
9063 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_C__SECONDARY_SURFACE_ADDRESS_C__SHIFT 0x0
9064 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_C__SECONDARY_SURFACE_ADDRESS_C_MASK 0xFFFFFFFFL
9065 //HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C
9066 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C__SECONDARY_SURFACE_ADDRESS_HIGH_C__SHIFT 0x0
9067 #define HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH_C__SECONDARY_SURFACE_ADDRESS_HIGH_C_MASK 0x0000FFFFL
9068 //HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS
9069 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS__PRIMARY_META_SURFACE_ADDRESS__SHIFT 0x0
9070 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS__PRIMARY_META_SURFACE_ADDRESS_MASK 0xFFFFFFFFL
9071 //HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH
9072 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH__PRIMARY_META_SURFACE_ADDRESS_HIGH__SHIFT 0x0
9073 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH__PRIMARY_META_SURFACE_ADDRESS_HIGH_MASK 0x0000FFFFL
9074 //HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C
9075 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C__PRIMARY_META_SURFACE_ADDRESS_C__SHIFT 0x0
9076 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_C__PRIMARY_META_SURFACE_ADDRESS_C_MASK 0xFFFFFFFFL
9077 //HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C
9078 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C__PRIMARY_META_SURFACE_ADDRESS_HIGH_C__SHIFT 0x0
9079 #define HUBPREQ0_DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C__PRIMARY_META_SURFACE_ADDRESS_HIGH_C_MASK 0x0000FFFFL
9080 //HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS
9081 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS__SECONDARY_META_SURFACE_ADDRESS__SHIFT 0x0
9082 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS__SECONDARY_META_SURFACE_ADDRESS_MASK 0xFFFFFFFFL
9083 //HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH
9084 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH__SECONDARY_META_SURFACE_ADDRESS_HIGH__SHIFT 0x0
9085 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH__SECONDARY_META_SURFACE_ADDRESS_HIGH_MASK 0x0000FFFFL
9086 //HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C
9087 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C__SECONDARY_META_SURFACE_ADDRESS_C__SHIFT 0x0
9088 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_C__SECONDARY_META_SURFACE_ADDRESS_C_MASK 0xFFFFFFFFL
9089 //HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C
9090 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C__SECONDARY_META_SURFACE_ADDRESS_HIGH_C__SHIFT 0x0
9091 #define HUBPREQ0_DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH_C__SECONDARY_META_SURFACE_ADDRESS_HIGH_C_MASK 0x0000FFFFL
9092 //HUBPREQ0_DCSURF_SURFACE_CONTROL
9093 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_TMZ__SHIFT 0x0
9094 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_DCC_EN__SHIFT 0x1
9095 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_DCC_IND_BLK__SHIFT 0x2
9096 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_TMZ_C__SHIFT 0x4
9097 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_DCC_IND_BLK_C__SHIFT 0x5
9098 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_TMZ__SHIFT 0x8
9099 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_DCC_EN__SHIFT 0x9
9100 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_DCC_IND_BLK__SHIFT 0xa
9101 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_TMZ_C__SHIFT 0xc
9102 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_DCC_IND_BLK_C__SHIFT 0xd
9103 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_META_SURFACE_TMZ__SHIFT 0x10
9104 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_META_SURFACE_TMZ_C__SHIFT 0x11
9105 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_META_SURFACE_TMZ__SHIFT 0x12
9106 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_META_SURFACE_TMZ_C__SHIFT 0x13
9107 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_TMZ_MASK 0x00000001L
9108 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_DCC_EN_MASK 0x00000002L
9109 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_DCC_IND_BLK_MASK 0x0000000CL
9110 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_TMZ_C_MASK 0x00000010L
9111 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_SURFACE_DCC_IND_BLK_C_MASK 0x00000060L
9112 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_TMZ_MASK 0x00000100L
9113 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_DCC_EN_MASK 0x00000200L
9114 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_DCC_IND_BLK_MASK 0x00000C00L
9115 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_TMZ_C_MASK 0x00001000L
9116 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_SURFACE_DCC_IND_BLK_C_MASK 0x00006000L
9117 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_META_SURFACE_TMZ_MASK 0x00010000L
9118 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__PRIMARY_META_SURFACE_TMZ_C_MASK 0x00020000L
9119 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_META_SURFACE_TMZ_MASK 0x00040000L
9120 #define HUBPREQ0_DCSURF_SURFACE_CONTROL__SECONDARY_META_SURFACE_TMZ_C_MASK 0x00080000L
9121 //HUBPREQ0_DCSURF_FLIP_CONTROL
9122 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_UPDATE_LOCK__SHIFT 0x0
9123 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_TYPE__SHIFT 0x1
9124 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_VUPDATE_SKIP_NUM__SHIFT 0x4
9125 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_PENDING__SHIFT 0x8
9126 #define HUBPREQ0_DCSURF_FLIP_CONTROL__HUBPREQ_MASTER_UPDATE_LOCK_STATUS__SHIFT 0x9
9127 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_MODE_FOR_STEREOSYNC__SHIFT 0xc
9128 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_IN_STEREOSYNC__SHIFT 0x10
9129 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_STEREO_SELECT_DISABLE__SHIFT 0x11
9130 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_STEREO_SELECT_POLARITY__SHIFT 0x12
9131 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_PENDING_DELAY__SHIFT 0x14
9132 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_UPDATE_LOCK_MASK 0x00000001L
9133 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_TYPE_MASK 0x00000002L
9134 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_VUPDATE_SKIP_NUM_MASK 0x000000F0L
9135 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_PENDING_MASK 0x00000100L
9136 #define HUBPREQ0_DCSURF_FLIP_CONTROL__HUBPREQ_MASTER_UPDATE_LOCK_STATUS_MASK 0x00000200L
9137 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_MODE_FOR_STEREOSYNC_MASK 0x00003000L
9138 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_IN_STEREOSYNC_MASK 0x00010000L
9139 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_STEREO_SELECT_DISABLE_MASK 0x00020000L
9140 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_STEREO_SELECT_POLARITY_MASK 0x00040000L
9141 #define HUBPREQ0_DCSURF_FLIP_CONTROL__SURFACE_FLIP_PENDING_DELAY_MASK 0x3FF00000L
9142 //HUBPREQ0_DCSURF_FLIP_CONTROL2
9143 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_FLIP_PENDING_MIN_TIME__SHIFT 0x0
9144 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_GSL_ENABLE__SHIFT 0x8
9145 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_GSL_MASK__SHIFT 0x9
9146 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_TRIPLE_BUFFER_ENABLE__SHIFT 0xa
9147 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_INUSE_RAED_NO_LATCH__SHIFT 0xc
9148 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_FLIP_PENDING_MIN_TIME_MASK 0x000000FFL
9149 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_GSL_ENABLE_MASK 0x00000100L
9150 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_GSL_MASK_MASK 0x00000200L
9151 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_TRIPLE_BUFFER_ENABLE_MASK 0x00000400L
9152 #define HUBPREQ0_DCSURF_FLIP_CONTROL2__SURFACE_INUSE_RAED_NO_LATCH_MASK 0x00001000L
9153 //HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT
9154 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_INT_MASK__SHIFT 0x0
9155 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_INT_TYPE__SHIFT 0x1
9156 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_INT_MASK__SHIFT 0x2
9157 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_INT_TYPE__SHIFT 0x3
9158 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_CLEAR__SHIFT 0x8
9159 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_CLEAR__SHIFT 0x9
9160 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_OCCURRED__SHIFT 0x10
9161 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_INT_STATUS__SHIFT 0x11
9162 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_OCCURRED__SHIFT 0x12
9163 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_INT_STATUS__SHIFT 0x13
9164 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_INT_MASK_MASK 0x00000001L
9165 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_INT_TYPE_MASK 0x00000002L
9166 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_INT_MASK_MASK 0x00000004L
9167 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_INT_TYPE_MASK 0x00000008L
9168 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_CLEAR_MASK 0x00000100L
9169 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_CLEAR_MASK 0x00000200L
9170 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_OCCURRED_MASK 0x00010000L
9171 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_INT_STATUS_MASK 0x00020000L
9172 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_OCCURRED_MASK 0x00040000L
9173 #define HUBPREQ0_DCSURF_SURFACE_FLIP_INTERRUPT__SURFACE_FLIP_AWAY_INT_STATUS_MASK 0x00080000L
9174 //HUBPREQ0_DCSURF_SURFACE_INUSE
9175 #define HUBPREQ0_DCSURF_SURFACE_INUSE__SURFACE_INUSE_ADDRESS__SHIFT 0x0
9176 #define HUBPREQ0_DCSURF_SURFACE_INUSE__SURFACE_INUSE_ADDRESS_MASK 0xFFFFFFFFL
9177 //HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH
9178 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH__SURFACE_INUSE_ADDRESS_HIGH__SHIFT 0x0
9179 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH__SURFACE_INUSE_VMID__SHIFT 0x1c
9180 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH__SURFACE_INUSE_ADDRESS_HIGH_MASK 0x0000FFFFL
9181 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH__SURFACE_INUSE_VMID_MASK 0xF0000000L
9182 //HUBPREQ0_DCSURF_SURFACE_INUSE_C
9183 #define HUBPREQ0_DCSURF_SURFACE_INUSE_C__SURFACE_INUSE_ADDRESS_C__SHIFT 0x0
9184 #define HUBPREQ0_DCSURF_SURFACE_INUSE_C__SURFACE_INUSE_ADDRESS_C_MASK 0xFFFFFFFFL
9185 //HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C
9186 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C__SURFACE_INUSE_ADDRESS_HIGH_C__SHIFT 0x0
9187 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C__SURFACE_INUSE_VMID_C__SHIFT 0x1c
9188 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C__SURFACE_INUSE_ADDRESS_HIGH_C_MASK 0x0000FFFFL
9189 #define HUBPREQ0_DCSURF_SURFACE_INUSE_HIGH_C__SURFACE_INUSE_VMID_C_MASK 0xF0000000L
9190 //HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE
9191 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE__SURFACE_EARLIEST_INUSE_ADDRESS__SHIFT 0x0
9192 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE__SURFACE_EARLIEST_INUSE_ADDRESS_MASK 0xFFFFFFFFL
9193 //HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH
9194 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH__SURFACE_EARLIEST_INUSE_ADDRESS_HIGH__SHIFT 0x0
9195 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH__SURFACE_EARLIEST_INUSE_VMID__SHIFT 0x1c
9196 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH__SURFACE_EARLIEST_INUSE_ADDRESS_HIGH_MASK 0x0000FFFFL
9197 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH__SURFACE_EARLIEST_INUSE_VMID_MASK 0xF0000000L
9198 //HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_C
9199 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_C__SURFACE_EARLIEST_INUSE_ADDRESS_C__SHIFT 0x0
9200 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_C__SURFACE_EARLIEST_INUSE_ADDRESS_C_MASK 0xFFFFFFFFL
9201 //HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C
9202 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C__SURFACE_EARLIEST_INUSE_ADDRESS_HIGH_C__SHIFT 0x0
9203 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C__SURFACE_EARLIEST_INUSE_VMID_C__SHIFT 0x1c
9204 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C__SURFACE_EARLIEST_INUSE_ADDRESS_HIGH_C_MASK 0x0000FFFFL
9205 #define HUBPREQ0_DCSURF_SURFACE_EARLIEST_INUSE_HIGH_C__SURFACE_EARLIEST_INUSE_VMID_C_MASK 0xF0000000L
9206 //HUBPREQ0_DCN_EXPANSION_MODE
9207 #define HUBPREQ0_DCN_EXPANSION_MODE__DRQ_EXPANSION_MODE__SHIFT 0x0
9208 #define HUBPREQ0_DCN_EXPANSION_MODE__CRQ_EXPANSION_MODE__SHIFT 0x2
9209 #define HUBPREQ0_DCN_EXPANSION_MODE__MRQ_EXPANSION_MODE__SHIFT 0x4
9210 #define HUBPREQ0_DCN_EXPANSION_MODE__PRQ_EXPANSION_MODE__SHIFT 0x6
9211 #define HUBPREQ0_DCN_EXPANSION_MODE__DRQ_EXPANSION_MODE_MASK 0x00000003L
9212 #define HUBPREQ0_DCN_EXPANSION_MODE__CRQ_EXPANSION_MODE_MASK 0x0000000CL
9213 #define HUBPREQ0_DCN_EXPANSION_MODE__MRQ_EXPANSION_MODE_MASK 0x00000030L
9214 #define HUBPREQ0_DCN_EXPANSION_MODE__PRQ_EXPANSION_MODE_MASK 0x000000C0L
9215 //HUBPREQ0_DCN_TTU_QOS_WM
9216 #define HUBPREQ0_DCN_TTU_QOS_WM__QoS_LEVEL_LOW_WM__SHIFT 0x0
9217 #define HUBPREQ0_DCN_TTU_QOS_WM__QoS_LEVEL_HIGH_WM__SHIFT 0x10
9218 #define HUBPREQ0_DCN_TTU_QOS_WM__QoS_LEVEL_LOW_WM_MASK 0x00003FFFL
9219 #define HUBPREQ0_DCN_TTU_QOS_WM__QoS_LEVEL_HIGH_WM_MASK 0x3FFF0000L
9220 //HUBPREQ0_DCN_GLOBAL_TTU_CNTL
9221 #define HUBPREQ0_DCN_GLOBAL_TTU_CNTL__MIN_TTU_VBLANK__SHIFT 0x0
9222 #define HUBPREQ0_DCN_GLOBAL_TTU_CNTL__ROW_TTU_MODE__SHIFT 0x1b
9223 #define HUBPREQ0_DCN_GLOBAL_TTU_CNTL__QoS_LEVEL_FLIP__SHIFT 0x1c
9224 #define HUBPREQ0_DCN_GLOBAL_TTU_CNTL__MIN_TTU_VBLANK_MASK 0x00FFFFFFL
9225 #define HUBPREQ0_DCN_GLOBAL_TTU_CNTL__ROW_TTU_MODE_MASK 0x08000000L
9226 #define HUBPREQ0_DCN_GLOBAL_TTU_CNTL__QoS_LEVEL_FLIP_MASK 0xF0000000L
9227 //HUBPREQ0_DCN_SURF0_TTU_CNTL0
9228 #define HUBPREQ0_DCN_SURF0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
9229 #define HUBPREQ0_DCN_SURF0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
9230 #define HUBPREQ0_DCN_SURF0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
9231 #define HUBPREQ0_DCN_SURF0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY_MASK 0x007FFFFFL
9232 #define HUBPREQ0_DCN_SURF0_TTU_CNTL0__QoS_LEVEL_FIXED_MASK 0x0F000000L
9233 #define HUBPREQ0_DCN_SURF0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK 0x10000000L
9234 //HUBPREQ0_DCN_SURF0_TTU_CNTL1
9235 #define HUBPREQ0_DCN_SURF0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT 0x0
9236 #define HUBPREQ0_DCN_SURF0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE_MASK 0x007FFFFFL
9237 //HUBPREQ0_DCN_SURF1_TTU_CNTL0
9238 #define HUBPREQ0_DCN_SURF1_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
9239 #define HUBPREQ0_DCN_SURF1_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
9240 #define HUBPREQ0_DCN_SURF1_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
9241 #define HUBPREQ0_DCN_SURF1_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY_MASK 0x007FFFFFL
9242 #define HUBPREQ0_DCN_SURF1_TTU_CNTL0__QoS_LEVEL_FIXED_MASK 0x0F000000L
9243 #define HUBPREQ0_DCN_SURF1_TTU_CNTL0__QoS_RAMP_DISABLE_MASK 0x10000000L
9244 //HUBPREQ0_DCN_SURF1_TTU_CNTL1
9245 #define HUBPREQ0_DCN_SURF1_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT 0x0
9246 #define HUBPREQ0_DCN_SURF1_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE_MASK 0x007FFFFFL
9247 //HUBPREQ0_DCN_CUR0_TTU_CNTL0
> 9248 #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
9249 #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
9250 #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
9251 #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY_MASK 0x007FFFFFL
9252 #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_LEVEL_FIXED_MASK 0x0F000000L
9253 #define HUBPREQ0_DCN_CUR0_TTU_CNTL0__QoS_RAMP_DISABLE_MASK 0x10000000L
9254 //HUBPREQ0_DCN_CUR0_TTU_CNTL1
9255 #define HUBPREQ0_DCN_CUR0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT 0x0
9256 #define HUBPREQ0_DCN_CUR0_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE_MASK 0x007FFFFFL
9257 //HUBPREQ0_DCN_CUR1_TTU_CNTL0
9258 #define HUBPREQ0_DCN_CUR1_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY__SHIFT 0x0
9259 #define HUBPREQ0_DCN_CUR1_TTU_CNTL0__QoS_LEVEL_FIXED__SHIFT 0x18
9260 #define HUBPREQ0_DCN_CUR1_TTU_CNTL0__QoS_RAMP_DISABLE__SHIFT 0x1c
9261 #define HUBPREQ0_DCN_CUR1_TTU_CNTL0__REFCYC_PER_REQ_DELIVERY_MASK 0x007FFFFFL
9262 #define HUBPREQ0_DCN_CUR1_TTU_CNTL0__QoS_LEVEL_FIXED_MASK 0x0F000000L
9263 #define HUBPREQ0_DCN_CUR1_TTU_CNTL0__QoS_RAMP_DISABLE_MASK 0x10000000L
9264 //HUBPREQ0_DCN_CUR1_TTU_CNTL1
9265 #define HUBPREQ0_DCN_CUR1_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE__SHIFT 0x0
9266 #define HUBPREQ0_DCN_CUR1_TTU_CNTL1__REFCYC_PER_REQ_DELIVERY_PRE_MASK 0x007FFFFFL
9267 //HUBPREQ0_DCN_DMDATA_VM_CNTL
9268 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__REFCYC_PER_VM_DMDATA__SHIFT 0x0
9269 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_FAULT_STATUS__SHIFT 0x10
9270 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_FAULT_STATUS_CLEAR__SHIFT 0x14
9271 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_UNDERFLOW_STATUS__SHIFT 0x18
9272 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_LATE_STATUS__SHIFT 0x19
9273 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_UNDERFLOW_STATUS_CLEAR__SHIFT 0x1a
9274 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_DONE__SHIFT 0x1f
9275 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__REFCYC_PER_VM_DMDATA_MASK 0x0000FFFFL
9276 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_FAULT_STATUS_MASK 0x000F0000L
9277 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_FAULT_STATUS_CLEAR_MASK 0x00100000L
9278 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_UNDERFLOW_STATUS_MASK 0x01000000L
9279 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_LATE_STATUS_MASK 0x02000000L
9280 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_UNDERFLOW_STATUS_CLEAR_MASK 0x04000000L
9281 #define HUBPREQ0_DCN_DMDATA_VM_CNTL__DMDATA_VM_DONE_MASK 0x80000000L
9282 //HUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR
9283 #define HUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR__MC_VM_SYSTEM_APERTURE_LOW_ADDR__SHIFT 0x0
9284 #define HUBPREQ0_DCN_VM_SYSTEM_APERTURE_LOW_ADDR__MC_VM_SYSTEM_APERTURE_LOW_ADDR_MASK 0x3FFFFFFFL
9285 //HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR
9286 #define HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR__MC_VM_SYSTEM_APERTURE_HIGH_ADDR__SHIFT 0x0
9287 #define HUBPREQ0_DCN_VM_SYSTEM_APERTURE_HIGH_ADDR__MC_VM_SYSTEM_APERTURE_HIGH_ADDR_MASK 0x3FFFFFFFL
9288 //HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL
9289 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB__SHIFT 0x0
9290 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__SYSTEM_ACCESS_MODE__SHIFT 0x3
9291 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__SYSTEM_APERTURE_UNMAPPED_ACCESS__SHIFT 0x5
9292 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__ENABLE_ADVANCED_DRIVER_MODEL__SHIFT 0x6
9293 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__ENABLE_L1_TLB_MASK 0x00000001L
9294 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__SYSTEM_ACCESS_MODE_MASK 0x00000018L
9295 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__SYSTEM_APERTURE_UNMAPPED_ACCESS_MASK 0x00000020L
9296 #define HUBPREQ0_DCN_VM_MX_L1_TLB_CNTL__ENABLE_ADVANCED_DRIVER_MODEL_MASK 0x00000040L
9297 //HUBPREQ0_BLANK_OFFSET_0
9298 #define HUBPREQ0_BLANK_OFFSET_0__REFCYC_H_BLANK_END__SHIFT 0x0
9299 #define HUBPREQ0_BLANK_OFFSET_0__DLG_V_BLANK_END__SHIFT 0x10
9300 #define HUBPREQ0_BLANK_OFFSET_0__REFCYC_H_BLANK_END_MASK 0x00001FFFL
9301 #define HUBPREQ0_BLANK_OFFSET_0__DLG_V_BLANK_END_MASK 0x7FFF0000L
9302 //HUBPREQ0_BLANK_OFFSET_1
9303 #define HUBPREQ0_BLANK_OFFSET_1__MIN_DST_Y_NEXT_START__SHIFT 0x0
9304 #define HUBPREQ0_BLANK_OFFSET_1__MIN_DST_Y_NEXT_START_MASK 0x0003FFFFL
9305 //HUBPREQ0_DST_DIMENSIONS
9306 #define HUBPREQ0_DST_DIMENSIONS__REFCYC_PER_HTOTAL__SHIFT 0x0
9307 #define HUBPREQ0_DST_DIMENSIONS__REFCYC_PER_HTOTAL_MASK 0x001FFFFFL
9308 //HUBPREQ0_DST_AFTER_SCALER
9309 #define HUBPREQ0_DST_AFTER_SCALER__REFCYC_X_AFTER_SCALER__SHIFT 0x0
9310 #define HUBPREQ0_DST_AFTER_SCALER__DST_Y_AFTER_SCALER__SHIFT 0x10
9311 #define HUBPREQ0_DST_AFTER_SCALER__REFCYC_X_AFTER_SCALER_MASK 0x00001FFFL
9312 #define HUBPREQ0_DST_AFTER_SCALER__DST_Y_AFTER_SCALER_MASK 0x00070000L
9313 //HUBPREQ0_PREFETCH_SETTINGS
9314 #define HUBPREQ0_PREFETCH_SETTINGS__VRATIO_PREFETCH__SHIFT 0x0
9315 #define HUBPREQ0_PREFETCH_SETTINGS__DST_Y_PREFETCH__SHIFT 0x18
9316 #define HUBPREQ0_PREFETCH_SETTINGS__VRATIO_PREFETCH_MASK 0x003FFFFFL
9317 #define HUBPREQ0_PREFETCH_SETTINGS__DST_Y_PREFETCH_MASK 0xFF000000L
9318 //HUBPREQ0_PREFETCH_SETTINGS_C
9319 #define HUBPREQ0_PREFETCH_SETTINGS_C__VRATIO_PREFETCH_C__SHIFT 0x0
9320 #define HUBPREQ0_PREFETCH_SETTINGS_C__VRATIO_PREFETCH_C_MASK 0x003FFFFFL
9321 //HUBPREQ0_VBLANK_PARAMETERS_0
9322 #define HUBPREQ0_VBLANK_PARAMETERS_0__DST_Y_PER_VM_VBLANK__SHIFT 0x0
9323 #define HUBPREQ0_VBLANK_PARAMETERS_0__DST_Y_PER_ROW_VBLANK__SHIFT 0x8
9324 #define HUBPREQ0_VBLANK_PARAMETERS_0__DST_Y_PER_VM_VBLANK_MASK 0x0000007FL
9325 #define HUBPREQ0_VBLANK_PARAMETERS_0__DST_Y_PER_ROW_VBLANK_MASK 0x00003F00L
9326 //HUBPREQ0_VBLANK_PARAMETERS_1
9327 #define HUBPREQ0_VBLANK_PARAMETERS_1__REFCYC_PER_PTE_GROUP_VBLANK_L__SHIFT 0x0
9328 #define HUBPREQ0_VBLANK_PARAMETERS_1__REFCYC_PER_PTE_GROUP_VBLANK_L_MASK 0x007FFFFFL
9329 //HUBPREQ0_VBLANK_PARAMETERS_2
9330 #define HUBPREQ0_VBLANK_PARAMETERS_2__REFCYC_PER_PTE_GROUP_VBLANK_C__SHIFT 0x0
9331 #define HUBPREQ0_VBLANK_PARAMETERS_2__REFCYC_PER_PTE_GROUP_VBLANK_C_MASK 0x007FFFFFL
9332 //HUBPREQ0_VBLANK_PARAMETERS_3
9333 #define HUBPREQ0_VBLANK_PARAMETERS_3__REFCYC_PER_META_CHUNK_VBLANK_L__SHIFT 0x0
9334 #define HUBPREQ0_VBLANK_PARAMETERS_3__REFCYC_PER_META_CHUNK_VBLANK_L_MASK 0x007FFFFFL
9335 //HUBPREQ0_VBLANK_PARAMETERS_4
9336 #define HUBPREQ0_VBLANK_PARAMETERS_4__REFCYC_PER_META_CHUNK_VBLANK_C__SHIFT 0x0
9337 #define HUBPREQ0_VBLANK_PARAMETERS_4__REFCYC_PER_META_CHUNK_VBLANK_C_MASK 0x007FFFFFL
9338 //HUBPREQ0_FLIP_PARAMETERS_0
9339 #define HUBPREQ0_FLIP_PARAMETERS_0__DST_Y_PER_VM_FLIP__SHIFT 0x0
9340 #define HUBPREQ0_FLIP_PARAMETERS_0__DST_Y_PER_ROW_FLIP__SHIFT 0x8
9341 #define HUBPREQ0_FLIP_PARAMETERS_0__DST_Y_PER_VM_FLIP_MASK 0x0000007FL
9342 #define HUBPREQ0_FLIP_PARAMETERS_0__DST_Y_PER_ROW_FLIP_MASK 0x00003F00L
9343 //HUBPREQ0_FLIP_PARAMETERS_1
9344 #define HUBPREQ0_FLIP_PARAMETERS_1__REFCYC_PER_PTE_GROUP_FLIP_L__SHIFT 0x0
9345 #define HUBPREQ0_FLIP_PARAMETERS_1__REFCYC_PER_PTE_GROUP_FLIP_L_MASK 0x007FFFFFL
9346 //HUBPREQ0_FLIP_PARAMETERS_2
9347 #define HUBPREQ0_FLIP_PARAMETERS_2__REFCYC_PER_META_CHUNK_FLIP_L__SHIFT 0x0
9348 #define HUBPREQ0_FLIP_PARAMETERS_2__REFCYC_PER_META_CHUNK_FLIP_L_MASK 0x007FFFFFL
9349 //HUBPREQ0_NOM_PARAMETERS_0
9350 #define HUBPREQ0_NOM_PARAMETERS_0__DST_Y_PER_PTE_ROW_NOM_L__SHIFT 0x0
9351 #define HUBPREQ0_NOM_PARAMETERS_0__DST_Y_PER_PTE_ROW_NOM_L_MASK 0x0001FFFFL
9352 //HUBPREQ0_NOM_PARAMETERS_1
9353 #define HUBPREQ0_NOM_PARAMETERS_1__REFCYC_PER_PTE_GROUP_NOM_L__SHIFT 0x0
9354 #define HUBPREQ0_NOM_PARAMETERS_1__REFCYC_PER_PTE_GROUP_NOM_L_MASK 0x007FFFFFL
9355 //HUBPREQ0_NOM_PARAMETERS_2
9356 #define HUBPREQ0_NOM_PARAMETERS_2__DST_Y_PER_PTE_ROW_NOM_C__SHIFT 0x0
9357 #define HUBPREQ0_NOM_PARAMETERS_2__DST_Y_PER_PTE_ROW_NOM_C_MASK 0x0001FFFFL
9358 //HUBPREQ0_NOM_PARAMETERS_3
9359 #define HUBPREQ0_NOM_PARAMETERS_3__REFCYC_PER_PTE_GROUP_NOM_C__SHIFT 0x0
9360 #define HUBPREQ0_NOM_PARAMETERS_3__REFCYC_PER_PTE_GROUP_NOM_C_MASK 0x007FFFFFL
9361 //HUBPREQ0_NOM_PARAMETERS_4
9362 #define HUBPREQ0_NOM_PARAMETERS_4__DST_Y_PER_META_ROW_NOM_L__SHIFT 0x0
9363 #define HUBPREQ0_NOM_PARAMETERS_4__DST_Y_PER_META_ROW_NOM_L_MASK 0x0001FFFFL
9364 //HUBPREQ0_NOM_PARAMETERS_5
9365 #define HUBPREQ0_NOM_PARAMETERS_5__REFCYC_PER_META_CHUNK_NOM_L__SHIFT 0x0
9366 #define HUBPREQ0_NOM_PARAMETERS_5__REFCYC_PER_META_CHUNK_NOM_L_MASK 0x007FFFFFL
9367 //HUBPREQ0_NOM_PARAMETERS_6
9368 #define HUBPREQ0_NOM_PARAMETERS_6__DST_Y_PER_META_ROW_NOM_C__SHIFT 0x0
9369 #define HUBPREQ0_NOM_PARAMETERS_6__DST_Y_PER_META_ROW_NOM_C_MASK 0x0001FFFFL
9370 //HUBPREQ0_NOM_PARAMETERS_7
9371 #define HUBPREQ0_NOM_PARAMETERS_7__REFCYC_PER_META_CHUNK_NOM_C__SHIFT 0x0
9372 #define HUBPREQ0_NOM_PARAMETERS_7__REFCYC_PER_META_CHUNK_NOM_C_MASK 0x007FFFFFL
9373 //HUBPREQ0_PER_LINE_DELIVERY_PRE
9374 #define HUBPREQ0_PER_LINE_DELIVERY_PRE__REFCYC_PER_LINE_DELIVERY_PRE_L__SHIFT 0x0
9375 #define HUBPREQ0_PER_LINE_DELIVERY_PRE__REFCYC_PER_LINE_DELIVERY_PRE_C__SHIFT 0x10
9376 #define HUBPREQ0_PER_LINE_DELIVERY_PRE__REFCYC_PER_LINE_DELIVERY_PRE_L_MASK 0x00001FFFL
9377 #define HUBPREQ0_PER_LINE_DELIVERY_PRE__REFCYC_PER_LINE_DELIVERY_PRE_C_MASK 0x1FFF0000L
9378 //HUBPREQ0_PER_LINE_DELIVERY
9379 #define HUBPREQ0_PER_LINE_DELIVERY__REFCYC_PER_LINE_DELIVERY_L__SHIFT 0x0
9380 #define HUBPREQ0_PER_LINE_DELIVERY__REFCYC_PER_LINE_DELIVERY_C__SHIFT 0x10
9381 #define HUBPREQ0_PER_LINE_DELIVERY__REFCYC_PER_LINE_DELIVERY_L_MASK 0x00001FFFL
9382 #define HUBPREQ0_PER_LINE_DELIVERY__REFCYC_PER_LINE_DELIVERY_C_MASK 0x1FFF0000L
9383 //HUBPREQ0_CURSOR_SETTINGS
9384 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR0_DST_Y_OFFSET__SHIFT 0x0
9385 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR0_CHUNK_HDL_ADJUST__SHIFT 0x8
9386 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR1_DST_Y_OFFSET__SHIFT 0x10
9387 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR1_CHUNK_HDL_ADJUST__SHIFT 0x18
9388 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR0_DST_Y_OFFSET_MASK 0x000000FFL
9389 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR0_CHUNK_HDL_ADJUST_MASK 0x00000300L
9390 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR1_DST_Y_OFFSET_MASK 0x00FF0000L
9391 #define HUBPREQ0_CURSOR_SETTINGS__CURSOR1_CHUNK_HDL_ADJUST_MASK 0x03000000L
9392 //HUBPREQ0_REF_FREQ_TO_PIX_FREQ
9393 #define HUBPREQ0_REF_FREQ_TO_PIX_FREQ__REF_FREQ_TO_PIX_FREQ__SHIFT 0x0
9394 #define HUBPREQ0_REF_FREQ_TO_PIX_FREQ__REF_FREQ_TO_PIX_FREQ_MASK 0x001FFFFFL
9395 //HUBPREQ0_DST_Y_DELTA_DRQ_LIMIT
9396 #define HUBPREQ0_DST_Y_DELTA_DRQ_LIMIT__DST_Y_DELTA_DRQ_LIMIT__SHIFT 0x0
9397 #define HUBPREQ0_DST_Y_DELTA_DRQ_LIMIT__DST_Y_DELTA_DRQ_LIMIT_MASK 0x00007FFFL
9398 //HUBPREQ0_HUBPREQ_MEM_PWR_CTRL
9399 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_DPTE_MEM_PWR_FORCE__SHIFT 0x0
9400 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_DPTE_MEM_PWR_DIS__SHIFT 0x2
9401 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_MPTE_MEM_PWR_FORCE__SHIFT 0x4
9402 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_MPTE_MEM_PWR_DIS__SHIFT 0x6
9403 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_META_MEM_PWR_FORCE__SHIFT 0x8
9404 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_META_MEM_PWR_DIS__SHIFT 0xa
9405 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_PDE_MEM_PWR_FORCE__SHIFT 0xc
9406 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_PDE_MEM_PWR_DIS__SHIFT 0xe
9407 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_DPTE_MEM_PWR_FORCE_MASK 0x00000003L
9408 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_DPTE_MEM_PWR_DIS_MASK 0x00000004L
9409 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_MPTE_MEM_PWR_FORCE_MASK 0x00000030L
9410 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_MPTE_MEM_PWR_DIS_MASK 0x00000040L
9411 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_META_MEM_PWR_FORCE_MASK 0x00000300L
9412 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_META_MEM_PWR_DIS_MASK 0x00000400L
9413 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_PDE_MEM_PWR_FORCE_MASK 0x00003000L
9414 #define HUBPREQ0_HUBPREQ_MEM_PWR_CTRL__REQ_PDE_MEM_PWR_DIS_MASK 0x00004000L
9415 //HUBPREQ0_HUBPREQ_MEM_PWR_STATUS
9416 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_DPTE_MEM_PWR_STATE__SHIFT 0x0
9417 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_MPTE_MEM_PWR_STATE__SHIFT 0x2
9418 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_META_MEM_PWR_STATE__SHIFT 0x4
9419 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_PDE_MEM_PWR_STATE__SHIFT 0x6
9420 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_DPTE_MEM_PWR_STATE_MASK 0x00000003L
9421 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_MPTE_MEM_PWR_STATE_MASK 0x0000000CL
9422 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_META_MEM_PWR_STATE_MASK 0x00000030L
9423 #define HUBPREQ0_HUBPREQ_MEM_PWR_STATUS__REQ_PDE_MEM_PWR_STATE_MASK 0x000000C0L
9424 //HUBPREQ0_VBLANK_PARAMETERS_5
9425 #define HUBPREQ0_VBLANK_PARAMETERS_5__REFCYC_PER_VM_GROUP_VBLANK__SHIFT 0x0
9426 #define HUBPREQ0_VBLANK_PARAMETERS_5__REFCYC_PER_VM_GROUP_VBLANK_MASK 0x007FFFFFL
9427 //HUBPREQ0_VBLANK_PARAMETERS_6
9428 #define HUBPREQ0_VBLANK_PARAMETERS_6__REFCYC_PER_VM_REQ_VBLANK__SHIFT 0x0
9429 #define HUBPREQ0_VBLANK_PARAMETERS_6__REFCYC_PER_VM_REQ_VBLANK_MASK 0x007FFFFFL
9430 //HUBPREQ0_FLIP_PARAMETERS_3
9431 #define HUBPREQ0_FLIP_PARAMETERS_3__REFCYC_PER_VM_GROUP_FLIP__SHIFT 0x0
9432 #define HUBPREQ0_FLIP_PARAMETERS_3__REFCYC_PER_VM_GROUP_FLIP_MASK 0x007FFFFFL
9433 //HUBPREQ0_FLIP_PARAMETERS_4
9434 #define HUBPREQ0_FLIP_PARAMETERS_4__REFCYC_PER_VM_REQ_FLIP__SHIFT 0x0
9435 #define HUBPREQ0_FLIP_PARAMETERS_4__REFCYC_PER_VM_REQ_FLIP_MASK 0x007FFFFFL
9436 //HUBPREQ0_FLIP_PARAMETERS_5
9437 #define HUBPREQ0_FLIP_PARAMETERS_5__REFCYC_PER_PTE_GROUP_FLIP_C__SHIFT 0x0
9438 #define HUBPREQ0_FLIP_PARAMETERS_5__REFCYC_PER_PTE_GROUP_FLIP_C_MASK 0x007FFFFFL
9439 //HUBPREQ0_FLIP_PARAMETERS_6
9440 #define HUBPREQ0_FLIP_PARAMETERS_6__REFCYC_PER_META_CHUNK_FLIP_C__SHIFT 0x0
9441 #define HUBPREQ0_FLIP_PARAMETERS_6__REFCYC_PER_META_CHUNK_FLIP_C_MASK 0x007FFFFFL
9442
9443
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0
Re: [PATCH v2 3/5] clk: ralink: add clock driver for mt7621 SoC
by kernel test robot
Hi Sergio,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on clk/clk-next]
[also build test WARNING on staging/staging-testing robh/for-next linus/master v5.10-rc3 next-20201113]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sergio-Paracuellos/MIPS-ralink-a...
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/e9751b3fda8fd54952502ec81fddc61c8...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sergio-Paracuellos/MIPS-ralink-add-CPU-clock-detection-and-clock-gate-driver-for-MT7621/20201113-171221
git checkout e9751b3fda8fd54952502ec81fddc61c80347155
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
drivers/clk/ralink/clk-mt7621.c: In function 'mt7621_register_top_clocks':
>> drivers/clk/ralink/clk-mt7621.c:299:3: warning: ignoring return value of 'of_clk_hw_register', declared with attribute warn_unused_result [-Wunused-result]
299 | of_clk_hw_register(clk_prov->node, &sclk->hw);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/clk/ralink/clk-mt7621.c: In function 'mt7621_gate_ops_init':
drivers/clk/ralink/clk-mt7621.c:155:2: warning: ignoring return value of 'of_clk_hw_register', declared with attribute warn_unused_result [-Wunused-result]
155 | of_clk_hw_register(np, &sclk->hw);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +/of_clk_hw_register +299 drivers/clk/ralink/clk-mt7621.c
288
289 static void mt7621_register_top_clocks(struct mt7621_clk_provider *clk_prov)
290 {
291 struct clk_hw_onecell_data **clk_data = &clk_prov->clk_data;
292 struct clk_hw **hws = (*clk_data)->hws;
293 int i;
294
295 for (i = 0; i < ARRAY_SIZE(mt7621_clks_base); i++) {
296 struct mt7621_clk *sclk = &mt7621_clks_base[i];
297
298 sclk->clk_prov = clk_prov;
> 299 of_clk_hw_register(clk_prov->node, &sclk->hw);
300 hws[i] = &sclk->hw;
301 (*clk_data)->num++;
302 }
303 }
304
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 2
- 1
[morimoto-linux:fw-cleanup-2020-11-10-v1 71/78] sound/soc/generic/audio-graph-card.c:265:14: error: no member named 'cpu_dai' in 'struct simple_dai_props'
by kernel test robot
tree: https://github.com/morimoto/linux fw-cleanup-2020-11-10-v1
head: 9c69461b4cf4ebccbe80471cd38a70320d9a27ee
commit: 22ad805d527057b9972b3e64dc7fd15674edc0a9 [71/78] simple-card-utils: prepare for Multi-CPU/Codec support
config: x86_64-randconfig-a011-20201110 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 4d81c8adb6ed9840257f6cb6b93f60856d422a15)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/morimoto/linux/commit/22ad805d527057b9972b3e64dc7fd156...
git remote add morimoto-linux https://github.com/morimoto/linux
git fetch --no-tags morimoto-linux fw-cleanup-2020-11-10-v1
git checkout 22ad805d527057b9972b3e64dc7fd15674edc0a9
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> sound/soc/generic/audio-graph-card.c:265:14: error: no member named 'cpu_dai' in 'struct simple_dai_props'
dai_props->cpu_dai = &priv->dais[li->dais++];
~~~~~~~~~ ^
>> sound/soc/generic/audio-graph-card.c:310:14: error: no member named 'codec_dai' in 'struct simple_dai_props'
dai_props->codec_dai = &priv->dais[li->dais++];
~~~~~~~~~ ^
sound/soc/generic/audio-graph-card.c:394:13: error: no member named 'cpu_dai' in 'struct simple_dai_props'
dai_props->cpu_dai = &priv->dais[li->dais++];
~~~~~~~~~ ^
sound/soc/generic/audio-graph-card.c:396:13: error: no member named 'codec_dai' in 'struct simple_dai_props'
dai_props->codec_dai = &priv->dais[li->dais++];
~~~~~~~~~ ^
4 errors generated.
vim +265 sound/soc/generic/audio-graph-card.c
4346a745df4107d Kuninori Morimoto 2019-03-18 211
e59289cda8dec01 Kuninori Morimoto 2019-03-20 212 static int graph_dai_link_of_dpcm(struct asoc_simple_priv *priv,
56eb818191fbe4b Kuninori Morimoto 2018-12-14 213 struct device_node *cpu_ep,
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 214 struct device_node *codec_ep,
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 215 struct link_info *li,
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 216 int dup_codec)
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 217 {
e59289cda8dec01 Kuninori Morimoto 2019-03-20 218 struct device *dev = simple_priv_to_dev(priv);
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 219 struct snd_soc_card *card = simple_priv_to_card(priv);
e59289cda8dec01 Kuninori Morimoto 2019-03-20 220 struct snd_soc_dai_link *dai_link = simple_priv_to_link(priv, li->link);
e59289cda8dec01 Kuninori Morimoto 2019-03-20 221 struct simple_dai_props *dai_props = simple_priv_to_props(priv, li->link);
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 222 struct device_node *top = dev->of_node;
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 223 struct device_node *ep = li->cpu ? cpu_ep : codec_ep;
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 224 struct device_node *port;
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 225 struct device_node *ports;
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 226 struct device_node *node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 227 struct asoc_simple_dai *dai;
f107294c6422e77 Kuninori Morimoto 2019-06-06 228 struct snd_soc_dai_link_component *cpus = dai_link->cpus;
66164a4da30dd29 Kuninori Morimoto 2018-12-14 229 struct snd_soc_dai_link_component *codecs = dai_link->codecs;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 230 int ret;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 231
ca2f809d131fdfc Sameer Pujar 2020-11-02 232 /*
ca2f809d131fdfc Sameer Pujar 2020-11-02 233 * Codec endpoint can be NULL for pluggable audio HW.
ca2f809d131fdfc Sameer Pujar 2020-11-02 234 * Platform DT can populate the Codec endpoint depending on the
ca2f809d131fdfc Sameer Pujar 2020-11-02 235 * plugged HW.
ca2f809d131fdfc Sameer Pujar 2020-11-02 236 */
ca2f809d131fdfc Sameer Pujar 2020-11-02 237 if (!li->cpu && !codec_ep)
ca2f809d131fdfc Sameer Pujar 2020-11-02 238 return 0;
ca2f809d131fdfc Sameer Pujar 2020-11-02 239
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 240 /* Do it all CPU endpoint, and 1st Codec endpoint */
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 241 if (!li->cpu && dup_codec)
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 242 return 0;
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 243
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 244 port = of_get_parent(ep);
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 245 ports = of_get_parent(port);
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 246 node = of_graph_get_port_parent(ep);
dd98fbc558a0357 Kuninori Morimoto 2018-12-20 247
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 248 li->link++;
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 249
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 250 dev_dbg(dev, "link_of DPCM (%pOF)\n", ep);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 251
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 252 if (li->cpu) {
8f7f298a333761a Kuninori Morimoto 2019-03-20 253 int is_single_links = 0;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 254
9764beeae7cc477 Kuninori Morimoto 2019-10-15 255 /* Codec is dummy */
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 256 codecs->of_node = NULL;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 257 codecs->dai_name = "snd-soc-dummy-dai";
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 258 codecs->name = "snd-soc-dummy";
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 259
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 260 /* FE settings */
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 261 dai_link->dynamic = 1;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 262 dai_link->dpcm_merged_format = 1;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 263
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 264 dai =
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 @265 dai_props->cpu_dai = &priv->dais[li->dais++];
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 266
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 267 ret = asoc_simple_parse_cpu(ep, dai_link, &is_single_links);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 268 if (ret)
aa2e362cb6b3f5c Wen Yang 2019-07-10 269 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 270
22ad805d527057b Kuninori Morimoto 2020-11-09 271 ret = asoc_simple_parse_clk_cpu(dev, ep, dai_link, dai_props, 0);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 272 if (ret < 0)
aa2e362cb6b3f5c Wen Yang 2019-07-10 273 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 274
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 275 ret = asoc_simple_set_dailink_name(dev, dai_link,
7cdd350b6a98ce0 Sameer Pujar 2020-11-02 276 "fe.%pOFP.%s",
7cdd350b6a98ce0 Sameer Pujar 2020-11-02 277 cpus->of_node,
f107294c6422e77 Kuninori Morimoto 2019-06-06 278 cpus->dai_name);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 279 if (ret < 0)
aa2e362cb6b3f5c Wen Yang 2019-07-10 280 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 281
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 282 /*
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 283 * In BE<->BE connections it is not required to create
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 284 * PCM devices at CPU end of the dai link and thus 'no_pcm'
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 285 * flag needs to be set. It is useful when there are many
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 286 * BE components and some of these have to be connected to
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 287 * form a valid audio path.
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 288 *
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 289 * For example: FE <-> BE1 <-> BE2 <-> ... <-> BEn where
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 290 * there are 'n' BE components in the path.
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 291 */
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 292 if (card->component_chaining && !soc_component_is_pcm(cpus))
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 293 dai_link->no_pcm = 1;
77e9dd1b66a49b8 Sameer Pujar 2020-11-02 294
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 295 /* card->num_links includes Codec */
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 296 asoc_simple_canonicalize_cpu(dai_link, is_single_links);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 297 } else {
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 298 struct snd_soc_codec_conf *cconf;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 299
9764beeae7cc477 Kuninori Morimoto 2019-10-15 300 /* CPU is dummy */
f107294c6422e77 Kuninori Morimoto 2019-06-06 301 cpus->of_node = NULL;
f107294c6422e77 Kuninori Morimoto 2019-06-06 302 cpus->dai_name = "snd-soc-dummy-dai";
f107294c6422e77 Kuninori Morimoto 2019-06-06 303 cpus->name = "snd-soc-dummy";
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 304
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 305 /* BE settings */
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 306 dai_link->no_pcm = 1;
629f75440a68220 Kuninori Morimoto 2019-03-20 307 dai_link->be_hw_params_fixup = asoc_simple_be_hw_params_fixup;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 308
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 309 dai =
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 @310 dai_props->codec_dai = &priv->dais[li->dais++];
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 311
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 312 cconf =
1e4771a62fd7a6b Kuninori Morimoto 2018-12-20 313 dai_props->codec_conf = &priv->codec_conf[li->conf++];
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 314
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 315 ret = asoc_simple_parse_codec(ep, dai_link);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 316 if (ret < 0)
aa2e362cb6b3f5c Wen Yang 2019-07-10 317 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 318
22ad805d527057b Kuninori Morimoto 2020-11-09 319 ret = asoc_simple_parse_clk_codec(dev, ep, dai_link, dai_props, 0);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 320 if (ret < 0)
aa2e362cb6b3f5c Wen Yang 2019-07-10 321 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 322
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 323 ret = asoc_simple_set_dailink_name(dev, dai_link,
7cdd350b6a98ce0 Sameer Pujar 2020-11-02 324 "be.%pOFP.%s",
7cdd350b6a98ce0 Sameer Pujar 2020-11-02 325 codecs->of_node,
66164a4da30dd29 Kuninori Morimoto 2018-12-14 326 codecs->dai_name);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 327 if (ret < 0)
aa2e362cb6b3f5c Wen Yang 2019-07-10 328 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 329
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 330 /* check "prefix" from top node */
66164a4da30dd29 Kuninori Morimoto 2018-12-14 331 snd_soc_of_parse_node_prefix(top, cconf, codecs->of_node,
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 332 "prefix");
66164a4da30dd29 Kuninori Morimoto 2018-12-14 333 snd_soc_of_parse_node_prefix(node, cconf, codecs->of_node,
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 334 PREFIX "prefix");
66164a4da30dd29 Kuninori Morimoto 2018-12-14 335 snd_soc_of_parse_node_prefix(ports, cconf, codecs->of_node,
66164a4da30dd29 Kuninori Morimoto 2018-12-14 336 "prefix");
66164a4da30dd29 Kuninori Morimoto 2018-12-14 337 snd_soc_of_parse_node_prefix(port, cconf, codecs->of_node,
66164a4da30dd29 Kuninori Morimoto 2018-12-14 338 "prefix");
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 339 }
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 340
4346a745df4107d Kuninori Morimoto 2019-03-18 341 graph_parse_convert(dev, ep, &dai_props->adata);
4346a745df4107d Kuninori Morimoto 2019-03-18 342 graph_parse_mclk_fs(top, ep, dai_props);
4346a745df4107d Kuninori Morimoto 2019-03-18 343
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 344 asoc_simple_canonicalize_platform(dai_link);
fe7ed4dec2e6289 Kuninori Morimoto 2019-01-21 345
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 346 ret = asoc_simple_parse_tdm(ep, dai);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 347 if (ret)
aa2e362cb6b3f5c Wen Yang 2019-07-10 348 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 349
ad11e59f52d6fc7 Kuninori Morimoto 2019-03-20 350 ret = asoc_simple_parse_daifmt(dev, cpu_ep, codec_ep,
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 351 NULL, &dai_link->dai_fmt);
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 352 if (ret < 0)
aa2e362cb6b3f5c Wen Yang 2019-07-10 353 goto out_put_node;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 354
25612477d20b522 Pierre-Louis Bossart 2020-07-07 355 snd_soc_dai_link_set_capabilities(dai_link);
25612477d20b522 Pierre-Louis Bossart 2020-07-07 356
97fe6ca4146583d Kuninori Morimoto 2018-12-20 357 dai_link->ops = &graph_ops;
ec44b99a0aeb61e Sameer Pujar 2020-11-02 358
ec44b99a0aeb61e Sameer Pujar 2020-11-02 359 /* Use custom snd_soc_ops callbacks if available */
ec44b99a0aeb61e Sameer Pujar 2020-11-02 360 if (priv->ops)
ec44b99a0aeb61e Sameer Pujar 2020-11-02 361 dai_link->ops = priv->ops;
ec44b99a0aeb61e Sameer Pujar 2020-11-02 362
ad934ca80108434 Kuninori Morimoto 2019-03-20 363 dai_link->init = asoc_simple_dai_init;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 364
aa2e362cb6b3f5c Wen Yang 2019-07-10 365 out_put_node:
aa2e362cb6b3f5c Wen Yang 2019-07-10 366 of_node_put(ports);
aa2e362cb6b3f5c Wen Yang 2019-07-10 367 of_node_put(port);
aa2e362cb6b3f5c Wen Yang 2019-07-10 368 of_node_put(node);
aa2e362cb6b3f5c Wen Yang 2019-07-10 369 return ret;
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 370 }
ae3cb5790906b5c Kuninori Morimoto 2018-12-14 371
:::::: The code at line 265 was first introduced by commit
:::::: 1e4771a62fd7a6bab058529c450d3d87a8bd5b1a ASoC: audio-graph-card: add link_info
:::::: TO: Kuninori Morimoto <kuninori.morimoto.gx(a)renesas.com>
:::::: CC: Mark Brown <broonie(a)kernel.org>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0
[dynticks:rcu/nocb-toggle-v4 19/19] kernel/rcu/tree_plugin.h:71:40: error: implicit declaration of function 'lockdep_is_cpus_held'; did you mean
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks.git rcu/nocb-toggle-v4
head: 579e15efa48fb6fc4ecf14961804051f385807fe
commit: 579e15efa48fb6fc4ecf14961804051f385807fe [19/19] rcu/nocb: Detect unsafe checks for offloaded rdp
config: c6x-randconfig-r022-20201113 (attached as .config)
compiler: c6x-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks.g...
git remote add dynticks https://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks.git
git fetch --no-tags dynticks rcu/nocb-toggle-v4
git checkout 579e15efa48fb6fc4ecf14961804051f385807fe
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=c6x
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
In file included from include/linux/rcupdate_wait.h:9,
from kernel/rcu/tree.c:25:
kernel/rcu/tree_plugin.h: In function 'rcu_rdp_is_offloaded':
>> kernel/rcu/tree_plugin.h:71:40: error: implicit declaration of function 'lockdep_is_cpus_held'; did you mean 'lockdep_assert_cpus_held'? [-Werror=implicit-function-declaration]
71 | (IS_ENABLED(CONFIG_HOTPLUG_CPU) && lockdep_is_cpus_held()) ||
| ^~~~~~~~~~~~~~~~~~~~
include/linux/rcupdate.h:335:52: note: in definition of macro 'RCU_LOCKDEP_WARN'
335 | #define RCU_LOCKDEP_WARN(c, s) do { } while (0 && (c))
| ^
cc1: some warnings being treated as errors
vim +71 kernel/rcu/tree_plugin.h
57
58 static bool rcu_rdp_is_offloaded(struct rcu_data *rdp)
59 {
60 /*
61 * In order to read the offloaded state of an rdp is a safe
62 * and stable way and prevent from its value to be changed
63 * under us, we must either hold the barrier mutex, the cpu
64 * hotplug lock (read or write) or the nocb lock. Local
65 * non-preemptible reads are also safe. NOCB kthreads and
66 * timers have their own means of synchronization against the
67 * offloaded state updaters.
68 */
69 RCU_LOCKDEP_WARN(
70 !(lockdep_is_held(&rcu_state.barrier_mutex) ||
> 71 (IS_ENABLED(CONFIG_HOTPLUG_CPU) && lockdep_is_cpus_held()) ||
72 rcu_lockdep_is_held_nocb(rdp) ||
73 (rdp == this_cpu_ptr(&rcu_data) &&
74 !(IS_ENABLED(CONFIG_PREEMPT_COUNT) && preemptible())) ||
75 rcu_current_is_nocb_kthread(rdp) ||
76 rcu_running_nocb_timer(rdp)),
77 "Unsafe read of RCU_NOCB offloaded state"
78 );
79
80 return rcu_segcblist_is_offloaded(&rdp->cblist);
81 }
82
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0
Re: [PATCH 2/2] uio: pruss: use devm_clk_get() for clk init
by kernel test robot
Hi Alexandru,
I love your patch! Perhaps something to improve:
[auto build test WARNING on char-misc/char-misc-testing]
[also build test WARNING on linus/master linux/master v5.10-rc3 next-20201113]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Alexandru-Ardelean/uio-pruss-mov...
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git 1987f112f1425cba2671d878f6952087e9456a0a
config: riscv-randconfig-r003-20201111 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 874b0a0b9db93f5d3350ffe6b5efda2d908415d0)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://github.com/0day-ci/linux/commit/37416440d4299a08c6f1a2dc448f7e924...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Alexandru-Ardelean/uio-pruss-move-simple-allocations-to-dem_-equivalents/20201111-192014
git checkout 37416440d4299a08c6f1a2dc448f7e9249f303ad
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> drivers/uio/uio_pruss.c:136:10: warning: variable 'ret' is uninitialized when used here [-Wuninitialized]
return ret;
^~~
drivers/uio/uio_pruss.c:121:9: note: initialize the variable 'ret' to silence this warning
int ret, cnt, i, len;
^
= 0
1 warning generated.
vim +/ret +136 drivers/uio/uio_pruss.c
114
115 static int pruss_probe(struct platform_device *pdev)
116 {
117 struct uio_info *p;
118 struct uio_pruss_dev *gdev;
119 struct resource *regs_prussio;
120 struct device *dev = &pdev->dev;
121 int ret, cnt, i, len;
122 struct uio_pruss_pdata *pdata = dev_get_platdata(dev);
123
124 gdev = devm_kzalloc(dev, sizeof(struct uio_pruss_dev), GFP_KERNEL);
125 if (!gdev)
126 return -ENOMEM;
127
128 gdev->info = devm_kcalloc(dev, MAX_PRUSS_EVT, sizeof(*p), GFP_KERNEL);
129 if (!gdev->info)
130 return -ENOMEM;
131
132 /* Power on PRU in case its not done as part of boot-loader */
133 gdev->pruss_clk = devm_clk_get(dev, "pruss");
134 if (IS_ERR(gdev->pruss_clk)) {
135 dev_err(dev, "Failed to get clock\n");
> 136 return ret;
137 }
138
139 ret = clk_enable(gdev->pruss_clk);
140 if (ret) {
141 dev_err(dev, "Failed to enable clock\n");
142 return ret;
143 }
144
145 regs_prussio = platform_get_resource(pdev, IORESOURCE_MEM, 0);
146 if (!regs_prussio) {
147 dev_err(dev, "No PRUSS I/O resource specified\n");
148 ret = -EIO;
149 goto err_clk_disable;
150 }
151
152 if (!regs_prussio->start) {
153 dev_err(dev, "Invalid memory resource\n");
154 ret = -EIO;
155 goto err_clk_disable;
156 }
157
158 if (pdata->sram_pool) {
159 gdev->sram_pool = pdata->sram_pool;
160 gdev->sram_vaddr =
161 (unsigned long)gen_pool_dma_alloc(gdev->sram_pool,
162 sram_pool_sz, &gdev->sram_paddr);
163 if (!gdev->sram_vaddr) {
164 dev_err(dev, "Could not allocate SRAM pool\n");
165 ret = -ENOMEM;
166 goto err_clk_disable;
167 }
168 }
169
170 gdev->ddr_vaddr = dma_alloc_coherent(dev, extram_pool_sz,
171 &(gdev->ddr_paddr), GFP_KERNEL | GFP_DMA);
172 if (!gdev->ddr_vaddr) {
173 dev_err(dev, "Could not allocate external memory\n");
174 ret = -ENOMEM;
175 goto err_free_sram;
176 }
177
178 len = resource_size(regs_prussio);
179 gdev->prussio_vaddr = ioremap(regs_prussio->start, len);
180 if (!gdev->prussio_vaddr) {
181 dev_err(dev, "Can't remap PRUSS I/O address range\n");
182 ret = -ENOMEM;
183 goto err_free_ddr_vaddr;
184 }
185
186 gdev->pintc_base = pdata->pintc_base;
187 gdev->hostirq_start = platform_get_irq(pdev, 0);
188
189 for (cnt = 0, p = gdev->info; cnt < MAX_PRUSS_EVT; cnt++, p++) {
190 p->mem[0].addr = regs_prussio->start;
191 p->mem[0].size = resource_size(regs_prussio);
192 p->mem[0].memtype = UIO_MEM_PHYS;
193
194 p->mem[1].addr = gdev->sram_paddr;
195 p->mem[1].size = sram_pool_sz;
196 p->mem[1].memtype = UIO_MEM_PHYS;
197
198 p->mem[2].addr = gdev->ddr_paddr;
199 p->mem[2].size = extram_pool_sz;
200 p->mem[2].memtype = UIO_MEM_PHYS;
201
202 p->name = devm_kasprintf(dev, GFP_KERNEL, "pruss_evt%d", cnt);
203 p->version = DRV_VERSION;
204
205 /* Register PRUSS IRQ lines */
206 p->irq = gdev->hostirq_start + cnt;
207 p->handler = pruss_handler;
208 p->priv = gdev;
209
210 ret = uio_register_device(dev, p);
211 if (ret < 0)
212 goto err_unloop;
213 }
214
215 platform_set_drvdata(pdev, gdev);
216 return 0;
217
218 err_unloop:
219 for (i = 0, p = gdev->info; i < cnt; i++, p++) {
220 uio_unregister_device(p);
221 }
222 iounmap(gdev->prussio_vaddr);
223 err_free_ddr_vaddr:
224 dma_free_coherent(dev, extram_pool_sz, gdev->ddr_vaddr,
225 gdev->ddr_paddr);
226 err_free_sram:
227 if (pdata->sram_pool)
228 gen_pool_free(gdev->sram_pool, gdev->sram_vaddr, sram_pool_sz);
229 err_clk_disable:
230 clk_disable(gdev->pruss_clk);
231
232 return ret;
233 }
234
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 10 months
- 1
- 0