Re: [PATCH v5 2/2] Add Intel LGM soc DMA support.
by kernel test robot
Hi Amireddy,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on vkoul-dmaengine/next]
[also build test WARNING on v5.8 next-20200814]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Amireddy-Mallikarjuna-reddy/Add-...
base: https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: nios2-allyesconfig (attached as .config)
compiler: nios2-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=nios2
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> drivers/dma/lgm/lgm-dma.c:1570:5: warning: no previous prototype for 'update_client_configs' [-Wmissing-prototypes]
1570 | int update_client_configs(struct of_dma *ofdma, struct of_phandle_args *spec)
| ^~~~~~~~~~~~~~~~~~~~~
vim +/update_client_configs +1570 drivers/dma/lgm/lgm-dma.c
1569
> 1570 int update_client_configs(struct of_dma *ofdma, struct of_phandle_args *spec)
1571 {
1572 struct ldma_dev *d = ofdma->of_dma_data;
1573 struct ldma_port *p;
1574 struct ldma_chan *c;
1575 u32 chan_id = spec->args[0];
1576 u32 port_id = spec->args[1];
1577
1578 if (chan_id >= d->chan_nrs || port_id >= d->port_nrs)
1579 return 0;
1580
1581 p = &d->ports[port_id];
1582 c = &d->chans[chan_id];
1583
1584 if (d->ver == DMA_VER22) {
1585 u32 burst = spec->args[2];
1586
1587 if (burst != 2 && burst != 4 && burst != 8)
1588 return 0;
1589
1590 /* TX and RX has the same burst length */
1591 p->txbl = ilog2(burst);
1592 p->rxbl = p->txbl;
1593
1594 ldma_port_cfg(p);
1595 } else {
1596 if (spec->args[2] > 0 && spec->args[2] <= DMA_ENDIAN_TYPE3) {
1597 c->data_endian = spec->args[2];
1598 c->data_endian_en = true;
1599 }
1600
1601 if (spec->args[3] > 0 && spec->args[3] <= DMA_ENDIAN_TYPE3) {
1602 c->desc_endian = spec->args[3];
1603 c->desc_endian_en = true;
1604 }
1605
1606 if (spec->args[4] > 0 && spec->args[4] < 128)
1607 c->boff_len = spec->args[4];
1608
1609 if (spec->args[5])
1610 c->desc_rx_np = true;
1611
1612 /*
1613 * If channel packet drop enabled, port packet drop should
1614 * be enabled
1615 */
1616 if (spec->args[6]) {
1617 c->pden = true;
1618 p->pkt_drop = DMA_PKT_DROP_EN;
1619 }
1620 ldma_port_cfg(p);
1621 ldma_chan_cfg(c);
1622 }
1623
1624 return 1;
1625 }
1626
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
fs/btrfs/raid56.c:1255 finish_rmw() error: uninitialized symbol 'has_qstripe'.
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: a1d21081a60dfb7fddf4a38b66d9cef603b317a9
commit: c17af96554a8a8777cbb0fd53b8497250e548b43 btrfs: raid56: simplify tracking of Q stripe presence
date: 5 months ago
config: ia64-randconfig-m031-20200811 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
New smatch warnings:
fs/btrfs/raid56.c:1255 finish_rmw() error: uninitialized symbol 'has_qstripe'.
fs/btrfs/raid56.c:2390 finish_parity_scrub() error: uninitialized symbol 'has_qstripe'.
Old smatch warnings:
fs/btrfs/raid56.c:2431 finish_parity_scrub() error: memcmp() 'parity' too small (4096 vs 16384)
vim +/has_qstripe +1255 fs/btrfs/raid56.c
1183
1184 /*
1185 * this is called from one of two situations. We either
1186 * have a full stripe from the higher layers, or we've read all
1187 * the missing bits off disk.
1188 *
1189 * This will calculate the parity and then send down any
1190 * changed blocks.
1191 */
1192 static noinline void finish_rmw(struct btrfs_raid_bio *rbio)
1193 {
1194 struct btrfs_bio *bbio = rbio->bbio;
1195 void **pointers = rbio->finish_pointers;
1196 int nr_data = rbio->nr_data;
1197 int stripe;
1198 int pagenr;
1199 bool has_qstripe;
1200 struct bio_list bio_list;
1201 struct bio *bio;
1202 int ret;
1203
1204 bio_list_init(&bio_list);
1205
1206 if (rbio->real_stripes - rbio->nr_data == 1)
1207 has_qstripe = false;
1208 else if (rbio->real_stripes - rbio->nr_data == 2)
1209 has_qstripe = true;
1210 else
1211 BUG();
1212
1213 /* at this point we either have a full stripe,
1214 * or we've read the full stripe from the drive.
1215 * recalculate the parity and write the new results.
1216 *
1217 * We're not allowed to add any new bios to the
1218 * bio list here, anyone else that wants to
1219 * change this stripe needs to do their own rmw.
1220 */
1221 spin_lock_irq(&rbio->bio_list_lock);
1222 set_bit(RBIO_RMW_LOCKED_BIT, &rbio->flags);
1223 spin_unlock_irq(&rbio->bio_list_lock);
1224
1225 atomic_set(&rbio->error, 0);
1226
1227 /*
1228 * now that we've set rmw_locked, run through the
1229 * bio list one last time and map the page pointers
1230 *
1231 * We don't cache full rbios because we're assuming
1232 * the higher layers are unlikely to use this area of
1233 * the disk again soon. If they do use it again,
1234 * hopefully they will send another full bio.
1235 */
1236 index_rbio_pages(rbio);
1237 if (!rbio_is_full(rbio))
1238 cache_rbio_pages(rbio);
1239 else
1240 clear_bit(RBIO_CACHE_READY_BIT, &rbio->flags);
1241
1242 for (pagenr = 0; pagenr < rbio->stripe_npages; pagenr++) {
1243 struct page *p;
1244 /* first collect one page from each data stripe */
1245 for (stripe = 0; stripe < nr_data; stripe++) {
1246 p = page_in_rbio(rbio, stripe, pagenr, 0);
1247 pointers[stripe] = kmap(p);
1248 }
1249
1250 /* then add the parity stripe */
1251 p = rbio_pstripe_page(rbio, pagenr);
1252 SetPageUptodate(p);
1253 pointers[stripe++] = kmap(p);
1254
> 1255 if (has_qstripe) {
1256
1257 /*
1258 * raid6, add the qstripe and call the
1259 * library function to fill in our p/q
1260 */
1261 p = rbio_qstripe_page(rbio, pagenr);
1262 SetPageUptodate(p);
1263 pointers[stripe++] = kmap(p);
1264
1265 raid6_call.gen_syndrome(rbio->real_stripes, PAGE_SIZE,
1266 pointers);
1267 } else {
1268 /* raid5 */
1269 copy_page(pointers[nr_data], pointers[0]);
1270 run_xor(pointers + 1, nr_data - 1, PAGE_SIZE);
1271 }
1272
1273
1274 for (stripe = 0; stripe < rbio->real_stripes; stripe++)
1275 kunmap(page_in_rbio(rbio, stripe, pagenr, 0));
1276 }
1277
1278 /*
1279 * time to start writing. Make bios for everything from the
1280 * higher layers (the bio_list in our rbio) and our p/q. Ignore
1281 * everything else.
1282 */
1283 for (stripe = 0; stripe < rbio->real_stripes; stripe++) {
1284 for (pagenr = 0; pagenr < rbio->stripe_npages; pagenr++) {
1285 struct page *page;
1286 if (stripe < rbio->nr_data) {
1287 page = page_in_rbio(rbio, stripe, pagenr, 1);
1288 if (!page)
1289 continue;
1290 } else {
1291 page = rbio_stripe_page(rbio, stripe, pagenr);
1292 }
1293
1294 ret = rbio_add_io_page(rbio, &bio_list,
1295 page, stripe, pagenr, rbio->stripe_len);
1296 if (ret)
1297 goto cleanup;
1298 }
1299 }
1300
1301 if (likely(!bbio->num_tgtdevs))
1302 goto write_data;
1303
1304 for (stripe = 0; stripe < rbio->real_stripes; stripe++) {
1305 if (!bbio->tgtdev_map[stripe])
1306 continue;
1307
1308 for (pagenr = 0; pagenr < rbio->stripe_npages; pagenr++) {
1309 struct page *page;
1310 if (stripe < rbio->nr_data) {
1311 page = page_in_rbio(rbio, stripe, pagenr, 1);
1312 if (!page)
1313 continue;
1314 } else {
1315 page = rbio_stripe_page(rbio, stripe, pagenr);
1316 }
1317
1318 ret = rbio_add_io_page(rbio, &bio_list, page,
1319 rbio->bbio->tgtdev_map[stripe],
1320 pagenr, rbio->stripe_len);
1321 if (ret)
1322 goto cleanup;
1323 }
1324 }
1325
1326 write_data:
1327 atomic_set(&rbio->stripes_pending, bio_list_size(&bio_list));
1328 BUG_ON(atomic_read(&rbio->stripes_pending) == 0);
1329
1330 while (1) {
1331 bio = bio_list_pop(&bio_list);
1332 if (!bio)
1333 break;
1334
1335 bio->bi_private = rbio;
1336 bio->bi_end_io = raid_write_end_io;
1337 bio->bi_opf = REQ_OP_WRITE;
1338
1339 submit_bio(bio);
1340 }
1341 return;
1342
1343 cleanup:
1344 rbio_orig_end_io(rbio, BLK_STS_IOERR);
1345
1346 while ((bio = bio_list_pop(&bio_list)))
1347 bio_put(bio);
1348 }
1349
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
Re: [PATCH] powerpc: Add POWER10 raw mode cputable entry
by kernel test robot
Hi Madhavan,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v5.8 next-20200814]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Madhavan-Srinivasan/powerpc-Add-...
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-defconfig (attached as .config)
compiler: powerpc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> arch/powerpc/kernel/cputable.c:561:26: error: '__machine_check_early_realmode_p10' undeclared here (not in a function); did you mean '__machine_check_early_realmode_p9'?
561 | .machine_check_early = __machine_check_early_realmode_p10,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| __machine_check_early_realmode_p9
vim +561 arch/powerpc/kernel/cputable.c
136
137 static struct cpu_spec __initdata cpu_specs[] = {
138 #ifdef CONFIG_PPC_BOOK3S_64
139 { /* PPC970 */
140 .pvr_mask = 0xffff0000,
141 .pvr_value = 0x00390000,
142 .cpu_name = "PPC970",
143 .cpu_features = CPU_FTRS_PPC970,
144 .cpu_user_features = COMMON_USER_POWER4 |
145 PPC_FEATURE_HAS_ALTIVEC_COMP,
146 .mmu_features = MMU_FTRS_PPC970,
147 .icache_bsize = 128,
148 .dcache_bsize = 128,
149 .num_pmcs = 8,
150 .pmc_type = PPC_PMC_IBM,
151 .cpu_setup = __setup_cpu_ppc970,
152 .cpu_restore = __restore_cpu_ppc970,
153 .oprofile_cpu_type = "ppc64/970",
154 .oprofile_type = PPC_OPROFILE_POWER4,
155 .platform = "ppc970",
156 },
157 { /* PPC970FX */
158 .pvr_mask = 0xffff0000,
159 .pvr_value = 0x003c0000,
160 .cpu_name = "PPC970FX",
161 .cpu_features = CPU_FTRS_PPC970,
162 .cpu_user_features = COMMON_USER_POWER4 |
163 PPC_FEATURE_HAS_ALTIVEC_COMP,
164 .mmu_features = MMU_FTRS_PPC970,
165 .icache_bsize = 128,
166 .dcache_bsize = 128,
167 .num_pmcs = 8,
168 .pmc_type = PPC_PMC_IBM,
169 .cpu_setup = __setup_cpu_ppc970,
170 .cpu_restore = __restore_cpu_ppc970,
171 .oprofile_cpu_type = "ppc64/970",
172 .oprofile_type = PPC_OPROFILE_POWER4,
173 .platform = "ppc970",
174 },
175 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
176 .pvr_mask = 0xffffffff,
177 .pvr_value = 0x00440100,
178 .cpu_name = "PPC970MP",
179 .cpu_features = CPU_FTRS_PPC970,
180 .cpu_user_features = COMMON_USER_POWER4 |
181 PPC_FEATURE_HAS_ALTIVEC_COMP,
182 .mmu_features = MMU_FTRS_PPC970,
183 .icache_bsize = 128,
184 .dcache_bsize = 128,
185 .num_pmcs = 8,
186 .pmc_type = PPC_PMC_IBM,
187 .cpu_setup = __setup_cpu_ppc970,
188 .cpu_restore = __restore_cpu_ppc970,
189 .oprofile_cpu_type = "ppc64/970MP",
190 .oprofile_type = PPC_OPROFILE_POWER4,
191 .platform = "ppc970",
192 },
193 { /* PPC970MP */
194 .pvr_mask = 0xffff0000,
195 .pvr_value = 0x00440000,
196 .cpu_name = "PPC970MP",
197 .cpu_features = CPU_FTRS_PPC970,
198 .cpu_user_features = COMMON_USER_POWER4 |
199 PPC_FEATURE_HAS_ALTIVEC_COMP,
200 .mmu_features = MMU_FTRS_PPC970,
201 .icache_bsize = 128,
202 .dcache_bsize = 128,
203 .num_pmcs = 8,
204 .pmc_type = PPC_PMC_IBM,
205 .cpu_setup = __setup_cpu_ppc970MP,
206 .cpu_restore = __restore_cpu_ppc970,
207 .oprofile_cpu_type = "ppc64/970MP",
208 .oprofile_type = PPC_OPROFILE_POWER4,
209 .platform = "ppc970",
210 },
211 { /* PPC970GX */
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x00450000,
214 .cpu_name = "PPC970GX",
215 .cpu_features = CPU_FTRS_PPC970,
216 .cpu_user_features = COMMON_USER_POWER4 |
217 PPC_FEATURE_HAS_ALTIVEC_COMP,
218 .mmu_features = MMU_FTRS_PPC970,
219 .icache_bsize = 128,
220 .dcache_bsize = 128,
221 .num_pmcs = 8,
222 .pmc_type = PPC_PMC_IBM,
223 .cpu_setup = __setup_cpu_ppc970,
224 .oprofile_cpu_type = "ppc64/970",
225 .oprofile_type = PPC_OPROFILE_POWER4,
226 .platform = "ppc970",
227 },
228 { /* Power5 GR */
229 .pvr_mask = 0xffff0000,
230 .pvr_value = 0x003a0000,
231 .cpu_name = "POWER5 (gr)",
232 .cpu_features = CPU_FTRS_POWER5,
233 .cpu_user_features = COMMON_USER_POWER5,
234 .mmu_features = MMU_FTRS_POWER5,
235 .icache_bsize = 128,
236 .dcache_bsize = 128,
237 .num_pmcs = 6,
238 .pmc_type = PPC_PMC_IBM,
239 .oprofile_cpu_type = "ppc64/power5",
240 .oprofile_type = PPC_OPROFILE_POWER4,
241 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
242 * and above but only works on POWER5 and above
243 */
244 .oprofile_mmcra_sihv = MMCRA_SIHV,
245 .oprofile_mmcra_sipr = MMCRA_SIPR,
246 .platform = "power5",
247 },
248 { /* Power5++ */
249 .pvr_mask = 0xffffff00,
250 .pvr_value = 0x003b0300,
251 .cpu_name = "POWER5+ (gs)",
252 .cpu_features = CPU_FTRS_POWER5,
253 .cpu_user_features = COMMON_USER_POWER5_PLUS,
254 .mmu_features = MMU_FTRS_POWER5,
255 .icache_bsize = 128,
256 .dcache_bsize = 128,
257 .num_pmcs = 6,
258 .oprofile_cpu_type = "ppc64/power5++",
259 .oprofile_type = PPC_OPROFILE_POWER4,
260 .oprofile_mmcra_sihv = MMCRA_SIHV,
261 .oprofile_mmcra_sipr = MMCRA_SIPR,
262 .platform = "power5+",
263 },
264 { /* Power5 GS */
265 .pvr_mask = 0xffff0000,
266 .pvr_value = 0x003b0000,
267 .cpu_name = "POWER5+ (gs)",
268 .cpu_features = CPU_FTRS_POWER5,
269 .cpu_user_features = COMMON_USER_POWER5_PLUS,
270 .mmu_features = MMU_FTRS_POWER5,
271 .icache_bsize = 128,
272 .dcache_bsize = 128,
273 .num_pmcs = 6,
274 .pmc_type = PPC_PMC_IBM,
275 .oprofile_cpu_type = "ppc64/power5+",
276 .oprofile_type = PPC_OPROFILE_POWER4,
277 .oprofile_mmcra_sihv = MMCRA_SIHV,
278 .oprofile_mmcra_sipr = MMCRA_SIPR,
279 .platform = "power5+",
280 },
281 { /* POWER6 in P5+ mode; 2.04-compliant processor */
282 .pvr_mask = 0xffffffff,
283 .pvr_value = 0x0f000001,
284 .cpu_name = "POWER5+",
285 .cpu_features = CPU_FTRS_POWER5,
286 .cpu_user_features = COMMON_USER_POWER5_PLUS,
287 .mmu_features = MMU_FTRS_POWER5,
288 .icache_bsize = 128,
289 .dcache_bsize = 128,
290 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
291 .oprofile_type = PPC_OPROFILE_POWER4,
292 .platform = "power5+",
293 },
294 { /* Power6 */
295 .pvr_mask = 0xffff0000,
296 .pvr_value = 0x003e0000,
297 .cpu_name = "POWER6 (raw)",
298 .cpu_features = CPU_FTRS_POWER6,
299 .cpu_user_features = COMMON_USER_POWER6 |
300 PPC_FEATURE_POWER6_EXT,
301 .mmu_features = MMU_FTRS_POWER6,
302 .icache_bsize = 128,
303 .dcache_bsize = 128,
304 .num_pmcs = 6,
305 .pmc_type = PPC_PMC_IBM,
306 .oprofile_cpu_type = "ppc64/power6",
307 .oprofile_type = PPC_OPROFILE_POWER4,
308 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
309 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
310 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
311 POWER6_MMCRA_OTHER,
312 .platform = "power6x",
313 },
314 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
315 .pvr_mask = 0xffffffff,
316 .pvr_value = 0x0f000002,
317 .cpu_name = "POWER6 (architected)",
318 .cpu_features = CPU_FTRS_POWER6,
319 .cpu_user_features = COMMON_USER_POWER6,
320 .mmu_features = MMU_FTRS_POWER6,
321 .icache_bsize = 128,
322 .dcache_bsize = 128,
323 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
324 .oprofile_type = PPC_OPROFILE_POWER4,
325 .platform = "power6",
326 },
327 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
328 .pvr_mask = 0xffffffff,
329 .pvr_value = 0x0f000003,
330 .cpu_name = "POWER7 (architected)",
331 .cpu_features = CPU_FTRS_POWER7,
332 .cpu_user_features = COMMON_USER_POWER7,
333 .cpu_user_features2 = COMMON_USER2_POWER7,
334 .mmu_features = MMU_FTRS_POWER7,
335 .icache_bsize = 128,
336 .dcache_bsize = 128,
337 .oprofile_type = PPC_OPROFILE_POWER4,
338 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
339 .cpu_setup = __setup_cpu_power7,
340 .cpu_restore = __restore_cpu_power7,
341 .machine_check_early = __machine_check_early_realmode_p7,
342 .platform = "power7",
343 },
344 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
345 .pvr_mask = 0xffffffff,
346 .pvr_value = 0x0f000004,
347 .cpu_name = "POWER8 (architected)",
348 .cpu_features = CPU_FTRS_POWER8,
349 .cpu_user_features = COMMON_USER_POWER8,
350 .cpu_user_features2 = COMMON_USER2_POWER8,
351 .mmu_features = MMU_FTRS_POWER8,
352 .icache_bsize = 128,
353 .dcache_bsize = 128,
354 .oprofile_type = PPC_OPROFILE_INVALID,
355 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
356 .cpu_setup = __setup_cpu_power8,
357 .cpu_restore = __restore_cpu_power8,
358 .machine_check_early = __machine_check_early_realmode_p8,
359 .platform = "power8",
360 },
361 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
362 .pvr_mask = 0xffffffff,
363 .pvr_value = 0x0f000005,
364 .cpu_name = "POWER9 (architected)",
365 .cpu_features = CPU_FTRS_POWER9,
366 .cpu_user_features = COMMON_USER_POWER9,
367 .cpu_user_features2 = COMMON_USER2_POWER9,
368 .mmu_features = MMU_FTRS_POWER9,
369 .icache_bsize = 128,
370 .dcache_bsize = 128,
371 .oprofile_type = PPC_OPROFILE_INVALID,
372 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
373 .cpu_setup = __setup_cpu_power9,
374 .cpu_restore = __restore_cpu_power9,
375 .platform = "power9",
376 },
377 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */
378 .pvr_mask = 0xffffffff,
379 .pvr_value = 0x0f000006,
380 .cpu_name = "POWER10 (architected)",
381 .cpu_features = CPU_FTRS_POWER10,
382 .cpu_user_features = COMMON_USER_POWER10,
383 .cpu_user_features2 = COMMON_USER2_POWER10,
384 .mmu_features = MMU_FTRS_POWER10,
385 .icache_bsize = 128,
386 .dcache_bsize = 128,
387 .oprofile_type = PPC_OPROFILE_INVALID,
388 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
389 .cpu_setup = __setup_cpu_power10,
390 .cpu_restore = __restore_cpu_power10,
391 .platform = "power10",
392 },
393 { /* Power7 */
394 .pvr_mask = 0xffff0000,
395 .pvr_value = 0x003f0000,
396 .cpu_name = "POWER7 (raw)",
397 .cpu_features = CPU_FTRS_POWER7,
398 .cpu_user_features = COMMON_USER_POWER7,
399 .cpu_user_features2 = COMMON_USER2_POWER7,
400 .mmu_features = MMU_FTRS_POWER7,
401 .icache_bsize = 128,
402 .dcache_bsize = 128,
403 .num_pmcs = 6,
404 .pmc_type = PPC_PMC_IBM,
405 .oprofile_cpu_type = "ppc64/power7",
406 .oprofile_type = PPC_OPROFILE_POWER4,
407 .cpu_setup = __setup_cpu_power7,
408 .cpu_restore = __restore_cpu_power7,
409 .machine_check_early = __machine_check_early_realmode_p7,
410 .platform = "power7",
411 },
412 { /* Power7+ */
413 .pvr_mask = 0xffff0000,
414 .pvr_value = 0x004A0000,
415 .cpu_name = "POWER7+ (raw)",
416 .cpu_features = CPU_FTRS_POWER7,
417 .cpu_user_features = COMMON_USER_POWER7,
418 .cpu_user_features2 = COMMON_USER2_POWER7,
419 .mmu_features = MMU_FTRS_POWER7,
420 .icache_bsize = 128,
421 .dcache_bsize = 128,
422 .num_pmcs = 6,
423 .pmc_type = PPC_PMC_IBM,
424 .oprofile_cpu_type = "ppc64/power7",
425 .oprofile_type = PPC_OPROFILE_POWER4,
426 .cpu_setup = __setup_cpu_power7,
427 .cpu_restore = __restore_cpu_power7,
428 .machine_check_early = __machine_check_early_realmode_p7,
429 .platform = "power7+",
430 },
431 { /* Power8E */
432 .pvr_mask = 0xffff0000,
433 .pvr_value = 0x004b0000,
434 .cpu_name = "POWER8E (raw)",
435 .cpu_features = CPU_FTRS_POWER8E,
436 .cpu_user_features = COMMON_USER_POWER8,
437 .cpu_user_features2 = COMMON_USER2_POWER8,
438 .mmu_features = MMU_FTRS_POWER8,
439 .icache_bsize = 128,
440 .dcache_bsize = 128,
441 .num_pmcs = 6,
442 .pmc_type = PPC_PMC_IBM,
443 .oprofile_cpu_type = "ppc64/power8",
444 .oprofile_type = PPC_OPROFILE_INVALID,
445 .cpu_setup = __setup_cpu_power8,
446 .cpu_restore = __restore_cpu_power8,
447 .machine_check_early = __machine_check_early_realmode_p8,
448 .platform = "power8",
449 },
450 { /* Power8NVL */
451 .pvr_mask = 0xffff0000,
452 .pvr_value = 0x004c0000,
453 .cpu_name = "POWER8NVL (raw)",
454 .cpu_features = CPU_FTRS_POWER8,
455 .cpu_user_features = COMMON_USER_POWER8,
456 .cpu_user_features2 = COMMON_USER2_POWER8,
457 .mmu_features = MMU_FTRS_POWER8,
458 .icache_bsize = 128,
459 .dcache_bsize = 128,
460 .num_pmcs = 6,
461 .pmc_type = PPC_PMC_IBM,
462 .oprofile_cpu_type = "ppc64/power8",
463 .oprofile_type = PPC_OPROFILE_INVALID,
464 .cpu_setup = __setup_cpu_power8,
465 .cpu_restore = __restore_cpu_power8,
466 .machine_check_early = __machine_check_early_realmode_p8,
467 .platform = "power8",
468 },
469 { /* Power8 */
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x004d0000,
472 .cpu_name = "POWER8 (raw)",
473 .cpu_features = CPU_FTRS_POWER8,
474 .cpu_user_features = COMMON_USER_POWER8,
475 .cpu_user_features2 = COMMON_USER2_POWER8,
476 .mmu_features = MMU_FTRS_POWER8,
477 .icache_bsize = 128,
478 .dcache_bsize = 128,
479 .num_pmcs = 6,
480 .pmc_type = PPC_PMC_IBM,
481 .oprofile_cpu_type = "ppc64/power8",
482 .oprofile_type = PPC_OPROFILE_INVALID,
483 .cpu_setup = __setup_cpu_power8,
484 .cpu_restore = __restore_cpu_power8,
485 .machine_check_early = __machine_check_early_realmode_p8,
486 .platform = "power8",
487 },
488 { /* Power9 DD2.0 */
489 .pvr_mask = 0xffffefff,
490 .pvr_value = 0x004e0200,
491 .cpu_name = "POWER9 (raw)",
492 .cpu_features = CPU_FTRS_POWER9_DD2_0,
493 .cpu_user_features = COMMON_USER_POWER9,
494 .cpu_user_features2 = COMMON_USER2_POWER9,
495 .mmu_features = MMU_FTRS_POWER9,
496 .icache_bsize = 128,
497 .dcache_bsize = 128,
498 .num_pmcs = 6,
499 .pmc_type = PPC_PMC_IBM,
500 .oprofile_cpu_type = "ppc64/power9",
501 .oprofile_type = PPC_OPROFILE_INVALID,
502 .cpu_setup = __setup_cpu_power9,
503 .cpu_restore = __restore_cpu_power9,
504 .machine_check_early = __machine_check_early_realmode_p9,
505 .platform = "power9",
506 },
507 { /* Power9 DD 2.1 */
508 .pvr_mask = 0xffffefff,
509 .pvr_value = 0x004e0201,
510 .cpu_name = "POWER9 (raw)",
511 .cpu_features = CPU_FTRS_POWER9_DD2_1,
512 .cpu_user_features = COMMON_USER_POWER9,
513 .cpu_user_features2 = COMMON_USER2_POWER9,
514 .mmu_features = MMU_FTRS_POWER9,
515 .icache_bsize = 128,
516 .dcache_bsize = 128,
517 .num_pmcs = 6,
518 .pmc_type = PPC_PMC_IBM,
519 .oprofile_cpu_type = "ppc64/power9",
520 .oprofile_type = PPC_OPROFILE_INVALID,
521 .cpu_setup = __setup_cpu_power9,
522 .cpu_restore = __restore_cpu_power9,
523 .machine_check_early = __machine_check_early_realmode_p9,
524 .platform = "power9",
525 },
526 { /* Power9 DD2.2 or later */
527 .pvr_mask = 0xffff0000,
528 .pvr_value = 0x004e0000,
529 .cpu_name = "POWER9 (raw)",
530 .cpu_features = CPU_FTRS_POWER9_DD2_2,
531 .cpu_user_features = COMMON_USER_POWER9,
532 .cpu_user_features2 = COMMON_USER2_POWER9,
533 .mmu_features = MMU_FTRS_POWER9,
534 .icache_bsize = 128,
535 .dcache_bsize = 128,
536 .num_pmcs = 6,
537 .pmc_type = PPC_PMC_IBM,
538 .oprofile_cpu_type = "ppc64/power9",
539 .oprofile_type = PPC_OPROFILE_INVALID,
540 .cpu_setup = __setup_cpu_power9,
541 .cpu_restore = __restore_cpu_power9,
542 .machine_check_early = __machine_check_early_realmode_p9,
543 .platform = "power9",
544 },
545 { /* Power10 */
546 .pvr_mask = 0xffff0000,
547 .pvr_value = 0x00800000,
548 .cpu_name = "POWER10 (raw)",
549 .cpu_features = CPU_FTRS_POWER10,
550 .cpu_user_features = COMMON_USER_POWER10,
551 .cpu_user_features2 = COMMON_USER2_POWER10,
552 .mmu_features = MMU_FTRS_POWER10,
553 .icache_bsize = 128,
554 .dcache_bsize = 128,
555 .num_pmcs = 6,
556 .pmc_type = PPC_PMC_IBM,
557 .oprofile_cpu_type = "ppc64/power10",
558 .oprofile_type = PPC_OPROFILE_INVALID,
559 .cpu_setup = __setup_cpu_power10,
560 .cpu_restore = __restore_cpu_power10,
> 561 .machine_check_early = __machine_check_early_realmode_p10,
562 .platform = "power10",
563 },
564 { /* Cell Broadband Engine */
565 .pvr_mask = 0xffff0000,
566 .pvr_value = 0x00700000,
567 .cpu_name = "Cell Broadband Engine",
568 .cpu_features = CPU_FTRS_CELL,
569 .cpu_user_features = COMMON_USER_PPC64 |
570 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
571 PPC_FEATURE_SMT,
572 .mmu_features = MMU_FTRS_CELL,
573 .icache_bsize = 128,
574 .dcache_bsize = 128,
575 .num_pmcs = 4,
576 .pmc_type = PPC_PMC_IBM,
577 .oprofile_cpu_type = "ppc64/cell-be",
578 .oprofile_type = PPC_OPROFILE_CELL,
579 .platform = "ppc-cell-be",
580 },
581 { /* PA Semi PA6T */
582 .pvr_mask = 0x7fff0000,
583 .pvr_value = 0x00900000,
584 .cpu_name = "PA6T",
585 .cpu_features = CPU_FTRS_PA6T,
586 .cpu_user_features = COMMON_USER_PA6T,
587 .mmu_features = MMU_FTRS_PA6T,
588 .icache_bsize = 64,
589 .dcache_bsize = 64,
590 .num_pmcs = 6,
591 .pmc_type = PPC_PMC_PA6T,
592 .cpu_setup = __setup_cpu_pa6t,
593 .cpu_restore = __restore_cpu_pa6t,
594 .oprofile_cpu_type = "ppc64/pa6t",
595 .oprofile_type = PPC_OPROFILE_PA6T,
596 .platform = "pa6t",
597 },
598 { /* default match */
599 .pvr_mask = 0x00000000,
600 .pvr_value = 0x00000000,
601 .cpu_name = "POWER5 (compatible)",
602 .cpu_features = CPU_FTRS_COMPATIBLE,
603 .cpu_user_features = COMMON_USER_PPC64,
604 .mmu_features = MMU_FTRS_POWER,
605 .icache_bsize = 128,
606 .dcache_bsize = 128,
607 .num_pmcs = 6,
608 .pmc_type = PPC_PMC_IBM,
609 .platform = "power5",
610 }
611 #endif /* CONFIG_PPC_BOOK3S_64 */
612
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
Re: [PATCH 18/24] drm/virtio: implement blob resources: hypercall interface
by kernel test robot
Hi Gurchetan,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip linus/master next-20200814]
[cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next drm-exynos/exynos-drm-next v5.8]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Gurchetan-Singh/Blob-prerequisit...
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: parisc-randconfig-s031-20200813 (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-168-g9554805c-dirty
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=parisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
drivers/gpu/drm/virtio/virtgpu_vq.c:1210:23: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le64 [usertype] offset @@ got unsigned long long [usertype] offset @@
drivers/gpu/drm/virtio/virtgpu_vq.c:1210:23: sparse: expected restricted __le64 [usertype] offset
drivers/gpu/drm/virtio/virtgpu_vq.c:1210:23: sparse: got unsigned long long [usertype] offset
>> drivers/gpu/drm/virtio/virtgpu_vq.c:1286:35: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 @@ got restricted __le64 [usertype] @@
>> drivers/gpu/drm/virtio/virtgpu_vq.c:1286:35: sparse: expected restricted __le32
>> drivers/gpu/drm/virtio/virtgpu_vq.c:1286:35: sparse: got restricted __le64 [usertype]
vim +1286 drivers/gpu/drm/virtio/virtgpu_vq.c
1260
1261 void virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
1262 uint32_t scanout_id,
1263 struct virtio_gpu_object *bo,
1264 struct drm_framebuffer *fb,
1265 uint32_t width, uint32_t height,
1266 uint32_t x, uint32_t y)
1267 {
1268 uint32_t i;
1269 struct virtio_gpu_set_scanout_blob *cmd_p;
1270 struct virtio_gpu_vbuffer *vbuf;
1271 uint32_t format = virtio_gpu_translate_format(fb->format->format);
1272
1273 cmd_p = virtio_gpu_alloc_cmd(vgdev, &vbuf, sizeof(*cmd_p));
1274 memset(cmd_p, 0, sizeof(*cmd_p));
1275
1276 cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_SET_SCANOUT_BLOB);
1277 cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);
1278 cmd_p->scanout_id = cpu_to_le32(scanout_id);
1279
1280 cmd_p->format = cpu_to_le32(format);
1281 cmd_p->width = cpu_to_le32(fb->width);
1282 cmd_p->height = cpu_to_le32(fb->height);
1283
1284 for (i = 0; i < 4; i++) {
1285 cmd_p->strides[i] = cpu_to_le32(fb->pitches[i]);
> 1286 cmd_p->offsets[i] = cpu_to_le64(fb->offsets[i]);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
Re: [PATCH 2/2] i3c/master: add the mipi-i3c-hci driver
by kernel test robot
Hi Nicolas,
I love your patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v5.8 next-20200814]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Nicolas-Pitre/MIPI-I3c-HCI-Host-...
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> drivers/i3c/master/mipi-i3c-hci/core.c:107: warning: "PIO_OFFSET" redefined
107 | #define PIO_OFFSET GENMASK(15, 0) /* PIO Offset */
|
In file included from include/linux/io.h:13,
from arch/mips/include/asm/mips-cps.h:10,
from arch/mips/include/asm/smp-ops.h:16,
from arch/mips/include/asm/smp.h:21,
from include/linux/smp.h:82,
from include/linux/lockdep.h:14,
from include/linux/rcupdate.h:29,
from include/linux/rculist.h:11,
from include/linux/pid.h:5,
from include/linux/sched.h:14,
from include/linux/ratelimit.h:6,
from include/linux/dev_printk.h:16,
from include/linux/device.h:15,
from drivers/i3c/master/mipi-i3c-hci/core.c:11:
arch/mips/include/asm/io.h:76: note: this is the location of the previous definition
76 | #define PIO_OFFSET mips_io_port_base
|
vim +/PIO_OFFSET +107 drivers/i3c/master/mipi-i3c-hci/core.c
105
106 #define PIO_SECTION_OFFSET 0x3c
> 107 #define PIO_OFFSET GENMASK(15, 0) /* PIO Offset */
108
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
Re: [PATCH 2/2] i3c/master: add the mipi-i3c-hci driver
by kernel test robot
Hi Nicolas,
I love your patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v5.8 next-20200813]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Nicolas-Pitre/MIPI-I3c-HCI-Host-...
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: sh-allmodconfig (attached as .config)
compiler: sh4-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=sh
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
In file included from include/linux/scatterlist.h:9,
from include/linux/dma-mapping.h:11,
from drivers/i3c/master/mipi-i3c-hci/dma.c:13:
drivers/i3c/master/mipi-i3c-hci/dma.c: In function 'hci_dma_init':
>> drivers/i3c/master/mipi-i3c-hci/dma.c:252:48: warning: right shift count >= width of type [-Wshift-count-overflow]
252 | rh_reg_write(CMD_RING_BASE_HI, rh->xfer_phys >> 32);
| ^~
arch/sh/include/asm/io.h:33:77: note: in definition of macro '__raw_writel'
33 | #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
| ^
arch/sh/include/asm/io.h:48:62: note: in expansion of macro 'ioswabl'
48 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c))
| ^~~~~~~
arch/sh/include/asm/io.h:58:32: note: in expansion of macro 'writel_relaxed'
58 | #define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); })
| ^~~~~~~~~~~~~~
drivers/i3c/master/mipi-i3c-hci/dma.c:56:28: note: in expansion of macro 'writel'
56 | #define rh_reg_write(r, v) writel(v, rh->regs + (RH_##r))
| ^~~~~~
drivers/i3c/master/mipi-i3c-hci/dma.c:252:3: note: in expansion of macro 'rh_reg_write'
252 | rh_reg_write(CMD_RING_BASE_HI, rh->xfer_phys >> 32);
| ^~~~~~~~~~~~
drivers/i3c/master/mipi-i3c-hci/dma.c:254:49: warning: right shift count >= width of type [-Wshift-count-overflow]
254 | rh_reg_write(RESP_RING_BASE_HI, rh->resp_phys >> 32);
| ^~
arch/sh/include/asm/io.h:33:77: note: in definition of macro '__raw_writel'
33 | #define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
| ^
arch/sh/include/asm/io.h:48:62: note: in expansion of macro 'ioswabl'
48 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c))
| ^~~~~~~
arch/sh/include/asm/io.h:58:32: note: in expansion of macro 'writel_relaxed'
58 | #define writel(v,a) ({ wmb(); writel_relaxed((v),(a)); })
| ^~~~~~~~~~~~~~
drivers/i3c/master/mipi-i3c-hci/dma.c:56:28: note: in expansion of macro 'writel'
56 | #define rh_reg_write(r, v) writel(v, rh->regs + (RH_##r))
| ^~~~~~
drivers/i3c/master/mipi-i3c-hci/dma.c:254:3: note: in expansion of macro 'rh_reg_write'
254 | rh_reg_write(RESP_RING_BASE_HI, rh->resp_phys >> 32);
| ^~~~~~~~~~~~
drivers/i3c/master/mipi-i3c-hci/dma.c: In function 'hci_dma_queue_xfer':
drivers/i3c/master/mipi-i3c-hci/dma.c:388:35: warning: right shift count >= width of type [-Wshift-count-overflow]
388 | *ring_data++ = xfer->data_phys >> 32;
| ^~
vim +252 drivers/i3c/master/mipi-i3c-hci/dma.c
193
194 static int hci_dma_init(struct i3c_hci *hci)
195 {
196 struct hci_rings_data *rings;
197 struct hci_rh_data *rh;
198 u32 regval;
199 u_int i, nr_rings, xfers_sz, resps_sz;
200 u_int ibi_status_ring_sz, ibi_data_ring_sz;
201 int ret;
202
203 regval = rhs_reg_read(CONTROL);
204 nr_rings = FIELD_GET(MAX_HEADER_COUNT_CAP, regval);
205 INFO("%d DMA rings available", nr_rings);
206 if (unlikely(nr_rings > 8)) {
207 ERR("number of rings should be <= 8");
208 nr_rings = 8;
209 }
210 if (nr_rings > XFER_RINGS)
211 nr_rings = XFER_RINGS;
212 rings = kzalloc(sizeof(*rings) + nr_rings * sizeof(*rh), GFP_KERNEL);
213 if (!rings)
214 return -ENOMEM;
215 hci->io_data = rings;
216 rings->total = nr_rings;
217
218 for (i = 0; i < rings->total; i++) {
219 u32 offset = rhs_reg_read(RHn_OFFSET(i));
220
221 INFO("Ring %d at offset %#x", i, offset);
222 ret = -EINVAL;
223 if (!offset)
224 goto err_out;
225 rh = &rings->headers[i];
226 rh->regs = hci->base_regs + offset;
227 spin_lock_init(&rh->lock);
228 init_completion(&rh->op_done);
229
230 rh->xfer_entries = XFER_RING_ENTRIES;
231
232 regval = rh_reg_read(CR_SETUP);
233 rh->xfer_struct_sz = FIELD_GET(CR_XFER_STRUCT_SIZE, regval);
234 rh->resp_struct_sz = FIELD_GET(CR_RESP_STRUCT_SIZE, regval);
235 DBG("xfer_struct_sz = %d, resp_struct_sz = %d",
236 rh->xfer_struct_sz, rh->resp_struct_sz);
237 xfers_sz = rh->xfer_struct_sz * rh->xfer_entries;
238 resps_sz = rh->resp_struct_sz * rh->xfer_entries;
239
240 rh->xfer = dma_alloc_coherent(&hci->master.dev, xfers_sz,
241 &rh->xfer_phys, GFP_KERNEL);
242 rh->resp = dma_alloc_coherent(&hci->master.dev, resps_sz,
243 &rh->resp_phys, GFP_KERNEL);
244 rh->src_xfers =
245 kmalloc_array(rh->xfer_entries, sizeof(*rh->src_xfers),
246 GFP_KERNEL);
247 ret = -ENOMEM;
248 if (!rh->xfer || !rh->resp || !rh->src_xfers)
249 goto err_out;
250
251 rh_reg_write(CMD_RING_BASE_LO, rh->xfer_phys);
> 252 rh_reg_write(CMD_RING_BASE_HI, rh->xfer_phys >> 32);
253 rh_reg_write(RESP_RING_BASE_LO, rh->resp_phys);
254 rh_reg_write(RESP_RING_BASE_HI, rh->resp_phys >> 32);
255
256 regval = FIELD_PREP(CR_RING_SIZE, rh->xfer_entries);
257 rh_reg_write(CR_SETUP, regval);
258
259 rh_reg_write(INTR_STATUS_ENABLE, 0xffffffff);
260 rh_reg_write(INTR_SIGNAL_ENABLE, INTR_IBI_READY |
261 INTR_TRANSFER_COMPLETION |
262 INTR_RING_OP |
263 INTR_TRANSFER_ERR |
264 INTR_WARN_INS_STOP_MODE |
265 INTR_IBI_RING_FULL |
266 INTR_TRANSFER_ABORT);
267
268 /* IBIs */
269
270 if (i >= IBI_RINGS)
271 goto ring_ready;
272
273 regval = rh_reg_read(IBI_SETUP);
274 rh->ibi_status_sz = FIELD_GET(IBI_STATUS_STRUCT_SIZE, regval);
275 rh->ibi_status_entries = IBI_STATUS_RING_ENTRIES;
276 rh->ibi_chunks_total = IBI_CHUNK_POOL_SIZE;
277
278 rh->ibi_chunk_sz = dma_get_cache_alignment();
279 rh->ibi_chunk_sz *= IBI_CHUNK_CACHELINES;
280 BUG_ON(rh->ibi_chunk_sz > 256);
281
282 ibi_status_ring_sz = rh->ibi_status_sz * rh->ibi_status_entries;
283 ibi_data_ring_sz = rh->ibi_chunk_sz * rh->ibi_chunks_total;
284
285 rh->ibi_status =
286 dma_alloc_coherent(&hci->master.dev, ibi_status_ring_sz,
287 &rh->ibi_status_phys, GFP_KERNEL);
288 rh->ibi_data = kmalloc(ibi_data_ring_sz, GFP_KERNEL);
289 ret = -ENOMEM;
290 if (!rh->ibi_status || !rh->ibi_data)
291 goto err_out;
292 rh->ibi_data_phys =
293 dma_map_single(&hci->master.dev, rh->ibi_data,
294 ibi_data_ring_sz, DMA_FROM_DEVICE);
295 if (dma_mapping_error(&hci->master.dev, rh->ibi_data_phys)) {
296 rh->ibi_data_phys = 0;
297 ret = -ENOMEM;
298 goto err_out;
299 }
300
301 regval = FIELD_PREP(IBI_STATUS_RING_SIZE,
302 rh->ibi_status_entries) |
303 FIELD_PREP(IBI_DATA_CHUNK_SIZE,
304 ilog2(rh->ibi_chunk_sz) - 2) |
305 FIELD_PREP(IBI_DATA_CHUNK_COUNT,
306 rh->ibi_chunks_total);
307 rh_reg_write(IBI_SETUP, regval);
308
309 regval = rh_reg_read(INTR_SIGNAL_ENABLE);
310 regval |= INTR_IBI_READY;
311 rh_reg_write(INTR_SIGNAL_ENABLE, regval);
312
313 ring_ready:
314 rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);
315 }
316
317 regval = FIELD_PREP(MAX_HEADER_COUNT, rings->total);
318 rhs_reg_write(CONTROL, regval);
319 return 0;
320
321 err_out:
322 hci_dma_cleanup(hci);
323 return ret;
324 }
325
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
Re: [PATCH 17/24] drm/virtio: implement blob resources: implement vram object
by kernel test robot
Hi Gurchetan,
I love your patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip linus/master next-20200814]
[cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next drm-exynos/exynos-drm-next v5.8]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Gurchetan-Singh/Blob-prerequisit...
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: parisc-randconfig-s031-20200813 (attached as .config)
compiler: hppa-linux-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.2-168-g9554805c-dirty
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=parisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/virtio/virtgpu_vq.c:1210:23: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le64 [usertype] offset @@ got unsigned long long [usertype] offset @@
>> drivers/gpu/drm/virtio/virtgpu_vq.c:1210:23: sparse: expected restricted __le64 [usertype] offset
>> drivers/gpu/drm/virtio/virtgpu_vq.c:1210:23: sparse: got unsigned long long [usertype] offset
vim +1210 drivers/gpu/drm/virtio/virtgpu_vq.c
1188
1189 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
1190 struct virtio_gpu_object_array *objs, uint64_t offset)
1191 {
1192 struct virtio_gpu_resource_map_blob *cmd_p;
1193 struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(objs->objs[0]);
1194 struct virtio_gpu_vbuffer *vbuf;
1195 struct virtio_gpu_resp_map_info *resp_buf;
1196
1197 resp_buf = kzalloc(sizeof(*resp_buf), GFP_KERNEL);
1198 if (!resp_buf) {
1199 virtio_gpu_array_put_free(objs);
1200 return -ENOMEM;
1201 }
1202
1203 cmd_p = virtio_gpu_alloc_cmd_resp(vgdev,
1204 virtio_gpu_cmd_resource_map_cb, &vbuf, sizeof(*cmd_p),
1205 sizeof(struct virtio_gpu_resp_map_info), resp_buf);
1206 memset(cmd_p, 0, sizeof(*cmd_p));
1207
1208 cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB);
1209 cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);
> 1210 cmd_p->offset = offset;
1211 vbuf->objs = objs;
1212
1213 virtio_gpu_queue_ctrl_buffer(vgdev, vbuf);
1214 return 0;
1215 }
1216
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
net/tipc/udp_media.c:743: undefined reference to `ipv6_dev_find'
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: c636eef2ee3696f261a35f34989842701a107895
commit: 5a6f6f579178dbeb33002d93b4f646c31348fac9 tipc: set ub->ifindex for local ipv6 address
date: 6 days ago
config: ia64-randconfig-r005-20200811 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 5a6f6f579178dbeb33002d93b4f646c31348fac9
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=ia64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
ia64-linux-ld: net/tipc/udp_media.o: in function `tipc_udp_enable':
>> net/tipc/udp_media.c:743: undefined reference to `ipv6_dev_find'
vim +743 net/tipc/udp_media.c
642
643 /**
644 * tipc_udp_enable - callback to create a new udp bearer instance
645 * @net: network namespace
646 * @b: pointer to generic tipc_bearer
647 * @attrs: netlink bearer configuration
648 *
649 * validate the bearer parameters and initialize the udp bearer
650 * rtnl_lock should be held
651 */
652 static int tipc_udp_enable(struct net *net, struct tipc_bearer *b,
653 struct nlattr *attrs[])
654 {
655 int err = -EINVAL;
656 struct udp_bearer *ub;
657 struct udp_media_addr remote = {0};
658 struct udp_media_addr local = {0};
659 struct udp_port_cfg udp_conf = {0};
660 struct udp_tunnel_sock_cfg tuncfg = {NULL};
661 struct nlattr *opts[TIPC_NLA_UDP_MAX + 1];
662 u8 node_id[NODE_ID_LEN] = {0,};
663 int rmcast = 0;
664
665 ub = kzalloc(sizeof(*ub), GFP_ATOMIC);
666 if (!ub)
667 return -ENOMEM;
668
669 INIT_LIST_HEAD(&ub->rcast.list);
670
671 if (!attrs[TIPC_NLA_BEARER_UDP_OPTS])
672 goto err;
673
674 if (nla_parse_nested_deprecated(opts, TIPC_NLA_UDP_MAX, attrs[TIPC_NLA_BEARER_UDP_OPTS], tipc_nl_udp_policy, NULL))
675 goto err;
676
677 if (!opts[TIPC_NLA_UDP_LOCAL] || !opts[TIPC_NLA_UDP_REMOTE]) {
678 pr_err("Invalid UDP bearer configuration");
679 err = -EINVAL;
680 goto err;
681 }
682
683 err = tipc_parse_udp_addr(opts[TIPC_NLA_UDP_LOCAL], &local,
684 &ub->ifindex);
685 if (err)
686 goto err;
687
688 err = tipc_parse_udp_addr(opts[TIPC_NLA_UDP_REMOTE], &remote, NULL);
689 if (err)
690 goto err;
691
692 if (remote.proto != local.proto) {
693 err = -EINVAL;
694 goto err;
695 }
696
697 /* Checking remote ip address */
698 rmcast = tipc_udp_is_mcast_addr(&remote);
699
700 /* Autoconfigure own node identity if needed */
701 if (!tipc_own_id(net)) {
702 memcpy(node_id, local.ipv6.in6_u.u6_addr8, 16);
703 tipc_net_init(net, node_id, 0);
704 }
705 if (!tipc_own_id(net)) {
706 pr_warn("Failed to set node id, please configure manually\n");
707 err = -EINVAL;
708 goto err;
709 }
710
711 b->bcast_addr.media_id = TIPC_MEDIA_TYPE_UDP;
712 b->bcast_addr.broadcast = TIPC_BROADCAST_SUPPORT;
713 rcu_assign_pointer(b->media_ptr, ub);
714 rcu_assign_pointer(ub->bearer, b);
715 tipc_udp_media_addr_set(&b->addr, &local);
716 if (local.proto == htons(ETH_P_IP)) {
717 struct net_device *dev;
718
719 dev = __ip_dev_find(net, local.ipv4.s_addr, false);
720 if (!dev) {
721 err = -ENODEV;
722 goto err;
723 }
724 udp_conf.family = AF_INET;
725
726 /* Switch to use ANY to receive packets from group */
727 if (rmcast)
728 udp_conf.local_ip.s_addr = htonl(INADDR_ANY);
729 else
730 udp_conf.local_ip.s_addr = local.ipv4.s_addr;
731 udp_conf.use_udp_checksums = false;
732 ub->ifindex = dev->ifindex;
733 if (tipc_mtu_bad(dev, sizeof(struct iphdr) +
734 sizeof(struct udphdr))) {
735 err = -EINVAL;
736 goto err;
737 }
738 b->mtu = b->media->mtu;
739 #if IS_ENABLED(CONFIG_IPV6)
740 } else if (local.proto == htons(ETH_P_IPV6)) {
741 struct net_device *dev;
742
> 743 dev = ipv6_dev_find(net, &local.ipv6);
744 if (!dev) {
745 err = -ENODEV;
746 goto err;
747 }
748 udp_conf.family = AF_INET6;
749 udp_conf.use_udp6_tx_checksums = true;
750 udp_conf.use_udp6_rx_checksums = true;
751 if (rmcast)
752 udp_conf.local_ip6 = in6addr_any;
753 else
754 udp_conf.local_ip6 = local.ipv6;
755 ub->ifindex = dev->ifindex;
756 b->mtu = 1280;
757 #endif
758 } else {
759 err = -EAFNOSUPPORT;
760 goto err;
761 }
762 udp_conf.local_udp_port = local.port;
763 err = udp_sock_create(net, &udp_conf, &ub->ubsock);
764 if (err)
765 goto err;
766 tuncfg.sk_user_data = ub;
767 tuncfg.encap_type = 1;
768 tuncfg.encap_rcv = tipc_udp_recv;
769 tuncfg.encap_destroy = NULL;
770 setup_udp_tunnel_sock(net, ub->ubsock, &tuncfg);
771
772 err = dst_cache_init(&ub->rcast.dst_cache, GFP_ATOMIC);
773 if (err)
774 goto free;
775
776 /**
777 * The bcast media address port is used for all peers and the ip
778 * is used if it's a multicast address.
779 */
780 memcpy(&b->bcast_addr.value, &remote, sizeof(remote));
781 if (rmcast)
782 err = enable_mcast(ub, &remote);
783 else
784 err = tipc_udp_rcast_add(b, &remote);
785 if (err)
786 goto free;
787
788 return 0;
789
790 free:
791 dst_cache_destroy(&ub->rcast.dst_cache);
792 udp_tunnel_sock_release(ub->ubsock);
793 err:
794 kfree(ub);
795 return err;
796 }
797
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
[android-common:android-4.19-stable 15304/17631] drivers/gpu/drm/drm_dp_mst_topology.c:1843 drm_dp_mst_update_dsc_info() warn: inconsistent indenting
by kernel test robot
tree: https://android.googlesource.com/kernel/common android-4.19-stable
head: f2cce51e2b2493739bb8179b1b57984dc5a9ee62
commit: b572376bedc67f334d005dabd7727dd318eeba44 [15304/17631] ANDROID: GKI: Add 'dsc_info' to struct drm_dp_mst_port
config: i386-randconfig-m031-20200811 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
smatch warnings:
drivers/gpu/drm/drm_dp_mst_topology.c:1843 drm_dp_mst_update_dsc_info() warn: inconsistent indenting
vim +1843 drivers/gpu/drm/drm_dp_mst_topology.c
1830
1831 int drm_dp_mst_update_dsc_info(struct drm_dp_mst_topology_mgr *mgr,
1832 struct drm_dp_mst_port *port,
1833 struct drm_dp_mst_dsc_info *dsc_info)
1834 {
1835 if (!dsc_info)
1836 return -EINVAL;
1837
1838 port = drm_dp_get_validated_port_ref(mgr, port);
1839 if (!port)
1840 return -EINVAL;
1841
1842 memcpy(&port->dsc_info, dsc_info, sizeof(struct drm_dp_mst_dsc_info));
> 1843 drm_dp_put_port(port);
1844
1845 return 0;
1846 }
1847 EXPORT_SYMBOL_GPL(drm_dp_mst_update_dsc_info);
1848
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month
[android-common:android-4.19 12/14] drivers/nvdimm/nd_virtio.c:56:28: sparse: sparse: incorrect type in assignment (different base types)
by kernel test robot
tree: https://android.googlesource.com/kernel/common android-4.19
head: 45a6d3f5180d2d65d6d83fc9ecfa93fd2a332a67
commit: 748a437c5c0179283ae1814b612f9e1a744f3839 [12/14] UPSTREAM: virtio-pmem: Add virtio pmem driver
config: x86_64-randconfig-s021-20200812 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.2-168-g9554805c-dirty
git checkout 748a437c5c0179283ae1814b612f9e1a744f3839
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/nvdimm/nd_virtio.c:56:28: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int [usertype] type @@ got restricted __virtio32 @@
>> drivers/nvdimm/nd_virtio.c:56:28: sparse: expected unsigned int [usertype] type
>> drivers/nvdimm/nd_virtio.c:56:28: sparse: got restricted __virtio32
>> drivers/nvdimm/nd_virtio.c:93:59: sparse: sparse: incorrect type in argument 2 (different base types) @@ expected restricted __virtio32 [usertype] val @@ got unsigned int [usertype] ret @@
>> drivers/nvdimm/nd_virtio.c:93:59: sparse: expected restricted __virtio32 [usertype] val
>> drivers/nvdimm/nd_virtio.c:93:59: sparse: got unsigned int [usertype] ret
vim +56 drivers/nvdimm/nd_virtio.c
36
37 /* The request submission function */
38 static int virtio_pmem_flush(struct nd_region *nd_region)
39 {
40 struct virtio_device *vdev = nd_region->provider_data;
41 struct virtio_pmem *vpmem = vdev->priv;
42 struct virtio_pmem_request *req_data;
43 struct scatterlist *sgs[2], sg, ret;
44 unsigned long flags;
45 int err, err1;
46
47 might_sleep();
48 req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
49 if (!req_data)
50 return -ENOMEM;
51
52 req_data->done = false;
53 init_waitqueue_head(&req_data->host_acked);
54 init_waitqueue_head(&req_data->wq_buf);
55 INIT_LIST_HEAD(&req_data->list);
> 56 req_data->req.type = cpu_to_virtio32(vdev, VIRTIO_PMEM_REQ_TYPE_FLUSH);
57 sg_init_one(&sg, &req_data->req, sizeof(req_data->req));
58 sgs[0] = &sg;
59 sg_init_one(&ret, &req_data->resp.ret, sizeof(req_data->resp));
60 sgs[1] = &ret;
61
62 spin_lock_irqsave(&vpmem->pmem_lock, flags);
63 /*
64 * If virtqueue_add_sgs returns -ENOSPC then req_vq virtual
65 * queue does not have free descriptor. We add the request
66 * to req_list and wait for host_ack to wake us up when free
67 * slots are available.
68 */
69 while ((err = virtqueue_add_sgs(vpmem->req_vq, sgs, 1, 1, req_data,
70 GFP_ATOMIC)) == -ENOSPC) {
71
72 dev_info(&vdev->dev, "failed to send command to virtio pmem device, no free slots in the virtqueue\n");
73 req_data->wq_buf_avail = false;
74 list_add_tail(&req_data->list, &vpmem->req_list);
75 spin_unlock_irqrestore(&vpmem->pmem_lock, flags);
76
77 /* A host response results in "host_ack" getting called */
78 wait_event(req_data->wq_buf, req_data->wq_buf_avail);
79 spin_lock_irqsave(&vpmem->pmem_lock, flags);
80 }
81 err1 = virtqueue_kick(vpmem->req_vq);
82 spin_unlock_irqrestore(&vpmem->pmem_lock, flags);
83 /*
84 * virtqueue_add_sgs failed with error different than -ENOSPC, we can't
85 * do anything about that.
86 */
87 if (err || !err1) {
88 dev_info(&vdev->dev, "failed to send command to virtio pmem device\n");
89 err = -EIO;
90 } else {
91 /* A host repsonse results in "host_ack" getting called */
92 wait_event(req_data->host_acked, req_data->done);
> 93 err = virtio32_to_cpu(vdev, req_data->resp.ret);
94 }
95
96 kfree(req_data);
97 return err;
98 };
99
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
2 years, 1 month