Re: [PATCH 2/2] zonefs: Fix O_APPEND async write handling
by Nathan Chancellor
On Mon, Mar 15, 2021 at 07:22:56AM +0000, Damien Le Moal wrote:
> On 2021/03/15 16:21, Johannes Thumshirn wrote:
> > On 15/03/2021 08:16, kernel test robot wrote:
> >> 818 static ssize_t zonefs_file_dio_write(struct kiocb *iocb, struct iov_iter *from)
> >> 819 {
> >> 820 struct inode *inode = file_inode(iocb->ki_filp);
> >> 821 struct zonefs_inode_info *zi = ZONEFS_I(inode);
> >> 822 struct super_block *sb = inode->i_sb;
> >> 823 bool sync = is_sync_kiocb(iocb);
> >> 824 bool append = false;
> >> 825 ssize_t ret, count;
> >
> >> 843 count = zonefs_write_checks(iocb, from);
> >> > 844 if (count <= 0)
> >> 845 goto inode_unlock;
> >
> > Args that needs to be:
> > if (count <= 0) {
> > ret = count;
> > goto inode_unlock;
> > }
> >
> > Sorry for not spotting it.
>
> Yep. Sending v2. Weird that gcc does not complain on my local compile...
Unfortunately, GCC's version of this warning was disabled for default
compiles by Linus in commit 78a5255ffb6a ("Stop the ad-hoc games with
-Wno-maybe-initialized"). W=2 is required, which can be quite noisy from
my understanding. KCFLAGS=-Wmaybe-uninitialized is a good option.
Cheers,
Nathan
> >
> >> 878 inode_unlock:
> >> 879 inode_unlock(inode);
> >> 880
> >> 881 return ret;
> >> 882 }
> >> 883
> >
>
> --
> Damien Le Moal
> Western Digital Research
1 year, 6 months
Re: [PATCH v4 1/2] mm: huge_memory: a new debugfs interface for splitting THP tests.
by kernel test robot
Hi Zi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on kselftest/next]
[also build test WARNING on linux/master linus/master v5.12-rc3]
[cannot apply to hnaz-linux-mm/master next-20210315]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Zi-Yan/mm-huge_memory-a-new-debu...
base: https://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest.git next
config: i386-randconfig-m021-20210315 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
smatch warnings:
mm/huge_memory.c:3086 split_huge_pages_write() warn: sscanf doesn't return error codes
vim +3086 mm/huge_memory.c
3051
3052 static ssize_t split_huge_pages_write(struct file *file, const char __user *buf,
3053 size_t count, loff_t *ppops)
3054 {
3055 static DEFINE_MUTEX(mutex);
3056 ssize_t ret;
3057 char input_buf[80]; /* hold pid, start_vaddr, end_vaddr */
3058 int pid;
3059 unsigned long vaddr_start, vaddr_end;
3060
3061 ret = mutex_lock_interruptible(&mutex);
3062 if (ret)
3063 return ret;
3064
3065 ret = -EFAULT;
3066
3067 memset(input_buf, 0, 80);
3068 if (copy_from_user(input_buf, buf, min_t(size_t, count, 80)))
3069 goto out;
3070
3071 input_buf[79] = '\0';
3072 ret = sscanf(input_buf, "%d,0x%lx,0x%lx", &pid, &vaddr_start, &vaddr_end);
3073 if (ret == 1 && pid == 1) {
3074 split_huge_pages_all();
3075 ret = strlen(input_buf);
3076 goto out;
3077 } else if (ret != 3) {
3078 ret = -EINVAL;
3079 goto out;
3080 }
3081
3082 if (!split_huge_pages_pid(pid, vaddr_start, vaddr_end))
3083 ret = strlen(input_buf);
3084 out:
3085 mutex_unlock(&mutex);
> 3086 return ret;
3087
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 6 months
[linux-stable-rc:linux-4.14.y 6067/9999] drivers/crypto/qat/qat_common/qat_algs.c:156:7: warning: argument 1 range [18446744071562067968, 18446744073709551615] exceeds maximum object size 9223372036854775807
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-4.14.y
head: e1f7d50ae3a3ec342e87a9b1ce6787bfb8b3c08b
commit: 760f8522ce08a24abac3208290f93fe3fffc0d6c [6067/9999] selinux: use kernel linux/socket.h for genheaders and mdp
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0
reproduce (this is a W=1 build):
# https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.gi...
git remote add linux-stable-rc https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
git fetch --no-tags linux-stable-rc linux-4.14.y
git checkout 760f8522ce08a24abac3208290f93fe3fffc0d6c
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
drivers/crypto/qat/qat_common/qat_algs.c: In function 'qat_alg_do_precomputes':
>> drivers/crypto/qat/qat_common/qat_algs.c:156:7: warning: argument 1 range [18446744071562067968, 18446744073709551615] exceeds maximum object size 9223372036854775807 [-Walloc-size-larger-than=]
char ipad[block_size];
^~~~
drivers/crypto/qat/qat_common/qat_algs.c:156:7: note: in a call to built-in allocation function '__builtin_alloca_with_align'
--
drivers/watchdog/eurotechwdt.c: In function 'eurwdt_ioctl':
>> drivers/watchdog/eurotechwdt.c:292:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
spin_unlock(&eurwdt_lock);
^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/watchdog/eurotechwdt.c:295:2: note: here
case WDIOC_GETTIMEOUT:
^~~~
arch/x86/include/asm/bitops.h: Assembler messages:
arch/x86/include/asm/bitops.h:225: Warning: no instruction mnemonic suffix given and no register operands; using default for `bts'
vim +156 drivers/crypto/qat/qat_common/qat_algs.c
d370cec3219490 Tadeusz Struk 2014-06-05 144
d370cec3219490 Tadeusz Struk 2014-06-05 145 static int qat_alg_do_precomputes(struct icp_qat_hw_auth_algo_blk *hash,
338e84f3a9740a Tadeusz Struk 2014-12-08 146 struct qat_alg_aead_ctx *ctx,
d370cec3219490 Tadeusz Struk 2014-06-05 147 const uint8_t *auth_key,
26c3af6c1580a0 Tadeusz Struk 2014-09-10 148 unsigned int auth_keylen)
d370cec3219490 Tadeusz Struk 2014-06-05 149 {
37e5265437a02e Behan Webster 2014-04-04 150 SHASH_DESC_ON_STACK(shash, ctx->hash_tfm);
d370cec3219490 Tadeusz Struk 2014-06-05 151 struct sha1_state sha1;
d370cec3219490 Tadeusz Struk 2014-06-05 152 struct sha256_state sha256;
d370cec3219490 Tadeusz Struk 2014-06-05 153 struct sha512_state sha512;
d370cec3219490 Tadeusz Struk 2014-06-05 154 int block_size = crypto_shash_blocksize(ctx->hash_tfm);
d370cec3219490 Tadeusz Struk 2014-06-05 155 int digest_size = crypto_shash_digestsize(ctx->hash_tfm);
48eb3691e8beab Herbert Xu 2015-01-14 @156 char ipad[block_size];
48eb3691e8beab Herbert Xu 2015-01-14 157 char opad[block_size];
d370cec3219490 Tadeusz Struk 2014-06-05 158 __be32 *hash_state_out;
d370cec3219490 Tadeusz Struk 2014-06-05 159 __be64 *hash512_state_out;
d370cec3219490 Tadeusz Struk 2014-06-05 160 int i, offset;
d370cec3219490 Tadeusz Struk 2014-06-05 161
48eb3691e8beab Herbert Xu 2015-01-14 162 memset(ipad, 0, block_size);
48eb3691e8beab Herbert Xu 2015-01-14 163 memset(opad, 0, block_size);
37e5265437a02e Behan Webster 2014-04-04 164 shash->tfm = ctx->hash_tfm;
37e5265437a02e Behan Webster 2014-04-04 165 shash->flags = 0x0;
d370cec3219490 Tadeusz Struk 2014-06-05 166
d370cec3219490 Tadeusz Struk 2014-06-05 167 if (auth_keylen > block_size) {
37e5265437a02e Behan Webster 2014-04-04 168 int ret = crypto_shash_digest(shash, auth_key,
48eb3691e8beab Herbert Xu 2015-01-14 169 auth_keylen, ipad);
d370cec3219490 Tadeusz Struk 2014-06-05 170 if (ret)
d370cec3219490 Tadeusz Struk 2014-06-05 171 return ret;
d370cec3219490 Tadeusz Struk 2014-06-05 172
48eb3691e8beab Herbert Xu 2015-01-14 173 memcpy(opad, ipad, digest_size);
d370cec3219490 Tadeusz Struk 2014-06-05 174 } else {
d370cec3219490 Tadeusz Struk 2014-06-05 175 memcpy(ipad, auth_key, auth_keylen);
d370cec3219490 Tadeusz Struk 2014-06-05 176 memcpy(opad, auth_key, auth_keylen);
d370cec3219490 Tadeusz Struk 2014-06-05 177 }
d370cec3219490 Tadeusz Struk 2014-06-05 178
d370cec3219490 Tadeusz Struk 2014-06-05 179 for (i = 0; i < block_size; i++) {
d370cec3219490 Tadeusz Struk 2014-06-05 180 char *ipad_ptr = ipad + i;
d370cec3219490 Tadeusz Struk 2014-06-05 181 char *opad_ptr = opad + i;
f14011ad7cf79a Corentin LABBE 2017-05-19 182 *ipad_ptr ^= HMAC_IPAD_VALUE;
f14011ad7cf79a Corentin LABBE 2017-05-19 183 *opad_ptr ^= HMAC_OPAD_VALUE;
d370cec3219490 Tadeusz Struk 2014-06-05 184 }
d370cec3219490 Tadeusz Struk 2014-06-05 185
37e5265437a02e Behan Webster 2014-04-04 186 if (crypto_shash_init(shash))
d370cec3219490 Tadeusz Struk 2014-06-05 187 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 188
37e5265437a02e Behan Webster 2014-04-04 189 if (crypto_shash_update(shash, ipad, block_size))
d370cec3219490 Tadeusz Struk 2014-06-05 190 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 191
d370cec3219490 Tadeusz Struk 2014-06-05 192 hash_state_out = (__be32 *)hash->sha.state1;
d370cec3219490 Tadeusz Struk 2014-06-05 193 hash512_state_out = (__be64 *)hash_state_out;
d370cec3219490 Tadeusz Struk 2014-06-05 194
d370cec3219490 Tadeusz Struk 2014-06-05 195 switch (ctx->qat_hash_alg) {
d370cec3219490 Tadeusz Struk 2014-06-05 196 case ICP_QAT_HW_AUTH_ALGO_SHA1:
37e5265437a02e Behan Webster 2014-04-04 197 if (crypto_shash_export(shash, &sha1))
d370cec3219490 Tadeusz Struk 2014-06-05 198 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 199 for (i = 0; i < digest_size >> 2; i++, hash_state_out++)
d370cec3219490 Tadeusz Struk 2014-06-05 200 *hash_state_out = cpu_to_be32(*(sha1.state + i));
d370cec3219490 Tadeusz Struk 2014-06-05 201 break;
d370cec3219490 Tadeusz Struk 2014-06-05 202 case ICP_QAT_HW_AUTH_ALGO_SHA256:
37e5265437a02e Behan Webster 2014-04-04 203 if (crypto_shash_export(shash, &sha256))
d370cec3219490 Tadeusz Struk 2014-06-05 204 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 205 for (i = 0; i < digest_size >> 2; i++, hash_state_out++)
d370cec3219490 Tadeusz Struk 2014-06-05 206 *hash_state_out = cpu_to_be32(*(sha256.state + i));
d370cec3219490 Tadeusz Struk 2014-06-05 207 break;
d370cec3219490 Tadeusz Struk 2014-06-05 208 case ICP_QAT_HW_AUTH_ALGO_SHA512:
37e5265437a02e Behan Webster 2014-04-04 209 if (crypto_shash_export(shash, &sha512))
d370cec3219490 Tadeusz Struk 2014-06-05 210 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 211 for (i = 0; i < digest_size >> 3; i++, hash512_state_out++)
d370cec3219490 Tadeusz Struk 2014-06-05 212 *hash512_state_out = cpu_to_be64(*(sha512.state + i));
d370cec3219490 Tadeusz Struk 2014-06-05 213 break;
d370cec3219490 Tadeusz Struk 2014-06-05 214 default:
d370cec3219490 Tadeusz Struk 2014-06-05 215 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 216 }
d370cec3219490 Tadeusz Struk 2014-06-05 217
37e5265437a02e Behan Webster 2014-04-04 218 if (crypto_shash_init(shash))
d370cec3219490 Tadeusz Struk 2014-06-05 219 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 220
37e5265437a02e Behan Webster 2014-04-04 221 if (crypto_shash_update(shash, opad, block_size))
d370cec3219490 Tadeusz Struk 2014-06-05 222 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 223
d370cec3219490 Tadeusz Struk 2014-06-05 224 offset = round_up(qat_get_inter_state_size(ctx->qat_hash_alg), 8);
d370cec3219490 Tadeusz Struk 2014-06-05 225 hash_state_out = (__be32 *)(hash->sha.state1 + offset);
d370cec3219490 Tadeusz Struk 2014-06-05 226 hash512_state_out = (__be64 *)hash_state_out;
d370cec3219490 Tadeusz Struk 2014-06-05 227
d370cec3219490 Tadeusz Struk 2014-06-05 228 switch (ctx->qat_hash_alg) {
d370cec3219490 Tadeusz Struk 2014-06-05 229 case ICP_QAT_HW_AUTH_ALGO_SHA1:
37e5265437a02e Behan Webster 2014-04-04 230 if (crypto_shash_export(shash, &sha1))
d370cec3219490 Tadeusz Struk 2014-06-05 231 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 232 for (i = 0; i < digest_size >> 2; i++, hash_state_out++)
d370cec3219490 Tadeusz Struk 2014-06-05 233 *hash_state_out = cpu_to_be32(*(sha1.state + i));
d370cec3219490 Tadeusz Struk 2014-06-05 234 break;
d370cec3219490 Tadeusz Struk 2014-06-05 235 case ICP_QAT_HW_AUTH_ALGO_SHA256:
37e5265437a02e Behan Webster 2014-04-04 236 if (crypto_shash_export(shash, &sha256))
d370cec3219490 Tadeusz Struk 2014-06-05 237 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 238 for (i = 0; i < digest_size >> 2; i++, hash_state_out++)
d370cec3219490 Tadeusz Struk 2014-06-05 239 *hash_state_out = cpu_to_be32(*(sha256.state + i));
d370cec3219490 Tadeusz Struk 2014-06-05 240 break;
d370cec3219490 Tadeusz Struk 2014-06-05 241 case ICP_QAT_HW_AUTH_ALGO_SHA512:
37e5265437a02e Behan Webster 2014-04-04 242 if (crypto_shash_export(shash, &sha512))
d370cec3219490 Tadeusz Struk 2014-06-05 243 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 244 for (i = 0; i < digest_size >> 3; i++, hash512_state_out++)
d370cec3219490 Tadeusz Struk 2014-06-05 245 *hash512_state_out = cpu_to_be64(*(sha512.state + i));
d370cec3219490 Tadeusz Struk 2014-06-05 246 break;
d370cec3219490 Tadeusz Struk 2014-06-05 247 default:
d370cec3219490 Tadeusz Struk 2014-06-05 248 return -EFAULT;
d370cec3219490 Tadeusz Struk 2014-06-05 249 }
aa408d6019775c Struk, Tadeusz 2014-11-14 250 memzero_explicit(ipad, block_size);
aa408d6019775c Struk, Tadeusz 2014-11-14 251 memzero_explicit(opad, block_size);
d370cec3219490 Tadeusz Struk 2014-06-05 252 return 0;
d370cec3219490 Tadeusz Struk 2014-06-05 253 }
d370cec3219490 Tadeusz Struk 2014-06-05 254
:::::: The code at line 156 was first introduced by commit
:::::: 48eb3691e8beab349e3a700d45f070be8d4b88ba crypto: qat - Ensure ipad and opad are zeroed
:::::: TO: Herbert Xu <herbert(a)gondor.apana.org.au>
:::::: CC: Herbert Xu <herbert(a)gondor.apana.org.au>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 6 months
drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:233 igt_fill_blt_thread() error: 'ce' dereferencing possible ERR_PTR()
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 1e28eed17697bcf343c6743f0028cc3b5dd88bf0
commit: 03c62d886dd6d3dfebf59d385a37245fe667fe90 drm/i915: Make GEM errors non-fatal by default
date: 8 weeks ago
config: x86_64-randconfig-m001-20210316 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
New smatch warnings:
drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:233 igt_fill_blt_thread() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:351 igt_copy_blt_thread() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:693 igt_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:834 igt_shared_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/selftests/i915_request.c:216 igt_request_rewind() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/selftests/i915_request.c:351 __igt_breadcrumbs_smoketest() error: 'ce' dereferencing possible ERR_PTR()
Old smatch warnings:
drivers/gpu/drm/i915/gem/i915_gem_object.h:127 __i915_gem_object_lock() error: we previously assumed 'ww' could be null (see line 119)
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c:140 move_obj_to_gpu() warn: maybe use && instead of &
drivers/gpu/drm/i915/gem/i915_gem_context.h:204 i915_gem_context_get_engine() warn: inconsistent indenting
drivers/gpu/drm/i915/gem/i915_gem_context.h:206 i915_gem_context_get_engine() warn: inconsistent indenting
drivers/gpu/drm/i915/gem/i915_gem_context.h:204 i915_gem_context_get_engine() warn: inconsistent indenting
drivers/gpu/drm/i915/gem/i915_gem_context.h:206 i915_gem_context_get_engine() warn: inconsistent indenting
drivers/gpu/drm/i915/gem/i915_gem_object.h:127 __i915_gem_object_lock() error: we previously assumed 'ww' could be null (see line 119)
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:709 igt_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:716 igt_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:729 igt_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:847 igt_shared_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:854 igt_shared_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:867 igt_shared_ctx_exec() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/selftests/i915_request.c:230 igt_request_rewind() error: 'ce' dereferencing possible ERR_PTR()
drivers/gpu/drm/i915/gem/i915_gem_context.h:204 i915_gem_context_get_engine() warn: inconsistent indenting
drivers/gpu/drm/i915/gem/i915_gem_context.h:206 i915_gem_context_get_engine() warn: inconsistent indenting
vim +/ce +233 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c
0e99f939f08fc3 Matthew Auld 2019-10-25 202
0e99f939f08fc3 Matthew Auld 2019-10-25 203 static int igt_fill_blt_thread(void *arg)
6501aa4e3a4507 Matthew Auld 2019-05-29 204 {
0e99f939f08fc3 Matthew Auld 2019-10-25 205 struct igt_thread_arg *thread = arg;
d61345f342981f Chris Wilson 2020-06-04 206 struct intel_engine_cs *engine = thread->engine;
0e99f939f08fc3 Matthew Auld 2019-10-25 207 struct rnd_state *prng = &thread->prng;
6501aa4e3a4507 Matthew Auld 2019-05-29 208 struct drm_i915_gem_object *obj;
0e99f939f08fc3 Matthew Auld 2019-10-25 209 struct i915_gem_context *ctx;
0e99f939f08fc3 Matthew Auld 2019-10-25 210 struct intel_context *ce;
0e99f939f08fc3 Matthew Auld 2019-10-25 211 unsigned int prio;
6501aa4e3a4507 Matthew Auld 2019-05-29 212 IGT_TIMEOUT(end);
4746fd5c2c1322 Chris Wilson 2020-02-10 213 u64 total, max;
0e99f939f08fc3 Matthew Auld 2019-10-25 214 int err;
6501aa4e3a4507 Matthew Auld 2019-05-29 215
34485832cb9872 Chris Wilson 2019-11-11 216 ctx = thread->ctx;
34485832cb9872 Chris Wilson 2019-11-11 217 if (!ctx) {
d61345f342981f Chris Wilson 2020-06-04 218 ctx = live_context_for_engine(engine, thread->file);
34485832cb9872 Chris Wilson 2019-11-11 219 if (IS_ERR(ctx))
34485832cb9872 Chris Wilson 2019-11-11 220 return PTR_ERR(ctx);
0e99f939f08fc3 Matthew Auld 2019-10-25 221
0e99f939f08fc3 Matthew Auld 2019-10-25 222 prio = i915_prandom_u32_max_state(I915_PRIORITY_MAX, prng);
0e99f939f08fc3 Matthew Auld 2019-10-25 223 ctx->sched.priority = I915_USER_PRIORITY(prio);
34485832cb9872 Chris Wilson 2019-11-11 224 }
0e99f939f08fc3 Matthew Auld 2019-10-25 225
d61345f342981f Chris Wilson 2020-06-04 226 ce = i915_gem_context_get_engine(ctx, 0);
0e99f939f08fc3 Matthew Auld 2019-10-25 227 GEM_BUG_ON(IS_ERR(ce));
554e330ceb9f00 Matthew Auld 2019-08-10 228
4746fd5c2c1322 Chris Wilson 2020-02-10 229 /*
4746fd5c2c1322 Chris Wilson 2020-02-10 230 * If we have a tiny shared address space, like for the GGTT
4746fd5c2c1322 Chris Wilson 2020-02-10 231 * then we can't be too greedy.
4746fd5c2c1322 Chris Wilson 2020-02-10 232 */
4746fd5c2c1322 Chris Wilson 2020-02-10 @233 max = ce->vm->total;
4746fd5c2c1322 Chris Wilson 2020-02-10 234 if (i915_is_ggtt(ce->vm) || thread->ctx)
4746fd5c2c1322 Chris Wilson 2020-02-10 235 max = div_u64(max, thread->n_cpus);
4746fd5c2c1322 Chris Wilson 2020-02-10 236 max >>= 4;
4746fd5c2c1322 Chris Wilson 2020-02-10 237
4746fd5c2c1322 Chris Wilson 2020-02-10 238 total = PAGE_SIZE;
6501aa4e3a4507 Matthew Auld 2019-05-29 239 do {
4746fd5c2c1322 Chris Wilson 2020-02-10 240 /* Aim to keep the runtime under reasonable bounds! */
4746fd5c2c1322 Chris Wilson 2020-02-10 241 const u32 max_phys_size = SZ_64K;
0e99f939f08fc3 Matthew Auld 2019-10-25 242 u32 val = prandom_u32_state(prng);
0e99f939f08fc3 Matthew Auld 2019-10-25 243 u32 phys_sz;
0e99f939f08fc3 Matthew Auld 2019-10-25 244 u32 sz;
0e99f939f08fc3 Matthew Auld 2019-10-25 245 u32 *vaddr;
6501aa4e3a4507 Matthew Auld 2019-05-29 246 u32 i;
6501aa4e3a4507 Matthew Auld 2019-05-29 247
4746fd5c2c1322 Chris Wilson 2020-02-10 248 total = min(total, max);
4746fd5c2c1322 Chris Wilson 2020-02-10 249 sz = i915_prandom_u32_max_state(total, prng) + 1;
c8b56cd01433af Chris Wilson 2020-02-12 250 phys_sz = sz % max_phys_size + 1;
0e99f939f08fc3 Matthew Auld 2019-10-25 251
6501aa4e3a4507 Matthew Auld 2019-05-29 252 sz = round_up(sz, PAGE_SIZE);
554e330ceb9f00 Matthew Auld 2019-08-10 253 phys_sz = round_up(phys_sz, PAGE_SIZE);
c8b56cd01433af Chris Wilson 2020-02-12 254 phys_sz = min(phys_sz, sz);
6501aa4e3a4507 Matthew Auld 2019-05-29 255
554e330ceb9f00 Matthew Auld 2019-08-10 256 pr_debug("%s with phys_sz= %x, sz=%x, val=%x\n", __func__,
554e330ceb9f00 Matthew Auld 2019-08-10 257 phys_sz, sz, val);
6501aa4e3a4507 Matthew Auld 2019-05-29 258
d61345f342981f Chris Wilson 2020-06-04 259 obj = huge_gem_object(engine->i915, phys_sz, sz);
6501aa4e3a4507 Matthew Auld 2019-05-29 260 if (IS_ERR(obj)) {
fd1e194f4869dc Colin Ian King 2019-05-31 261 err = PTR_ERR(obj);
6501aa4e3a4507 Matthew Auld 2019-05-29 262 goto err_flush;
6501aa4e3a4507 Matthew Auld 2019-05-29 263 }
6501aa4e3a4507 Matthew Auld 2019-05-29 264
6501aa4e3a4507 Matthew Auld 2019-05-29 265 vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
6501aa4e3a4507 Matthew Auld 2019-05-29 266 if (IS_ERR(vaddr)) {
6501aa4e3a4507 Matthew Auld 2019-05-29 267 err = PTR_ERR(vaddr);
6501aa4e3a4507 Matthew Auld 2019-05-29 268 goto err_put;
6501aa4e3a4507 Matthew Auld 2019-05-29 269 }
6501aa4e3a4507 Matthew Auld 2019-05-29 270
6501aa4e3a4507 Matthew Auld 2019-05-29 271 /*
6501aa4e3a4507 Matthew Auld 2019-05-29 272 * Make sure the potentially async clflush does its job, if
6501aa4e3a4507 Matthew Auld 2019-05-29 273 * required.
6501aa4e3a4507 Matthew Auld 2019-05-29 274 */
554e330ceb9f00 Matthew Auld 2019-08-10 275 memset32(vaddr, val ^ 0xdeadbeaf,
554e330ceb9f00 Matthew Auld 2019-08-10 276 huge_gem_object_phys_size(obj) / sizeof(u32));
6501aa4e3a4507 Matthew Auld 2019-05-29 277
6501aa4e3a4507 Matthew Auld 2019-05-29 278 if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))
6501aa4e3a4507 Matthew Auld 2019-05-29 279 obj->cache_dirty = true;
6501aa4e3a4507 Matthew Auld 2019-05-29 280
6501aa4e3a4507 Matthew Auld 2019-05-29 281 err = i915_gem_object_fill_blt(obj, ce, val);
6501aa4e3a4507 Matthew Auld 2019-05-29 282 if (err)
6501aa4e3a4507 Matthew Auld 2019-05-29 283 goto err_unpin;
6501aa4e3a4507 Matthew Auld 2019-05-29 284
4746fd5c2c1322 Chris Wilson 2020-02-10 285 err = i915_gem_object_wait(obj, 0, MAX_SCHEDULE_TIMEOUT);
6501aa4e3a4507 Matthew Auld 2019-05-29 286 if (err)
6501aa4e3a4507 Matthew Auld 2019-05-29 287 goto err_unpin;
6501aa4e3a4507 Matthew Auld 2019-05-29 288
4746fd5c2c1322 Chris Wilson 2020-02-10 289 for (i = 0; i < huge_gem_object_phys_size(obj) / sizeof(u32); i += 17) {
4746fd5c2c1322 Chris Wilson 2020-02-10 290 if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
4746fd5c2c1322 Chris Wilson 2020-02-10 291 drm_clflush_virt_range(&vaddr[i], sizeof(vaddr[i]));
4746fd5c2c1322 Chris Wilson 2020-02-10 292
6501aa4e3a4507 Matthew Auld 2019-05-29 293 if (vaddr[i] != val) {
6501aa4e3a4507 Matthew Auld 2019-05-29 294 pr_err("vaddr[%u]=%x, expected=%x\n", i,
6501aa4e3a4507 Matthew Auld 2019-05-29 295 vaddr[i], val);
6501aa4e3a4507 Matthew Auld 2019-05-29 296 err = -EINVAL;
6501aa4e3a4507 Matthew Auld 2019-05-29 297 goto err_unpin;
6501aa4e3a4507 Matthew Auld 2019-05-29 298 }
6501aa4e3a4507 Matthew Auld 2019-05-29 299 }
6501aa4e3a4507 Matthew Auld 2019-05-29 300
6501aa4e3a4507 Matthew Auld 2019-05-29 301 i915_gem_object_unpin_map(obj);
6501aa4e3a4507 Matthew Auld 2019-05-29 302 i915_gem_object_put(obj);
4746fd5c2c1322 Chris Wilson 2020-02-10 303
4746fd5c2c1322 Chris Wilson 2020-02-10 304 total <<= 1;
6501aa4e3a4507 Matthew Auld 2019-05-29 305 } while (!time_after(jiffies, end));
6501aa4e3a4507 Matthew Auld 2019-05-29 306
6501aa4e3a4507 Matthew Auld 2019-05-29 307 goto err_flush;
6501aa4e3a4507 Matthew Auld 2019-05-29 308
6501aa4e3a4507 Matthew Auld 2019-05-29 309 err_unpin:
6501aa4e3a4507 Matthew Auld 2019-05-29 310 i915_gem_object_unpin_map(obj);
6501aa4e3a4507 Matthew Auld 2019-05-29 311 err_put:
6501aa4e3a4507 Matthew Auld 2019-05-29 312 i915_gem_object_put(obj);
6501aa4e3a4507 Matthew Auld 2019-05-29 313 err_flush:
6501aa4e3a4507 Matthew Auld 2019-05-29 314 if (err == -ENOMEM)
6501aa4e3a4507 Matthew Auld 2019-05-29 315 err = 0;
6501aa4e3a4507 Matthew Auld 2019-05-29 316
0e99f939f08fc3 Matthew Auld 2019-10-25 317 intel_context_put(ce);
6501aa4e3a4507 Matthew Auld 2019-05-29 318 return err;
6501aa4e3a4507 Matthew Auld 2019-05-29 319 }
6501aa4e3a4507 Matthew Auld 2019-05-29 320
0e99f939f08fc3 Matthew Auld 2019-10-25 321 static int igt_copy_blt_thread(void *arg)
05f219d709ec57 Matthew Auld 2019-08-10 322 {
0e99f939f08fc3 Matthew Auld 2019-10-25 323 struct igt_thread_arg *thread = arg;
d61345f342981f Chris Wilson 2020-06-04 324 struct intel_engine_cs *engine = thread->engine;
0e99f939f08fc3 Matthew Auld 2019-10-25 325 struct rnd_state *prng = &thread->prng;
05f219d709ec57 Matthew Auld 2019-08-10 326 struct drm_i915_gem_object *src, *dst;
0e99f939f08fc3 Matthew Auld 2019-10-25 327 struct i915_gem_context *ctx;
0e99f939f08fc3 Matthew Auld 2019-10-25 328 struct intel_context *ce;
0e99f939f08fc3 Matthew Auld 2019-10-25 329 unsigned int prio;
05f219d709ec57 Matthew Auld 2019-08-10 330 IGT_TIMEOUT(end);
4746fd5c2c1322 Chris Wilson 2020-02-10 331 u64 total, max;
0e99f939f08fc3 Matthew Auld 2019-10-25 332 int err;
05f219d709ec57 Matthew Auld 2019-08-10 333
34485832cb9872 Chris Wilson 2019-11-11 334 ctx = thread->ctx;
34485832cb9872 Chris Wilson 2019-11-11 335 if (!ctx) {
d61345f342981f Chris Wilson 2020-06-04 336 ctx = live_context_for_engine(engine, thread->file);
34485832cb9872 Chris Wilson 2019-11-11 337 if (IS_ERR(ctx))
34485832cb9872 Chris Wilson 2019-11-11 338 return PTR_ERR(ctx);
0e99f939f08fc3 Matthew Auld 2019-10-25 339
0e99f939f08fc3 Matthew Auld 2019-10-25 340 prio = i915_prandom_u32_max_state(I915_PRIORITY_MAX, prng);
0e99f939f08fc3 Matthew Auld 2019-10-25 341 ctx->sched.priority = I915_USER_PRIORITY(prio);
34485832cb9872 Chris Wilson 2019-11-11 342 }
0e99f939f08fc3 Matthew Auld 2019-10-25 343
d61345f342981f Chris Wilson 2020-06-04 344 ce = i915_gem_context_get_engine(ctx, 0);
0e99f939f08fc3 Matthew Auld 2019-10-25 345 GEM_BUG_ON(IS_ERR(ce));
05f219d709ec57 Matthew Auld 2019-08-10 346
4746fd5c2c1322 Chris Wilson 2020-02-10 347 /*
4746fd5c2c1322 Chris Wilson 2020-02-10 348 * If we have a tiny shared address space, like for the GGTT
4746fd5c2c1322 Chris Wilson 2020-02-10 349 * then we can't be too greedy.
4746fd5c2c1322 Chris Wilson 2020-02-10 350 */
4746fd5c2c1322 Chris Wilson 2020-02-10 @351 max = ce->vm->total;
4746fd5c2c1322 Chris Wilson 2020-02-10 352 if (i915_is_ggtt(ce->vm) || thread->ctx)
4746fd5c2c1322 Chris Wilson 2020-02-10 353 max = div_u64(max, thread->n_cpus);
4746fd5c2c1322 Chris Wilson 2020-02-10 354 max >>= 4;
4746fd5c2c1322 Chris Wilson 2020-02-10 355
4746fd5c2c1322 Chris Wilson 2020-02-10 356 total = PAGE_SIZE;
05f219d709ec57 Matthew Auld 2019-08-10 357 do {
4746fd5c2c1322 Chris Wilson 2020-02-10 358 /* Aim to keep the runtime under reasonable bounds! */
4746fd5c2c1322 Chris Wilson 2020-02-10 359 const u32 max_phys_size = SZ_64K;
0e99f939f08fc3 Matthew Auld 2019-10-25 360 u32 val = prandom_u32_state(prng);
0e99f939f08fc3 Matthew Auld 2019-10-25 361 u32 phys_sz;
0e99f939f08fc3 Matthew Auld 2019-10-25 362 u32 sz;
0e99f939f08fc3 Matthew Auld 2019-10-25 363 u32 *vaddr;
05f219d709ec57 Matthew Auld 2019-08-10 364 u32 i;
05f219d709ec57 Matthew Auld 2019-08-10 365
4746fd5c2c1322 Chris Wilson 2020-02-10 366 total = min(total, max);
4746fd5c2c1322 Chris Wilson 2020-02-10 367 sz = i915_prandom_u32_max_state(total, prng) + 1;
c8b56cd01433af Chris Wilson 2020-02-12 368 phys_sz = sz % max_phys_size + 1;
0e99f939f08fc3 Matthew Auld 2019-10-25 369
05f219d709ec57 Matthew Auld 2019-08-10 370 sz = round_up(sz, PAGE_SIZE);
05f219d709ec57 Matthew Auld 2019-08-10 371 phys_sz = round_up(phys_sz, PAGE_SIZE);
c8b56cd01433af Chris Wilson 2020-02-12 372 phys_sz = min(phys_sz, sz);
05f219d709ec57 Matthew Auld 2019-08-10 373
05f219d709ec57 Matthew Auld 2019-08-10 374 pr_debug("%s with phys_sz= %x, sz=%x, val=%x\n", __func__,
05f219d709ec57 Matthew Auld 2019-08-10 375 phys_sz, sz, val);
05f219d709ec57 Matthew Auld 2019-08-10 376
d61345f342981f Chris Wilson 2020-06-04 377 src = huge_gem_object(engine->i915, phys_sz, sz);
05f219d709ec57 Matthew Auld 2019-08-10 378 if (IS_ERR(src)) {
05f219d709ec57 Matthew Auld 2019-08-10 379 err = PTR_ERR(src);
05f219d709ec57 Matthew Auld 2019-08-10 380 goto err_flush;
05f219d709ec57 Matthew Auld 2019-08-10 381 }
05f219d709ec57 Matthew Auld 2019-08-10 382
05f219d709ec57 Matthew Auld 2019-08-10 383 vaddr = i915_gem_object_pin_map(src, I915_MAP_WB);
05f219d709ec57 Matthew Auld 2019-08-10 384 if (IS_ERR(vaddr)) {
05f219d709ec57 Matthew Auld 2019-08-10 385 err = PTR_ERR(vaddr);
05f219d709ec57 Matthew Auld 2019-08-10 386 goto err_put_src;
05f219d709ec57 Matthew Auld 2019-08-10 387 }
05f219d709ec57 Matthew Auld 2019-08-10 388
05f219d709ec57 Matthew Auld 2019-08-10 389 memset32(vaddr, val,
05f219d709ec57 Matthew Auld 2019-08-10 390 huge_gem_object_phys_size(src) / sizeof(u32));
05f219d709ec57 Matthew Auld 2019-08-10 391
05f219d709ec57 Matthew Auld 2019-08-10 392 i915_gem_object_unpin_map(src);
05f219d709ec57 Matthew Auld 2019-08-10 393
05f219d709ec57 Matthew Auld 2019-08-10 394 if (!(src->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
05f219d709ec57 Matthew Auld 2019-08-10 395 src->cache_dirty = true;
05f219d709ec57 Matthew Auld 2019-08-10 396
d61345f342981f Chris Wilson 2020-06-04 397 dst = huge_gem_object(engine->i915, phys_sz, sz);
05f219d709ec57 Matthew Auld 2019-08-10 398 if (IS_ERR(dst)) {
05f219d709ec57 Matthew Auld 2019-08-10 399 err = PTR_ERR(dst);
05f219d709ec57 Matthew Auld 2019-08-10 400 goto err_put_src;
05f219d709ec57 Matthew Auld 2019-08-10 401 }
05f219d709ec57 Matthew Auld 2019-08-10 402
05f219d709ec57 Matthew Auld 2019-08-10 403 vaddr = i915_gem_object_pin_map(dst, I915_MAP_WB);
05f219d709ec57 Matthew Auld 2019-08-10 404 if (IS_ERR(vaddr)) {
05f219d709ec57 Matthew Auld 2019-08-10 405 err = PTR_ERR(vaddr);
05f219d709ec57 Matthew Auld 2019-08-10 406 goto err_put_dst;
05f219d709ec57 Matthew Auld 2019-08-10 407 }
05f219d709ec57 Matthew Auld 2019-08-10 408
05f219d709ec57 Matthew Auld 2019-08-10 409 memset32(vaddr, val ^ 0xdeadbeaf,
05f219d709ec57 Matthew Auld 2019-08-10 410 huge_gem_object_phys_size(dst) / sizeof(u32));
05f219d709ec57 Matthew Auld 2019-08-10 411
05f219d709ec57 Matthew Auld 2019-08-10 412 if (!(dst->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))
05f219d709ec57 Matthew Auld 2019-08-10 413 dst->cache_dirty = true;
05f219d709ec57 Matthew Auld 2019-08-10 414
05f219d709ec57 Matthew Auld 2019-08-10 415 err = i915_gem_object_copy_blt(src, dst, ce);
05f219d709ec57 Matthew Auld 2019-08-10 416 if (err)
05f219d709ec57 Matthew Auld 2019-08-10 417 goto err_unpin;
05f219d709ec57 Matthew Auld 2019-08-10 418
4746fd5c2c1322 Chris Wilson 2020-02-10 419 err = i915_gem_object_wait(dst, 0, MAX_SCHEDULE_TIMEOUT);
05f219d709ec57 Matthew Auld 2019-08-10 420 if (err)
05f219d709ec57 Matthew Auld 2019-08-10 421 goto err_unpin;
05f219d709ec57 Matthew Auld 2019-08-10 422
4746fd5c2c1322 Chris Wilson 2020-02-10 423 for (i = 0; i < huge_gem_object_phys_size(dst) / sizeof(u32); i += 17) {
4746fd5c2c1322 Chris Wilson 2020-02-10 424 if (!(dst->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
4746fd5c2c1322 Chris Wilson 2020-02-10 425 drm_clflush_virt_range(&vaddr[i], sizeof(vaddr[i]));
4746fd5c2c1322 Chris Wilson 2020-02-10 426
05f219d709ec57 Matthew Auld 2019-08-10 427 if (vaddr[i] != val) {
05f219d709ec57 Matthew Auld 2019-08-10 428 pr_err("vaddr[%u]=%x, expected=%x\n", i,
05f219d709ec57 Matthew Auld 2019-08-10 429 vaddr[i], val);
05f219d709ec57 Matthew Auld 2019-08-10 430 err = -EINVAL;
05f219d709ec57 Matthew Auld 2019-08-10 431 goto err_unpin;
05f219d709ec57 Matthew Auld 2019-08-10 432 }
05f219d709ec57 Matthew Auld 2019-08-10 433 }
05f219d709ec57 Matthew Auld 2019-08-10 434
05f219d709ec57 Matthew Auld 2019-08-10 435 i915_gem_object_unpin_map(dst);
05f219d709ec57 Matthew Auld 2019-08-10 436
05f219d709ec57 Matthew Auld 2019-08-10 437 i915_gem_object_put(src);
05f219d709ec57 Matthew Auld 2019-08-10 438 i915_gem_object_put(dst);
4746fd5c2c1322 Chris Wilson 2020-02-10 439
4746fd5c2c1322 Chris Wilson 2020-02-10 440 total <<= 1;
05f219d709ec57 Matthew Auld 2019-08-10 441 } while (!time_after(jiffies, end));
05f219d709ec57 Matthew Auld 2019-08-10 442
05f219d709ec57 Matthew Auld 2019-08-10 443 goto err_flush;
05f219d709ec57 Matthew Auld 2019-08-10 444
05f219d709ec57 Matthew Auld 2019-08-10 445 err_unpin:
05f219d709ec57 Matthew Auld 2019-08-10 446 i915_gem_object_unpin_map(dst);
05f219d709ec57 Matthew Auld 2019-08-10 447 err_put_dst:
05f219d709ec57 Matthew Auld 2019-08-10 448 i915_gem_object_put(dst);
05f219d709ec57 Matthew Auld 2019-08-10 449 err_put_src:
05f219d709ec57 Matthew Auld 2019-08-10 450 i915_gem_object_put(src);
05f219d709ec57 Matthew Auld 2019-08-10 451 err_flush:
05f219d709ec57 Matthew Auld 2019-08-10 452 if (err == -ENOMEM)
05f219d709ec57 Matthew Auld 2019-08-10 453 err = 0;
05f219d709ec57 Matthew Auld 2019-08-10 454
0e99f939f08fc3 Matthew Auld 2019-10-25 455 intel_context_put(ce);
05f219d709ec57 Matthew Auld 2019-08-10 456 return err;
05f219d709ec57 Matthew Auld 2019-08-10 457 }
05f219d709ec57 Matthew Auld 2019-08-10 458
:::::: The code at line 233 was first introduced by commit
:::::: 4746fd5c2c132225bdd817ddf04e8454e872f8c2 drm/i915/selftests: Trim blitter block size
:::::: TO: Chris Wilson <chris(a)chris-wilson.co.uk>
:::::: CC: Chris Wilson <chris(a)chris-wilson.co.uk>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 6 months
[frank-w-bpi-r2-4.14:5.12-hnat 3/4] drivers/pci/probe.c:930:39: error: 'struct device' has no member named 'msi_domain'; did you mean
by kernel test robot
tree: https://github.com/frank-w/BPI-R2-4.14 5.12-hnat
head: d9deeab6a5a7dc5993cb54f8022592b007e2085b
commit: 985198ae531b3360e32967e50a2f2a3fc07075ab [3/4] pci: fix MSI issue part 2
config: microblaze-randconfig-r025-20210315 (attached as .config)
compiler: microblaze-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/frank-w/BPI-R2-4.14/commit/985198ae531b3360e32967e50a2...
git remote add frank-w-bpi-r2-4.14 https://github.com/frank-w/BPI-R2-4.14
git fetch --no-tags frank-w-bpi-r2-4.14 5.12-hnat
git checkout 985198ae531b3360e32967e50a2f2a3fc07075ab
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=microblaze
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
drivers/pci/probe.c: In function 'pci_register_host_bridge':
>> drivers/pci/probe.c:930:39: error: 'struct device' has no member named 'msi_domain'; did you mean 'pm_domain'?
930 | (bridge->msi_domain && !bus->dev.msi_domain))
| ^~~~~~~~~~
| pm_domain
vim +930 drivers/pci/probe.c
904
905 b = pci_find_bus(pci_domain_nr(bus), bridge->busnr);
906 if (b) {
907 /* Ignore it if we already got here via a different bridge */
908 dev_dbg(&b->dev, "bus already known\n");
909 err = -EEXIST;
910 goto free;
911 }
912
913 dev_set_name(&bridge->dev, "pci%04x:%02x", pci_domain_nr(bus),
914 bridge->busnr);
915
916 err = pcibios_root_bridge_prepare(bridge);
917 if (err)
918 goto free;
919
920 err = device_add(&bridge->dev);
921 if (err) {
922 put_device(&bridge->dev);
923 goto free;
924 }
925 bus->bridge = get_device(&bridge->dev);
926 device_enable_async_suspend(bus->bridge);
927 pci_set_bus_of_node(bus);
928 pci_set_bus_msi_domain(bus);
929 if (bridge->no_msi ||
> 930 (bridge->msi_domain && !bus->dev.msi_domain))
931 bus->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
932
933 if (!parent)
934 set_dev_node(bus->bridge, pcibus_to_node(bus));
935
936 bus->dev.class = &pcibus_class;
937 bus->dev.parent = bus->bridge;
938
939 dev_set_name(&bus->dev, "%04x:%02x", pci_domain_nr(bus), bus->number);
940 name = dev_name(&bus->dev);
941
942 err = device_register(&bus->dev);
943 if (err)
944 goto unregister;
945
946 pcibios_add_bus(bus);
947
948 if (bus->ops->add_bus) {
949 err = bus->ops->add_bus(bus);
950 if (WARN_ON(err < 0))
951 dev_err(&bus->dev, "failed to add bus: %d\n", err);
952 }
953
954 /* Create legacy_io and legacy_mem files for this bus */
955 pci_create_legacy_files(bus);
956
957 if (parent)
958 dev_info(parent, "PCI host bridge to bus %s\n", name);
959 else
960 pr_info("PCI host bridge to bus %s\n", name);
961
962 if (nr_node_ids > 1 && pcibus_to_node(bus) == NUMA_NO_NODE)
963 dev_warn(&bus->dev, "Unknown NUMA node; performance will be reduced\n");
964
965 /* Add initial resources to the bus */
966 resource_list_for_each_entry_safe(window, n, &resources) {
967 list_move_tail(&window->node, &bridge->windows);
968 offset = window->offset;
969 res = window->res;
970
971 if (res->flags & IORESOURCE_BUS)
972 pci_bus_insert_busn_res(bus, bus->number, res->end);
973 else
974 pci_bus_add_resource(bus, res, 0);
975
976 if (offset) {
977 if (resource_type(res) == IORESOURCE_IO)
978 fmt = " (bus address [%#06llx-%#06llx])";
979 else
980 fmt = " (bus address [%#010llx-%#010llx])";
981
982 snprintf(addr, sizeof(addr), fmt,
983 (unsigned long long)(res->start - offset),
984 (unsigned long long)(res->end - offset));
985 } else
986 addr[0] = '\0';
987
988 dev_info(&bus->dev, "root bus resource %pR%s\n", res, addr);
989 }
990
991 down_write(&pci_bus_sem);
992 list_add_tail(&bus->node, &pci_root_buses);
993 up_write(&pci_bus_sem);
994
995 return 0;
996
997 unregister:
998 put_device(&bridge->dev);
999 device_del(&bridge->dev);
1000
1001 free:
1002 kfree(bus);
1003 return err;
1004 }
1005
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 6 months
[agd5f:drm-next 301/478] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:32: error: implicit declaration of function 'ioremap_cache'; did you mean
by kernel test robot
tree: https://gitlab.freedesktop.org/agd5f/linux.git drm-next
head: a162e50faeea2a35b325f503068c677f2d2cf44c
commit: 2eb7ef3ab9719274a8dae6a8b5f8ec8c26a812b0 [301/478] drm/amdgpu: pre-map device buffer as cached for A+A config
config: alpha-randconfig-r034-20210315 (attached as .config)
compiler: alpha-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git remote add agd5f https://gitlab.freedesktop.org/agd5f/linux.git
git fetch --no-tags agd5f drm-next
git checkout 2eb7ef3ab9719274a8dae6a8b5f8ec8c26a812b0
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=alpha
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Note: the agd5f/drm-next HEAD a162e50faeea2a35b325f503068c677f2d2cf44c builds fine.
It only hurts bisectibility.
All error/warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c: In function 'amdgpu_ttm_init':
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:32: error: implicit declaration of function 'ioremap_cache'; did you mean 'ioremap_uc'? [-Werror=implicit-function-declaration]
1815 | adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
| ^~~~~~~~~~~~~
| ioremap_uc
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1815:30: warning: assignment to 'void *' from 'int' makes pointer from integer without a cast [-Wint-conversion]
1815 | adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
| ^
cc1: some warnings being treated as errors
vim +1815 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
1768
1769 /*
1770 * amdgpu_ttm_init - Init the memory management (ttm) as well as various
1771 * gtt/vram related fields.
1772 *
1773 * This initializes all of the memory space pools that the TTM layer
1774 * will need such as the GTT space (system memory mapped to the device),
1775 * VRAM (on-board memory), and on-chip memories (GDS, GWS, OA) which
1776 * can be mapped per VMID.
1777 */
1778 int amdgpu_ttm_init(struct amdgpu_device *adev)
1779 {
1780 uint64_t gtt_size;
1781 int r;
1782 u64 vis_vram_limit;
1783
1784 mutex_init(&adev->mman.gtt_window_lock);
1785
1786 /* No others user of address space so set it to 0 */
1787 r = ttm_bo_device_init(&adev->mman.bdev, &amdgpu_bo_driver, adev->dev,
1788 adev_to_drm(adev)->anon_inode->i_mapping,
1789 adev_to_drm(adev)->vma_offset_manager,
1790 adev->need_swiotlb,
1791 dma_addressing_limited(adev->dev));
1792 if (r) {
1793 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
1794 return r;
1795 }
1796 adev->mman.initialized = true;
1797
1798 /* Initialize VRAM pool with all of VRAM divided into pages */
1799 r = amdgpu_vram_mgr_init(adev);
1800 if (r) {
1801 DRM_ERROR("Failed initializing VRAM heap.\n");
1802 return r;
1803 }
1804
1805 /* Reduce size of CPU-visible VRAM if requested */
1806 vis_vram_limit = (u64)amdgpu_vis_vram_limit * 1024 * 1024;
1807 if (amdgpu_vis_vram_limit > 0 &&
1808 vis_vram_limit <= adev->gmc.visible_vram_size)
1809 adev->gmc.visible_vram_size = vis_vram_limit;
1810
1811 /* Change the size here instead of the init above so only lpfn is affected */
1812 amdgpu_ttm_set_buffer_funcs_status(adev, false);
1813 #ifdef CONFIG_64BIT
1814 if (adev->gmc.xgmi.connected_to_cpu)
> 1815 adev->mman.aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
1816 adev->gmc.visible_vram_size);
1817
1818 else
1819 adev->mman.aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
1820 adev->gmc.visible_vram_size);
1821 #endif
1822
1823 /*
1824 *The reserved vram for firmware must be pinned to the specified
1825 *place on the VRAM, so reserve it early.
1826 */
1827 r = amdgpu_ttm_fw_reserve_vram_init(adev);
1828 if (r) {
1829 return r;
1830 }
1831
1832 /*
1833 * only NAVI10 and onwards ASIC support for IP discovery.
1834 * If IP discovery enabled, a block of memory should be
1835 * reserved for IP discovey.
1836 */
1837 if (adev->mman.discovery_bin) {
1838 r = amdgpu_ttm_reserve_tmr(adev);
1839 if (r)
1840 return r;
1841 }
1842
1843 /* allocate memory as required for VGA
1844 * This is used for VGA emulation and pre-OS scanout buffers to
1845 * avoid display artifacts while transitioning between pre-OS
1846 * and driver. */
1847 r = amdgpu_bo_create_kernel_at(adev, 0, adev->mman.stolen_vga_size,
1848 AMDGPU_GEM_DOMAIN_VRAM,
1849 &adev->mman.stolen_vga_memory,
1850 NULL);
1851 if (r)
1852 return r;
1853 r = amdgpu_bo_create_kernel_at(adev, adev->mman.stolen_vga_size,
1854 adev->mman.stolen_extended_size,
1855 AMDGPU_GEM_DOMAIN_VRAM,
1856 &adev->mman.stolen_extended_memory,
1857 NULL);
1858 if (r)
1859 return r;
1860
1861 DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
1862 (unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
1863
1864 /* Compute GTT size, either bsaed on 3/4th the size of RAM size
1865 * or whatever the user passed on module init */
1866 if (amdgpu_gtt_size == -1) {
1867 struct sysinfo si;
1868
1869 si_meminfo(&si);
1870 gtt_size = min(max((AMDGPU_DEFAULT_GTT_SIZE_MB << 20),
1871 adev->gmc.mc_vram_size),
1872 ((uint64_t)si.totalram * si.mem_unit * 3/4));
1873 }
1874 else
1875 gtt_size = (uint64_t)amdgpu_gtt_size << 20;
1876
1877 /* Initialize GTT memory pool */
1878 r = amdgpu_gtt_mgr_init(adev, gtt_size);
1879 if (r) {
1880 DRM_ERROR("Failed initializing GTT heap.\n");
1881 return r;
1882 }
1883 DRM_INFO("amdgpu: %uM of GTT memory ready.\n",
1884 (unsigned)(gtt_size / (1024 * 1024)));
1885
1886 /* Initialize various on-chip memory pools */
1887 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GDS, adev->gds.gds_size);
1888 if (r) {
1889 DRM_ERROR("Failed initializing GDS heap.\n");
1890 return r;
1891 }
1892
1893 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GWS, adev->gds.gws_size);
1894 if (r) {
1895 DRM_ERROR("Failed initializing gws heap.\n");
1896 return r;
1897 }
1898
1899 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_OA, adev->gds.oa_size);
1900 if (r) {
1901 DRM_ERROR("Failed initializing oa heap.\n");
1902 return r;
1903 }
1904
1905 return 0;
1906 }
1907
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 6 months
[android-goldfish:android-3.18 512/586] drivers/clk/qcom/clk-rcg2.c:188 _freq_tbl_determine_rate() warn: variable dereferenced before check 'p' (see line 187)
by kernel test robot
tree: https://android.googlesource.com/kernel/goldfish android-3.18
head: 44cdfba60e00fb12583fb922a00288fd5a82df33
commit: 3c3c91051ddc495cffb0dc12ccd997e3e0eef172 [512/586] clk: qcom: rcg2: Don't crash if our parent can't be found; return an error
config: x86_64-randconfig-m001-20210315 (attached as .config)
compiler: gcc-5 (Ubuntu 5.5.0-12ubuntu1) 5.5.0 20171010
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
New smatch warnings:
drivers/clk/qcom/clk-rcg2.c:188 _freq_tbl_determine_rate() warn: variable dereferenced before check 'p' (see line 187)
Old smatch warnings:
drivers/clk/qcom/clk-rcg2.c:81 clk_rcg2_get_parent() warn: signedness bug returning '(-22)'
vim +/p +188 drivers/clk/qcom/clk-rcg2.c
175
176 static long _freq_tbl_determine_rate(struct clk_hw *hw,
177 const struct freq_tbl *f, unsigned long rate,
178 unsigned long *p_rate, struct clk **p)
179 {
180 unsigned long clk_flags;
181
182 f = qcom_find_freq(f, rate);
183 if (!f)
184 return -EINVAL;
185
186 clk_flags = __clk_get_flags(hw->clk);
> 187 *p = clk_get_parent_by_index(hw->clk, f->src);
> 188 if (!p)
189 return -EINVAL;
190
191 if (clk_flags & CLK_SET_RATE_PARENT) {
192 if (f->pre_div) {
193 rate /= 2;
194 rate *= f->pre_div + 1;
195 }
196
197 if (f->n) {
198 u64 tmp = rate;
199 tmp = tmp * f->n;
200 do_div(tmp, f->m);
201 rate = tmp;
202 }
203 } else {
204 rate = __clk_get_rate(*p);
205 }
206 *p_rate = rate;
207
208 return f->freq;
209 }
210
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 6 months
[PATCH] cpuidle: fix debugfs_simple_attr.cocci warnings
by kernel test robot
From: kernel test robot <lkp(a)intel.com>
drivers/cpuidle/test-cpuidle_latency.c:95:0-23: WARNING: ipi_ops should be defined with DEFINE_DEBUGFS_ATTRIBUTE
drivers/cpuidle/test-cpuidle_latency.c:108:0-23: WARNING: timeout_ops should be defined with DEFINE_DEBUGFS_ATTRIBUTE
Use DEFINE_DEBUGFS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTRIBUTE
for debugfs files.
Semantic patch information:
Rationale: DEFINE_SIMPLE_ATTRIBUTE + debugfs_create_file()
imposes some significant overhead as compared to
DEFINE_DEBUGFS_ATTRIBUTE + debugfs_create_file_unsafe().
Generated by: scripts/coccinelle/api/debugfs/debugfs_simple_attr.cocci
CC: Pratik Rajesh Sampat <psampat(a)linux.ibm.com>
Reported-by: kernel test robot <lkp(a)intel.com>
Signed-off-by: kernel test robot <lkp(a)intel.com>
---
url: https://github.com/0day-ci/linux/commits/Pratik-Rajesh-Sampat/CPU-Idle-la...
base: https://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest.git next
test-cpuidle_latency.c | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
--- a/drivers/cpuidle/test-cpuidle_latency.c
+++ b/drivers/cpuidle/test-cpuidle_latency.c
@@ -92,7 +92,7 @@ static int cpu_write_op(void *data, u64
run_smp_call_function_test(value);
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(ipi_ops, cpu_read_op, cpu_write_op, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(ipi_ops, cpu_read_op, cpu_write_op, "%llu\n");
static int timeout_read_op(void *data, u64 *timeout)
{
@@ -105,7 +105,8 @@ static int timeout_write_op(void *data,
run_timer_test(value);
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(timeout_ops, timeout_read_op, timeout_write_op, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(timeout_ops, timeout_read_op, timeout_write_op,
+ "%llu\n");
static int __init latency_init(void)
{
@@ -116,11 +117,8 @@ static int __init latency_init(void)
pr_alert("latency_test: failed to create /sys/kernel/debug/latency_test\n");
return -1;
}
- temp = debugfs_create_file("ipi_cpu_dest",
- 0666,
- dir,
- NULL,
- &ipi_ops);
+ temp = debugfs_create_file_unsafe("ipi_cpu_dest", 0666, dir, NULL,
+ &ipi_ops);
if (!temp) {
pr_alert("latency_test: failed to create /sys/kernel/debug/ipi_cpu_dest\n");
return -1;
@@ -128,11 +126,8 @@ static int __init latency_init(void)
debugfs_create_u64("ipi_latency_ns", 0444, dir, &ipi_wakeup.latency_ns);
debugfs_create_u32("ipi_cpu_src", 0444, dir, &ipi_wakeup.src_cpu);
- temp = debugfs_create_file("timeout_expected_ns",
- 0666,
- dir,
- NULL,
- &timeout_ops);
+ temp = debugfs_create_file_unsafe("timeout_expected_ns", 0666, dir,
+ NULL, &timeout_ops);
if (!temp) {
pr_alert("latency_test: failed to create /sys/kernel/debug/timeout_expected_ns\n");
return -1;
1 year, 6 months