[kbuild] [mkp-scsi:for-next 304/324] drivers/scsi/smartpqi/smartpqi_sas_transport.c:97 pqi_sas_port_add_rphy() warn: variable dereferenced before check 'pqi_sas_port->device' (see line 95)
by Dan Carpenter
tree: https://git.kernel.org/pub/scm/linux/kernel/git/mkp/scsi.git for-next
head: 857a80bbd7321161f986588160d97815d1b1206a
commit: ec504b23df9d33260602affc50389cf070707c9b [304/324] scsi: smartpqi: Add phy ID support for the physical drives
config: i386-randconfig-m021-20210406 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
smatch warnings:
drivers/scsi/smartpqi/smartpqi_sas_transport.c:97 pqi_sas_port_add_rphy() warn: variable dereferenced before check 'pqi_sas_port->device' (see line 95)
vim +97 drivers/scsi/smartpqi/smartpqi_sas_transport.c
6c223761eb5482 Kevin Barnett 2016-06-27 88 static int pqi_sas_port_add_rphy(struct pqi_sas_port *pqi_sas_port,
6c223761eb5482 Kevin Barnett 2016-06-27 89 struct sas_rphy *rphy)
6c223761eb5482 Kevin Barnett 2016-06-27 90 {
6c223761eb5482 Kevin Barnett 2016-06-27 91 struct sas_identify *identify;
6c223761eb5482 Kevin Barnett 2016-06-27 92
6c223761eb5482 Kevin Barnett 2016-06-27 93 identify = &rphy->identify;
6c223761eb5482 Kevin Barnett 2016-06-27 94 identify->sas_address = pqi_sas_port->sas_address;
ec504b23df9d33 Murthy Bhat 2021-03-11 @95 identify->phy_identifier = pqi_sas_port->device->phy_id;
^^^^^^^^^^^^^^^^^^^^
New dereference
3d46a59a191e81 Don Brace 2018-12-07 96
3d46a59a191e81 Don Brace 2018-12-07 @97 if (pqi_sas_port->device &&
^^^^^^^^^^^^^^^^^^^^
Checked too late.
3d46a59a191e81 Don Brace 2018-12-07 98 pqi_sas_port->device->is_expander_smp_device) {
3d46a59a191e81 Don Brace 2018-12-07 99 identify->initiator_port_protocols = SAS_PROTOCOL_SMP;
3d46a59a191e81 Don Brace 2018-12-07 100 identify->target_port_protocols = SAS_PROTOCOL_SMP;
3d46a59a191e81 Don Brace 2018-12-07 101 } else {
6c223761eb5482 Kevin Barnett 2016-06-27 102 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
6c223761eb5482 Kevin Barnett 2016-06-27 103 identify->target_port_protocols = SAS_PROTOCOL_STP;
3d46a59a191e81 Don Brace 2018-12-07 104 }
6c223761eb5482 Kevin Barnett 2016-06-27 105
6c223761eb5482 Kevin Barnett 2016-06-27 106 return sas_rphy_add(rphy);
6c223761eb5482 Kevin Barnett 2016-06-27 107 }
---
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- 1
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[kbuild] [hch-block:nvme-generic 13/13] drivers/nvme/host/core.c:4532 nvme_core_init() warn: passing zero to 'PTR_ERR'
by Dan Carpenter
tree: git://git.infradead.org/users/hch/block.git nvme-generic
head: 51d5434458b4f2182f4d108c9016ac9402529ee7
commit: 51d5434458b4f2182f4d108c9016ac9402529ee7 [13/13] nvme: introduce generic per-namespace chardev
config: mips-randconfig-m031-20210408 (attached as .config)
compiler: mips64el-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
New smatch warnings:
drivers/nvme/host/core.c:4532 nvme_core_init() warn: passing zero to 'PTR_ERR'
Old smatch warnings:
drivers/nvme/host/core.c:705 nvme_configure_directives() warn: missing error code 'ret'
vim +/PTR_ERR +4532 drivers/nvme/host/core.c
893a74b7a76e6e Christoph Hellwig 2019-04-30 4486 static int __init nvme_core_init(void)
5bae7f73d378a9 Christoph Hellwig 2015-11-28 4487 {
b227c59b9b5b8a Roy Shterman 2018-01-14 4488 int result = -ENOMEM;
5bae7f73d378a9 Christoph Hellwig 2015-11-28 4489
811015409fd4af Christoph Hellwig 2019-04-30 4490 _nvme_check_size();
811015409fd4af Christoph Hellwig 2019-04-30 4491
9a6327d2f25b14 Sagi Grimberg 2017-06-07 4492 nvme_wq = alloc_workqueue("nvme-wq",
9a6327d2f25b14 Sagi Grimberg 2017-06-07 4493 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
9a6327d2f25b14 Sagi Grimberg 2017-06-07 4494 if (!nvme_wq)
b227c59b9b5b8a Roy Shterman 2018-01-14 4495 goto out;
b227c59b9b5b8a Roy Shterman 2018-01-14 4496
b227c59b9b5b8a Roy Shterman 2018-01-14 4497 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
b227c59b9b5b8a Roy Shterman 2018-01-14 4498 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
b227c59b9b5b8a Roy Shterman 2018-01-14 4499 if (!nvme_reset_wq)
b227c59b9b5b8a Roy Shterman 2018-01-14 4500 goto destroy_wq;
b227c59b9b5b8a Roy Shterman 2018-01-14 4501
b227c59b9b5b8a Roy Shterman 2018-01-14 4502 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
b227c59b9b5b8a Roy Shterman 2018-01-14 4503 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
b227c59b9b5b8a Roy Shterman 2018-01-14 4504 if (!nvme_delete_wq)
b227c59b9b5b8a Roy Shterman 2018-01-14 4505 goto destroy_reset_wq;
9a6327d2f25b14 Sagi Grimberg 2017-06-07 4506
f68abd9cc00cce Javier González 2020-12-01 4507 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
f68abd9cc00cce Javier González 2020-12-01 4508 NVME_MINORS, "nvme");
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4509 if (result < 0)
b227c59b9b5b8a Roy Shterman 2018-01-14 4510 goto destroy_delete_wq;
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4511
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4512 nvme_class = class_create(THIS_MODULE, "nvme");
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4513 if (IS_ERR(nvme_class)) {
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4514 result = PTR_ERR(nvme_class);
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4515 goto unregister_chrdev;
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4516 }
a42f42e5bb84d8 Sagi Grimberg 2019-09-04 4517 nvme_class->dev_uevent = nvme_class_uevent;
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4518
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4519 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem");
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4520 if (IS_ERR(nvme_subsys_class)) {
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4521 result = PTR_ERR(nvme_subsys_class);
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4522 goto destroy_class;
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4523 }
51d5434458b4f2 Minwoo Im 2021-04-07 4524
51d5434458b4f2 Minwoo Im 2021-04-07 4525 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
51d5434458b4f2 Minwoo Im 2021-04-07 4526 "nvme-generic");
51d5434458b4f2 Minwoo Im 2021-04-07 4527 if (result < 0)
51d5434458b4f2 Minwoo Im 2021-04-07 4528 goto destroy_subsys_class;
51d5434458b4f2 Minwoo Im 2021-04-07 4529
51d5434458b4f2 Minwoo Im 2021-04-07 4530 nvme_ns_chr_class = class_create(THIS_MODULE, "nvme-generic");
51d5434458b4f2 Minwoo Im 2021-04-07 4531 if (IS_ERR(nvme_ns_chr_class)) {
51d5434458b4f2 Minwoo Im 2021-04-07 @4532 result = PTR_ERR(nvme_subsys_class);
This is a copy and paste error. It should be nvme_ns_chr_class.
51d5434458b4f2 Minwoo Im 2021-04-07 4533 goto unregister_generic_ns;
51d5434458b4f2 Minwoo Im 2021-04-07 4534 }
51d5434458b4f2 Minwoo Im 2021-04-07 4535
5bae7f73d378a9 Christoph Hellwig 2015-11-28 4536 return 0;
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4537
51d5434458b4f2 Minwoo Im 2021-04-07 4538 unregister_generic_ns:
51d5434458b4f2 Minwoo Im 2021-04-07 4539 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
51d5434458b4f2 Minwoo Im 2021-04-07 4540 destroy_subsys_class:
51d5434458b4f2 Minwoo Im 2021-04-07 4541 class_destroy(nvme_subsys_class);
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4542 destroy_class:
ab9e00cc72fa4c Christoph Hellwig 2017-11-09 4543 class_destroy(nvme_class);
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4544 unregister_chrdev:
f68abd9cc00cce Javier González 2020-12-01 4545 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
b227c59b9b5b8a Roy Shterman 2018-01-14 4546 destroy_delete_wq:
b227c59b9b5b8a Roy Shterman 2018-01-14 4547 destroy_workqueue(nvme_delete_wq);
b227c59b9b5b8a Roy Shterman 2018-01-14 4548 destroy_reset_wq:
b227c59b9b5b8a Roy Shterman 2018-01-14 4549 destroy_workqueue(nvme_reset_wq);
9a6327d2f25b14 Sagi Grimberg 2017-06-07 4550 destroy_wq:
9a6327d2f25b14 Sagi Grimberg 2017-06-07 4551 destroy_workqueue(nvme_wq);
b227c59b9b5b8a Roy Shterman 2018-01-14 4552 out:
f3ca80fc11c3af Christoph Hellwig 2015-11-28 4553 return result;
5bae7f73d378a9 Christoph Hellwig 2015-11-28 4554 }
---
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1 year, 5 months
- 1
- 0
[kbuild] Re: [PATCH 1/1] of: unittest: overlay: ensure proper alignment of copied FDT
by Dan Carpenter
Hi,
url: https://github.com/0day-ci/linux/commits/frowand-list-gmail-com/of-unitte...
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: i386-randconfig-m021-20210407 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
smatch warnings:
drivers/of/overlay.c:1045 of_overlay_fdt_apply() warn: overwrite may leak 'new_fdt'
vim +/new_fdt +1045 drivers/of/overlay.c
39a751a4cb7e47 Frank Rowand 2018-02-12 1015 int of_overlay_fdt_apply(const void *overlay_fdt, u32 overlay_fdt_size,
39a751a4cb7e47 Frank Rowand 2018-02-12 1016 int *ovcs_id)
39a751a4cb7e47 Frank Rowand 2018-02-12 1017 {
7a18fbf9013a19 Frank Rowand 2021-04-07 1018 void *new_fdt;
39a751a4cb7e47 Frank Rowand 2018-02-12 1019 int ret;
39a751a4cb7e47 Frank Rowand 2018-02-12 1020 u32 size;
39a751a4cb7e47 Frank Rowand 2018-02-12 1021 struct device_node *overlay_root;
39a751a4cb7e47 Frank Rowand 2018-02-12 1022
39a751a4cb7e47 Frank Rowand 2018-02-12 1023 *ovcs_id = 0;
39a751a4cb7e47 Frank Rowand 2018-02-12 1024 ret = 0;
39a751a4cb7e47 Frank Rowand 2018-02-12 1025
39a751a4cb7e47 Frank Rowand 2018-02-12 1026 if (overlay_fdt_size < sizeof(struct fdt_header) ||
39a751a4cb7e47 Frank Rowand 2018-02-12 1027 fdt_check_header(overlay_fdt)) {
39a751a4cb7e47 Frank Rowand 2018-02-12 1028 pr_err("Invalid overlay_fdt header\n");
39a751a4cb7e47 Frank Rowand 2018-02-12 1029 return -EINVAL;
39a751a4cb7e47 Frank Rowand 2018-02-12 1030 }
39a751a4cb7e47 Frank Rowand 2018-02-12 1031
39a751a4cb7e47 Frank Rowand 2018-02-12 1032 size = fdt_totalsize(overlay_fdt);
39a751a4cb7e47 Frank Rowand 2018-02-12 1033 if (overlay_fdt_size < size)
39a751a4cb7e47 Frank Rowand 2018-02-12 1034 return -EINVAL;
39a751a4cb7e47 Frank Rowand 2018-02-12 1035
39a751a4cb7e47 Frank Rowand 2018-02-12 1036 /*
39a751a4cb7e47 Frank Rowand 2018-02-12 1037 * Must create permanent copy of FDT because of_fdt_unflatten_tree()
39a751a4cb7e47 Frank Rowand 2018-02-12 1038 * will create pointers to the passed in FDT in the unflattened tree.
39a751a4cb7e47 Frank Rowand 2018-02-12 1039 */
7a18fbf9013a19 Frank Rowand 2021-04-07 1040 size += FDT_ALIGN_SIZE;
7a18fbf9013a19 Frank Rowand 2021-04-07 1041 new_fdt = kmalloc(size, GFP_KERNEL);
39a751a4cb7e47 Frank Rowand 2018-02-12 1042 if (!new_fdt)
39a751a4cb7e47 Frank Rowand 2018-02-12 1043 return -ENOMEM;
39a751a4cb7e47 Frank Rowand 2018-02-12 1044
7a18fbf9013a19 Frank Rowand 2021-04-07 @1045 new_fdt = PTR_ALIGN(new_fdt, FDT_ALIGN_SIZE);
^^^^^^^
We're not freeing the exact same pointer that we allocated.
7a18fbf9013a19 Frank Rowand 2021-04-07 1046 memcpy(new_fdt, overlay_fdt, size);
7a18fbf9013a19 Frank Rowand 2021-04-07 1047
39a751a4cb7e47 Frank Rowand 2018-02-12 1048 of_fdt_unflatten_tree(new_fdt, NULL, &overlay_root);
39a751a4cb7e47 Frank Rowand 2018-02-12 1049 if (!overlay_root) {
39a751a4cb7e47 Frank Rowand 2018-02-12 1050 pr_err("unable to unflatten overlay_fdt\n");
39a751a4cb7e47 Frank Rowand 2018-02-12 1051 ret = -EINVAL;
39a751a4cb7e47 Frank Rowand 2018-02-12 1052 goto out_free_new_fdt;
39a751a4cb7e47 Frank Rowand 2018-02-12 1053 }
39a751a4cb7e47 Frank Rowand 2018-02-12 1054
39a751a4cb7e47 Frank Rowand 2018-02-12 1055 ret = of_overlay_apply(new_fdt, overlay_root, ovcs_id);
39a751a4cb7e47 Frank Rowand 2018-02-12 1056 if (ret < 0) {
39a751a4cb7e47 Frank Rowand 2018-02-12 1057 /*
39a751a4cb7e47 Frank Rowand 2018-02-12 1058 * new_fdt and overlay_root now belong to the overlay
39a751a4cb7e47 Frank Rowand 2018-02-12 1059 * changeset.
39a751a4cb7e47 Frank Rowand 2018-02-12 1060 * overlay changeset code is responsible for freeing them.
39a751a4cb7e47 Frank Rowand 2018-02-12 1061 */
39a751a4cb7e47 Frank Rowand 2018-02-12 1062 goto out;
39a751a4cb7e47 Frank Rowand 2018-02-12 1063 }
39a751a4cb7e47 Frank Rowand 2018-02-12 1064
39a751a4cb7e47 Frank Rowand 2018-02-12 1065 return 0;
39a751a4cb7e47 Frank Rowand 2018-02-12 1066
39a751a4cb7e47 Frank Rowand 2018-02-12 1067
39a751a4cb7e47 Frank Rowand 2018-02-12 1068 out_free_new_fdt:
39a751a4cb7e47 Frank Rowand 2018-02-12 1069 kfree(new_fdt);
39a751a4cb7e47 Frank Rowand 2018-02-12 1070
39a751a4cb7e47 Frank Rowand 2018-02-12 1071 out:
39a751a4cb7e47 Frank Rowand 2018-02-12 1072 return ret;
39a751a4cb7e47 Frank Rowand 2018-02-12 1073 }
---
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1 year, 5 months
- 1
- 0
Re: [PATCH v6 3/6] w1: ds2438: fixed a coding style issue
by kernel test robot
Hi Luiz,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.12-rc6 next-20210408]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Luiz-Sampaio/w1-ds2438-fixed-a-c...
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 17e7124aad766b3f158943acb51467f86220afe9
config: x86_64-randconfig-a004-20210409 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project dd453a1389b6a7e6d9214b449d3c54981b1a89b6)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/3ca70e59a342a9c6fd7db0bc937bbd0c8...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Luiz-Sampaio/w1-ds2438-fixed-a-coding-style-issue/20210409-121608
git checkout 3ca70e59a342a9c6fd7db0bc937bbd0c80da9711
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> drivers/w1/slaves/w1_ds2438.c:391:31: error: too many arguments provided to function-like macro invocation
static BIN_ATTR_RW(iad, 0664, iad_write, 0);
^
include/linux/sysfs.h:229:9: note: macro 'BIN_ATTR_RW' defined here
#define BIN_ATTR_RW(_name, _size) \
^
drivers/w1/slaves/w1_ds2438.c:398:3: error: use of undeclared identifier 'bin_attr_iad'; did you mean 'bin_attr_vad'?
&bin_attr_iad,
^~~~~~~~~~~~
bin_attr_vad
drivers/w1/slaves/w1_ds2438.c:394:8: note: 'bin_attr_vad' declared here
static BIN_ATTR_RO(vad, 0/* real length varies */);
^
include/linux/sysfs.h:224:22: note: expanded from macro 'BIN_ATTR_RO'
struct bin_attribute bin_attr_##_name = __BIN_ATTR_RO(_name, _size)
^
<scratch space>:113:1: note: expanded from here
bin_attr_vad
^
2 errors generated.
vim +391 drivers/w1/slaves/w1_ds2438.c
390
> 391 static BIN_ATTR_RW(iad, 0664, iad_write, 0);
392 static BIN_ATTR_RO(page0, DS2438_PAGE_SIZE);
393 static BIN_ATTR_RO(temperature, 0/* real length varies */);
394 static BIN_ATTR_RO(vad, 0/* real length varies */);
395 static BIN_ATTR_RO(vdd, 0/* real length varies */);
396
---
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1 year, 5 months
- 1
- 0
[kbuild] [ti:ti-linux-5.10.y 3321/3368] drivers/pci/controller/cadence/pci-j721e.c:417 j721e_pcie_probe() warn: missing error code 'ret'
by Dan Carpenter
tree: git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git ti-linux-5.10.y
head: 273179759172db821c14145ec1458ff926e0428b
commit: d6c94541065433e99c45a5ba4280f2af08bd329a [3321/3368] PCI: j721e: Add support to provide refclk to PCIe connector
config: i386-randconfig-m021-20210407 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
smatch warnings:
drivers/pci/controller/cadence/pci-j721e.c:417 j721e_pcie_probe() warn: missing error code 'ret'
vim +/ret +417 drivers/pci/controller/cadence/pci-j721e.c
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 303 static int j721e_pcie_probe(struct platform_device *pdev)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 304 {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 305 struct device *dev = &pdev->dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 306 struct device_node *node = dev->of_node;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 307 struct pci_host_bridge *bridge;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 308 struct j721e_pcie_data *data;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 309 struct cdns_pcie *cdns_pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 310 struct j721e_pcie *pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 311 struct cdns_pcie_rc *rc;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 312 struct cdns_pcie_ep *ep;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 313 struct gpio_desc *gpiod;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 314 void __iomem *base;
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 315 struct clk *clk;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 316 u32 num_lanes;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 317 u32 mode;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 318 int ret;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 319 int irq;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 320
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 321 data = (struct j721e_pcie_data *)of_device_get_match_data(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 322 if (!data)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 323 return -EINVAL;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 324
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 325 mode = (u32)data->mode;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 326
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 327 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 328 if (!pcie)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 329 return -ENOMEM;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 330
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 331 pcie->dev = dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 332 pcie->mode = mode;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 333
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 334 base = devm_platform_ioremap_resource_byname(pdev, "intd_cfg");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 335 if (IS_ERR(base))
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 336 return PTR_ERR(base);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 337 pcie->intd_cfg_base = base;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 338
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 339 base = devm_platform_ioremap_resource_byname(pdev, "user_cfg");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 340 if (IS_ERR(base))
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 341 return PTR_ERR(base);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 342 pcie->user_cfg_base = base;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 343
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 344 ret = of_property_read_u32(node, "num-lanes", &num_lanes);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 345 if (ret || num_lanes > MAX_LANES)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 346 num_lanes = 1;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 347 pcie->num_lanes = num_lanes;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 348
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 349 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48)))
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 350 return -EINVAL;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 351
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 352 irq = platform_get_irq_byname(pdev, "link_state");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 353 if (irq < 0)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 354 return irq;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 355
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 356 dev_set_drvdata(dev, pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 357 pm_runtime_enable(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 358 ret = pm_runtime_get_sync(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 359 if (ret < 0) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 360 dev_err(dev, "pm_runtime_get_sync failed\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 361 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 362 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 363
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 364 ret = j721e_pcie_ctrl_init(pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 365 if (ret < 0) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 366 dev_err(dev, "pm_runtime_get_sync failed\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 367 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 368 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 369
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 370 ret = devm_request_irq(dev, irq, j721e_pcie_link_irq_handler, 0,
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 371 "j721e-pcie-link-down-irq", pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 372 if (ret < 0) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 373 dev_err(dev, "failed to request link state IRQ %d\n", irq);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 374 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 375 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 376
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 377 j721e_pcie_config_link_irq(pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 378
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 379 switch (mode) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 380 case PCI_MODE_RC:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 381 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_HOST)) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 382 ret = -ENODEV;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 383 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 384 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 385
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 386 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 387 if (!bridge) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 388 ret = -ENOMEM;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 389 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 390 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 391
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 392 bridge->ops = &cdns_ti_pcie_host_ops;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 393 rc = pci_host_bridge_priv(bridge);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 394
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 395 cdns_pcie = &rc->pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 396 cdns_pcie->dev = dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 397 cdns_pcie->ops = &j721e_pcie_ops;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 398 pcie->cdns_pcie = cdns_pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 399
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 400 gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 401 if (IS_ERR(gpiod)) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 402 ret = PTR_ERR(gpiod);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 403 if (ret != -EPROBE_DEFER)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 404 dev_err(dev, "Failed to get reset GPIO\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 405 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 406 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 407
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 408 ret = cdns_pcie_init_phy(dev, cdns_pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 409 if (ret) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 410 dev_err(dev, "Failed to init phy\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 411 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 412 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 413
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 414 clk = devm_clk_get_optional(dev, "pcie_refclk");
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 415 if (IS_ERR(clk)) {
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 416 dev_err(dev, "failed to get pcie_refclk\n");
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 @417 goto err_pcie_setup;
ret = PTR_ERR(clk);
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 418 }
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 419
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 420 ret = clk_prepare_enable(clk);
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 421 if (ret) {
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 422 dev_err(dev, "failed to enable pcie_refclk\n");
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 423 goto err_get_sync;
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 424 }
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 425 pcie->refclk = clk;
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 426
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 427 /*
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 428 * "Power Sequencing and Reset Signal Timings" table in
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 429 * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 430 * indicates PERST# should be deasserted after minimum of 100us
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 431 * once REFCLK is stable. The REFCLK to the connector in RC
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 432 * mode is selected while enabling the PHY. So deassert PERST#
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 433 * after 100 us.
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 434 */
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 435 if (gpiod) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 436 usleep_range(100, 200);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 437 gpiod_set_value_cansleep(gpiod, 1);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 438 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 439
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 440 ret = cdns_pcie_host_setup(rc);
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 441 if (ret < 0) {
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 442 clk_disable_unprepare(pcie->refclk);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 443 goto err_pcie_setup;
d6c94541065433 Kishon Vijay Abraham I 2021-03-30 444 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 445
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 446 break;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 447 case PCI_MODE_EP:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 448 if (!IS_ENABLED(CONFIG_PCIE_CADENCE_EP)) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 449 ret = -ENODEV;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 450 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 451 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 452
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 453 ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 454 if (!ep) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 455 ret = -ENOMEM;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 456 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 457 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 458
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 459 cdns_pcie = &ep->pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 460 cdns_pcie->dev = dev;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 461 cdns_pcie->ops = &j721e_pcie_ops;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 462 pcie->cdns_pcie = cdns_pcie;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 463
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 464 ret = cdns_pcie_init_phy(dev, cdns_pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 465 if (ret) {
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 466 dev_err(dev, "Failed to init phy\n");
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 467 goto err_get_sync;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 468 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 469
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 470 ret = cdns_pcie_ep_setup(ep);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 471 if (ret < 0)
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 472 goto err_pcie_setup;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 473
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 474 break;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 475 default:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 476 dev_err(dev, "INVALID device type %d\n", mode);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 477 }
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 478
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 479 return 0;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 480
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 481 err_pcie_setup:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 482 cdns_pcie_disable_phy(cdns_pcie);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 483
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 484 err_get_sync:
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 485 pm_runtime_put(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 486 pm_runtime_disable(dev);
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 487
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 488 return ret;
f3e25911a430ed Kishon Vijay Abraham I 2020-07-22 489 }
---
0-DAY CI Kernel Test Service, Intel Corporation
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1 year, 5 months
- 1
- 0
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c:963:13: warning: stack frame size of 2144 bytes in function 'dml_rq_dlg_get_dlg_params'
by kernel test robot
Hi Alex,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 17e7124aad766b3f158943acb51467f86220afe9
commit: 20f2ffe504728612d7b0c34e4f8280e34251e704 drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)
date: 5 months ago
config: powerpc-randconfig-r005-20210409 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project dd453a1389b6a7e6d9214b449d3c54981b1a89b6)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit...
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 20f2ffe504728612d7b0c34e4f8280e34251e704
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c:963:13: warning: stack frame size of 2144 bytes in function 'dml_rq_dlg_get_dlg_params' [-Wframe-larger-than=]
static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
^
1 warning generated.
vim +/dml_rq_dlg_get_dlg_params +963 drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 960
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 961 // Note: currently taken in as is.
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 962 // Nice to decouple code from hw register implement and extract code that are repeated for luma and chroma.
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 @963 static void dml_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 964 const display_e2e_pipe_params_st *e2e_pipe_param,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 965 const unsigned int num_pipes,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 966 const unsigned int pipe_idx,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 967 display_dlg_regs_st *disp_dlg_regs,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 968 display_ttu_regs_st *disp_ttu_regs,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 969 const display_rq_dlg_params_st rq_dlg_param,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 970 const display_dlg_sys_params_st dlg_sys_param,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 971 const bool cstate_en,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 972 const bool pstate_en,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 973 const bool vm_en,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 974 const bool ignore_viewport_pos,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 975 const bool immediate_flip_support)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 976 {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 977 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 978 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 979 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 980 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 981 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 982 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 983
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 984 // -------------------------
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 985 // Section 1.15.2.1: OTG dependent Params
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 986 // -------------------------
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 987 // Timing
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 988 unsigned int htotal = dst->htotal;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 989 // unsigned int hblank_start = dst.hblank_start; // TODO: Remove
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 990 unsigned int hblank_end = dst->hblank_end;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 991 unsigned int vblank_start = dst->vblank_start;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 992 unsigned int vblank_end = dst->vblank_end;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 993 unsigned int min_vblank = mode_lib->ip.min_vblank_lines;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 994
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 995 double dppclk_freq_in_mhz = clks->dppclk_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 996 double dispclk_freq_in_mhz = clks->dispclk_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 997 double refclk_freq_in_mhz = clks->refclk_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 998 double pclk_freq_in_mhz = dst->pixel_rate_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 999 bool interlaced = dst->interlaced;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1000
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1001 double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1002
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1003 double min_dcfclk_mhz = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1004 double t_calc_us = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1005 double min_ttu_vblank = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1006
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1007 double min_dst_y_ttu_vblank = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1008 unsigned int dlg_vblank_start = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1009 bool dual_plane = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1010 bool mode_422 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1011 unsigned int access_dir = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1012 unsigned int vp_height_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1013 unsigned int vp_width_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1014 unsigned int vp_height_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1015 unsigned int vp_width_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1016
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1017 // Scaling
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1018 unsigned int htaps_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1019 unsigned int htaps_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1020 double hratio_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1021 double hratio_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1022 double vratio_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1023 double vratio_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1024 bool scl_enable = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1025
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1026 double line_time_in_us = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1027 // double vinit_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1028 // double vinit_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1029 // double vinit_bot_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1030 // double vinit_bot_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1031
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1032 // unsigned int swath_height_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1033 unsigned int swath_width_ub_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1034 // unsigned int dpte_bytes_per_row_ub_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1035 unsigned int dpte_groups_per_row_ub_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1036 // unsigned int meta_pte_bytes_per_frame_ub_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1037 // unsigned int meta_bytes_per_row_ub_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1038
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1039 // unsigned int swath_height_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1040 unsigned int swath_width_ub_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1041 // unsigned int dpte_bytes_per_row_ub_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1042 unsigned int dpte_groups_per_row_ub_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1043
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1044 unsigned int meta_chunks_per_row_ub_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1045 unsigned int meta_chunks_per_row_ub_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1046 unsigned int vupdate_offset = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1047 unsigned int vupdate_width = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1048 unsigned int vready_offset = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1049
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1050 unsigned int dppclk_delay_subtotal = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1051 unsigned int dispclk_delay_subtotal = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1052 unsigned int pixel_rate_delay_subtotal = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1053
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1054 unsigned int vstartup_start = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1055 unsigned int dst_x_after_scaler = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1056 unsigned int dst_y_after_scaler = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1057 double line_wait = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1058 double dst_y_prefetch = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1059 double dst_y_per_vm_vblank = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1060 double dst_y_per_row_vblank = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1061 double dst_y_per_vm_flip = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1062 double dst_y_per_row_flip = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1063 double max_dst_y_per_vm_vblank = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1064 double max_dst_y_per_row_vblank = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1065 double lsw = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1066 double vratio_pre_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1067 double vratio_pre_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1068 unsigned int req_per_swath_ub_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1069 unsigned int req_per_swath_ub_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1070 unsigned int meta_row_height_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1071 unsigned int meta_row_height_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1072 unsigned int swath_width_pixels_ub_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1073 unsigned int swath_width_pixels_ub_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1074 unsigned int scaler_rec_in_width_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1075 unsigned int scaler_rec_in_width_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1076 unsigned int dpte_row_height_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1077 unsigned int dpte_row_height_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1078 double hscale_pixel_rate_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1079 double hscale_pixel_rate_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1080 double min_hratio_fact_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1081 double min_hratio_fact_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1082 double refcyc_per_line_delivery_pre_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1083 double refcyc_per_line_delivery_pre_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1084 double refcyc_per_line_delivery_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1085 double refcyc_per_line_delivery_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1086
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1087 double refcyc_per_req_delivery_pre_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1088 double refcyc_per_req_delivery_pre_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1089 double refcyc_per_req_delivery_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1090 double refcyc_per_req_delivery_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1091
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1092 unsigned int full_recout_width = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1093 double refcyc_per_req_delivery_pre_cur0 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1094 double refcyc_per_req_delivery_cur0 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1095 double refcyc_per_req_delivery_pre_cur1 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1096 double refcyc_per_req_delivery_cur1 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1097
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1098 unsigned int pipe_index_in_combine[DC__NUM_PIPES__MAX] = { 0 };
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1099
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1100 memset(disp_dlg_regs, 0, sizeof(*disp_dlg_regs));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1101 memset(disp_ttu_regs, 0, sizeof(*disp_ttu_regs));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1102
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1103 dml_print("DML_DLG: %s: cstate_en = %d\n", __func__, cstate_en);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1104 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1105 dml_print("DML_DLG: %s: vm_en = %d\n", __func__, vm_en);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1106 dml_print("DML_DLG: %s: ignore_viewport_pos = %d\n", __func__, ignore_viewport_pos);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1107 dml_print("DML_DLG: %s: immediate_flip_support = %d\n", __func__, immediate_flip_support);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1108
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1109 dml_print("DML_DLG: %s: dppclk_freq_in_mhz = %3.2f\n", __func__, dppclk_freq_in_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1110 dml_print("DML_DLG: %s: dispclk_freq_in_mhz = %3.2f\n", __func__, dispclk_freq_in_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1111 dml_print("DML_DLG: %s: refclk_freq_in_mhz = %3.2f\n", __func__, refclk_freq_in_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1112 dml_print("DML_DLG: %s: pclk_freq_in_mhz = %3.2f\n", __func__, pclk_freq_in_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1113 dml_print("DML_DLG: %s: interlaced = %d\n", __func__, interlaced);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1114 ASSERT(ref_freq_to_pix_freq < 4.0);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1115
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1116 disp_dlg_regs->ref_freq_to_pix_freq =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1117 (unsigned int)(ref_freq_to_pix_freq * dml_pow(2, 19));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1118 disp_dlg_regs->refcyc_per_htotal = (unsigned int)(ref_freq_to_pix_freq * (double)htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1119 * dml_pow(2, 8));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1120 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1121
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1122 min_dcfclk_mhz = dlg_sys_param.deepsleep_dcfclk_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1123 t_calc_us = get_tcalc(mode_lib, e2e_pipe_param, num_pipes);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1124 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1125
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1126 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double)htotal;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1127 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1128
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1129 disp_dlg_regs->min_dst_y_next_start = (unsigned int)(((double)dlg_vblank_start
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1130 ) * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1131 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1132
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1133 dml_print("DML_DLG: %s: min_dcfclk_mhz = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1134 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1135 min_dcfclk_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1136 dml_print("DML_DLG: %s: min_ttu_vblank = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1137 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1138 min_ttu_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1139 dml_print("DML_DLG: %s: min_dst_y_ttu_vblank = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1140 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1141 min_dst_y_ttu_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1142 dml_print("DML_DLG: %s: t_calc_us = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1143 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1144 t_calc_us);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1145 dml_print("DML_DLG: %s: disp_dlg_regs->min_dst_y_next_start = 0x%0x\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1146 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1147 disp_dlg_regs->min_dst_y_next_start);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1148 dml_print("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1149 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1150 ref_freq_to_pix_freq);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1151
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1152 // -------------------------
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1153 // Section 1.15.2.2: Prefetch, Active and TTU
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1154 // -------------------------
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1155 // Prefetch Calc
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1156 // Source
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1157 // dcc_en = src.dcc;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1158 dual_plane = is_dual_plane((enum source_format_class)(src->source_format));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1159 mode_422 = 0; // TODO
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1160 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1161 vp_height_l = src->viewport_height;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1162 vp_width_l = src->viewport_width;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1163 vp_height_c = src->viewport_height_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1164 vp_width_c = src->viewport_width_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1165
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1166 // Scaling
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1167 htaps_l = taps->htaps;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1168 htaps_c = taps->htaps_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1169 hratio_l = scl->hscl_ratio;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1170 hratio_c = scl->hscl_ratio_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1171 vratio_l = scl->vscl_ratio;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1172 vratio_c = scl->vscl_ratio_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1173 scl_enable = scl->scl_enable;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1174
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1175 line_time_in_us = (htotal / pclk_freq_in_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1176 swath_width_ub_l = rq_dlg_param.rq_l.swath_width_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1177 dpte_groups_per_row_ub_l = rq_dlg_param.rq_l.dpte_groups_per_row_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1178 swath_width_ub_c = rq_dlg_param.rq_c.swath_width_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1179 dpte_groups_per_row_ub_c = rq_dlg_param.rq_c.dpte_groups_per_row_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1180
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1181 meta_chunks_per_row_ub_l = rq_dlg_param.rq_l.meta_chunks_per_row_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1182 meta_chunks_per_row_ub_c = rq_dlg_param.rq_c.meta_chunks_per_row_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1183 vupdate_offset = dst->vupdate_offset;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1184 vupdate_width = dst->vupdate_width;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1185 vready_offset = dst->vready_offset;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1186
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1187 dppclk_delay_subtotal = mode_lib->ip.dppclk_delay_subtotal;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1188 dispclk_delay_subtotal = mode_lib->ip.dispclk_delay_subtotal;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1189
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1190 if (scl_enable)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1191 dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1192 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1193 dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_scl_lb_only;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1194
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1195 dppclk_delay_subtotal += mode_lib->ip.dppclk_delay_cnvc_formatter
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1196 + src->num_cursors * mode_lib->ip.dppclk_delay_cnvc_cursor;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1197
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1198 if (dout->dsc_enable) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1199 double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1200
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1201 dispclk_delay_subtotal += dsc_delay;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1202 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1203
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1204 pixel_rate_delay_subtotal = dppclk_delay_subtotal * pclk_freq_in_mhz / dppclk_freq_in_mhz
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1205 + dispclk_delay_subtotal * pclk_freq_in_mhz / dispclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1206
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1207 vstartup_start = dst->vstartup_start;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1208 if (interlaced) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1209 if (vstartup_start / 2.0
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1210 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1211 <= vblank_end / 2.0)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1212 disp_dlg_regs->vready_after_vcount0 = 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1213 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1214 disp_dlg_regs->vready_after_vcount0 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1215 } else {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1216 if (vstartup_start
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1217 - (double)(vready_offset + vupdate_width + vupdate_offset) / htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1218 <= vblank_end)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1219 disp_dlg_regs->vready_after_vcount0 = 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1220 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1221 disp_dlg_regs->vready_after_vcount0 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1222 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1223
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1224 // TODO: Where is this coming from?
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1225 if (interlaced)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1226 vstartup_start = vstartup_start / 2;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1227
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1228 // TODO: What if this min_vblank doesn't match the value in the dml_config_settings.cpp?
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1229 if (vstartup_start >= min_vblank) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1230 dml_print("WARNING: DML_DLG: %s: vblank_start=%d vblank_end=%d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1231 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1232 vblank_start,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1233 vblank_end);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1234 dml_print("WARNING: DML_DLG: %s: vstartup_start=%d should be less than min_vblank=%d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1235 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1236 vstartup_start,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1237 min_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1238 min_vblank = vstartup_start + 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1239 dml_print("WARNING: DML_DLG: %s: vstartup_start=%d should be less than min_vblank=%d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1240 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1241 vstartup_start,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1242 min_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1243 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1244
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1245 dst_x_after_scaler = get_dst_x_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1246 dst_y_after_scaler = get_dst_y_after_scaler(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1247
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1248 // do some adjustment on the dst_after scaler to account for odm combine mode
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1249 dml_print("DML_DLG: %s: input dst_x_after_scaler = %d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1250 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1251 dst_x_after_scaler);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1252 dml_print("DML_DLG: %s: input dst_y_after_scaler = %d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1253 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1254 dst_y_after_scaler);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1255
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1256 // need to figure out which side of odm combine we're in
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1257 if (dst->odm_combine) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1258 // figure out which pipes go together
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1259 bool visited[DC__NUM_PIPES__MAX] = { false };
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1260 unsigned int i, j, k;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1261
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1262 for (k = 0; k < num_pipes; ++k) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1263 visited[k] = false;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1264 pipe_index_in_combine[k] = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1265 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1266
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1267 for (i = 0; i < num_pipes; i++) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1268 if (e2e_pipe_param[i].pipe.src.is_hsplit && !visited[i]) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1269
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1270 unsigned int grp = e2e_pipe_param[i].pipe.src.hsplit_grp;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1271 unsigned int grp_idx = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1272
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1273 for (j = i; j < num_pipes; j++) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1274 if (e2e_pipe_param[j].pipe.src.hsplit_grp == grp
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1275 && e2e_pipe_param[j].pipe.src.is_hsplit && !visited[j]) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1276 pipe_index_in_combine[j] = grp_idx;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1277 dml_print("DML_DLG: %s: pipe[%d] is in grp %d idx %d\n", __func__, j, grp, grp_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1278 grp_idx++;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1279 visited[j] = true;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1280 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1281 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1282 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1283 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1284
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1285 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1286
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1287 if (dst->odm_combine == dm_odm_combine_mode_disabled) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1288 disp_dlg_regs->refcyc_h_blank_end = (unsigned int)((double) hblank_end * ref_freq_to_pix_freq);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1289 } else {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1290 unsigned int odm_combine_factor = (dst->odm_combine == dm_odm_combine_mode_2to1 ? 2 : 4); // TODO: We should really check that 4to1 is supported before setting it to 4
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1291 unsigned int odm_pipe_index = pipe_index_in_combine[pipe_idx];
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1292 disp_dlg_regs->refcyc_h_blank_end = (unsigned int)(((double) hblank_end + odm_pipe_index * (double) dst->hactive / odm_combine_factor) * ref_freq_to_pix_freq);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1293 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1294 ASSERT(disp_dlg_regs->refcyc_h_blank_end < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1295
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1296 dml_print("DML_DLG: %s: htotal = %d\n", __func__, htotal);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1297 dml_print("DML_DLG: %s: pixel_rate_delay_subtotal = %d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1298 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1299 pixel_rate_delay_subtotal);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1300 dml_print("DML_DLG: %s: dst_x_after_scaler[%d] = %d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1301 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1302 pipe_idx,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1303 dst_x_after_scaler);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1304 dml_print("DML_DLG: %s: dst_y_after_scaler[%d] = %d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1305 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1306 pipe_idx,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1307 dst_y_after_scaler);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1308
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1309 // Lwait
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1310 // TODO: Should this be urgent_latency_pixel_mixed_with_vm_data_us?
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1311 line_wait = mode_lib->soc.urgent_latency_pixel_data_only_us;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1312 if (cstate_en)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1313 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1314 if (pstate_en)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1315 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1316 + mode_lib->soc.urgent_latency_pixel_data_only_us, // TODO: Should this be urgent_latency_pixel_mixed_with_vm_data_us?
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1317 line_wait);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1318 line_wait = line_wait / line_time_in_us;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1319
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1320 dst_y_prefetch = get_dst_y_prefetch(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1321 dml_print("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, dst_y_prefetch);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1322
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1323 dst_y_per_vm_vblank = get_dst_y_per_vm_vblank(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1324 e2e_pipe_param,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1325 num_pipes,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1326 pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1327 dst_y_per_row_vblank = get_dst_y_per_row_vblank(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1328 e2e_pipe_param,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1329 num_pipes,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1330 pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1331 dst_y_per_vm_flip = get_dst_y_per_vm_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1332 dst_y_per_row_flip = get_dst_y_per_row_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1333
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1334 max_dst_y_per_vm_vblank = 32.0; //U5.2
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1335 max_dst_y_per_row_vblank = 16.0; //U4.2
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1336
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1337 // magic!
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1338 if (htotal <= 75) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1339 min_vblank = 300;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1340 max_dst_y_per_vm_vblank = 100.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1341 max_dst_y_per_row_vblank = 100.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1342 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1343
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1344 dml_print("DML_DLG: %s: dst_y_per_vm_flip = %3.2f\n", __func__, dst_y_per_vm_flip);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1345 dml_print("DML_DLG: %s: dst_y_per_row_flip = %3.2f\n", __func__, dst_y_per_row_flip);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1346 dml_print("DML_DLG: %s: dst_y_per_vm_vblank = %3.2f\n", __func__, dst_y_per_vm_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1347 dml_print("DML_DLG: %s: dst_y_per_row_vblank = %3.2f\n", __func__, dst_y_per_row_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1348
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1349 ASSERT(dst_y_per_vm_vblank < max_dst_y_per_vm_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1350 ASSERT(dst_y_per_row_vblank < max_dst_y_per_row_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1351
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1352 ASSERT(dst_y_prefetch > (dst_y_per_vm_vblank + dst_y_per_row_vblank));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1353 lsw = dst_y_prefetch - (dst_y_per_vm_vblank + dst_y_per_row_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1354
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1355 dml_print("DML_DLG: %s: lsw = %3.2f\n", __func__, lsw);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1356
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1357 vratio_pre_l = get_vratio_prefetch_l(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1358 vratio_pre_c = get_vratio_prefetch_c(mode_lib, e2e_pipe_param, num_pipes, pipe_idx);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1359
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1360 dml_print("DML_DLG: %s: vratio_pre_l=%3.2f\n", __func__, vratio_pre_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1361 dml_print("DML_DLG: %s: vratio_pre_c=%3.2f\n", __func__, vratio_pre_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1362
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1363 // Active
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1364 req_per_swath_ub_l = rq_dlg_param.rq_l.req_per_swath_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1365 req_per_swath_ub_c = rq_dlg_param.rq_c.req_per_swath_ub;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1366 meta_row_height_l = rq_dlg_param.rq_l.meta_row_height;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1367 meta_row_height_c = rq_dlg_param.rq_c.meta_row_height;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1368 swath_width_pixels_ub_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1369 swath_width_pixels_ub_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1370 scaler_rec_in_width_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1371 scaler_rec_in_width_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1372 dpte_row_height_l = rq_dlg_param.rq_l.dpte_row_height;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1373 dpte_row_height_c = rq_dlg_param.rq_c.dpte_row_height;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1374
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1375 if (mode_422) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1376 swath_width_pixels_ub_l = swath_width_ub_l * 2; // *2 for 2 pixel per element
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1377 swath_width_pixels_ub_c = swath_width_ub_c * 2;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1378 } else {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1379 swath_width_pixels_ub_l = swath_width_ub_l * 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1380 swath_width_pixels_ub_c = swath_width_ub_c * 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1381 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1382
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1383 hscale_pixel_rate_l = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1384 hscale_pixel_rate_c = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1385 min_hratio_fact_l = 1.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1386 min_hratio_fact_c = 1.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1387
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1388 if (hratio_l <= 1)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1389 min_hratio_fact_l = 2.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1390 else if (htaps_l <= 6) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1391 if ((hratio_l * 2.0) > 4.0)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1392 min_hratio_fact_l = 4.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1393 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1394 min_hratio_fact_l = hratio_l * 2.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1395 } else {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1396 if (hratio_l > 4.0)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1397 min_hratio_fact_l = 4.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1398 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1399 min_hratio_fact_l = hratio_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1400 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1401
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1402 hscale_pixel_rate_l = min_hratio_fact_l * dppclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1403
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1404 if (hratio_c <= 1)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1405 min_hratio_fact_c = 2.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1406 else if (htaps_c <= 6) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1407 if ((hratio_c * 2.0) > 4.0)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1408 min_hratio_fact_c = 4.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1409 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1410 min_hratio_fact_c = hratio_c * 2.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1411 } else {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1412 if (hratio_c > 4.0)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1413 min_hratio_fact_c = 4.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1414 else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1415 min_hratio_fact_c = hratio_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1416 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1417
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1418 hscale_pixel_rate_c = min_hratio_fact_c * dppclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1419
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1420 refcyc_per_line_delivery_pre_l = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1421 refcyc_per_line_delivery_pre_c = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1422 refcyc_per_line_delivery_l = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1423 refcyc_per_line_delivery_c = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1424
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1425 refcyc_per_req_delivery_pre_l = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1426 refcyc_per_req_delivery_pre_c = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1427 refcyc_per_req_delivery_l = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1428 refcyc_per_req_delivery_c = 0.;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1429
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1430 full_recout_width = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1431 // In ODM
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1432 if (src->is_hsplit) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1433 // This "hack" is only allowed (and valid) for MPC combine. In ODM
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1434 // combine, you MUST specify the full_recout_width...according to Oswin
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1435 if (dst->full_recout_width == 0 && !dst->odm_combine) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1436 dml_print("DML_DLG: %s: Warning: full_recout_width not set in hsplit mode\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1437 __func__);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1438 full_recout_width = dst->recout_width * 2; // assume half split for dcn1
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1439 } else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1440 full_recout_width = dst->full_recout_width;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1441 } else
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1442 full_recout_width = dst->recout_width;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1443
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1444 // As of DCN2, mpc_combine and odm_combine are mutually exclusive
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1445 refcyc_per_line_delivery_pre_l = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1446 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1447 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1448 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1449 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1450 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1451 vratio_pre_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1452 hscale_pixel_rate_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1453 swath_width_pixels_ub_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1454 1); // per line
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1455
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1456 refcyc_per_line_delivery_l = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1457 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1458 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1459 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1460 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1461 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1462 vratio_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1463 hscale_pixel_rate_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1464 swath_width_pixels_ub_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1465 1); // per line
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1466
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1467 dml_print("DML_DLG: %s: full_recout_width = %d\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1468 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1469 full_recout_width);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1470 dml_print("DML_DLG: %s: hscale_pixel_rate_l = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1471 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1472 hscale_pixel_rate_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1473 dml_print("DML_DLG: %s: refcyc_per_line_delivery_pre_l = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1474 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1475 refcyc_per_line_delivery_pre_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1476 dml_print("DML_DLG: %s: refcyc_per_line_delivery_l = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1477 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1478 refcyc_per_line_delivery_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1479
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1480 if (dual_plane) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1481 refcyc_per_line_delivery_pre_c = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1482 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1483 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1484 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1485 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1486 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1487 vratio_pre_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1488 hscale_pixel_rate_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1489 swath_width_pixels_ub_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1490 1); // per line
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1491
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1492 refcyc_per_line_delivery_c = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1493 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1494 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1495 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1496 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1497 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1498 vratio_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1499 hscale_pixel_rate_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1500 swath_width_pixels_ub_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1501 1); // per line
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1502
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1503 dml_print("DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1504 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1505 refcyc_per_line_delivery_pre_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1506 dml_print("DML_DLG: %s: refcyc_per_line_delivery_c = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1507 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1508 refcyc_per_line_delivery_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1509 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1510
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1511 // smehta: this is a hack added until we get the real dml, sorry, need to make progress
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1512 if (src->dynamic_metadata_enable && src->gpuvm) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1513 unsigned int levels = mode_lib->ip.gpuvm_max_page_table_levels;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1514 double ref_cycles;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1515
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1516 if (src->hostvm)
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1517 levels = levels * (mode_lib->ip.hostvm_max_page_table_levels+1);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1518
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1519 ref_cycles = (levels * mode_lib->soc.urgent_latency_vm_data_only_us) * refclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1520 dml_print("BENyamin: dst_y_prefetch = %f %d %f %f \n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1521 ref_cycles, levels, mode_lib->soc.urgent_latency_vm_data_only_us, refclk_freq_in_mhz);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1522 disp_dlg_regs->refcyc_per_vm_dmdata = (unsigned int) ref_cycles;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1523 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1524 dml_print("BENyamin: dmdta_en vm = %d %d \n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1525 src->dynamic_metadata_enable, src->vm);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1526 // TTU - Luma / Chroma
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1527 if (access_dir) { // vertical access
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1528 scaler_rec_in_width_l = vp_height_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1529 scaler_rec_in_width_c = vp_height_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1530 } else {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1531 scaler_rec_in_width_l = vp_width_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1532 scaler_rec_in_width_c = vp_width_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1533 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1534
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1535 refcyc_per_req_delivery_pre_l = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1536 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1537 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1538 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1539 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1540 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1541 vratio_pre_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1542 hscale_pixel_rate_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1543 scaler_rec_in_width_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1544 req_per_swath_ub_l); // per req
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1545 refcyc_per_req_delivery_l = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1546 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1547 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1548 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1549 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1550 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1551 vratio_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1552 hscale_pixel_rate_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1553 scaler_rec_in_width_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1554 req_per_swath_ub_l); // per req
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1555
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1556 dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1557 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1558 refcyc_per_req_delivery_pre_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1559 dml_print("DML_DLG: %s: refcyc_per_req_delivery_l = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1560 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1561 refcyc_per_req_delivery_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1562
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1563 ASSERT(refcyc_per_req_delivery_pre_l < dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1564 ASSERT(refcyc_per_req_delivery_l < dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1565
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1566 if (dual_plane) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1567 refcyc_per_req_delivery_pre_c = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1568 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1569 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1570 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1571 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1572 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1573 vratio_pre_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1574 hscale_pixel_rate_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1575 scaler_rec_in_width_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1576 req_per_swath_ub_c); // per req
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1577 refcyc_per_req_delivery_c = get_refcyc_per_delivery(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1578 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1579 pclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1580 dst->odm_combine,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1581 full_recout_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1582 dst->hactive,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1583 vratio_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1584 hscale_pixel_rate_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1585 scaler_rec_in_width_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1586 req_per_swath_ub_c); // per req
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1587
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1588 dml_print("DML_DLG: %s: refcyc_per_req_delivery_pre_c = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1589 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1590 refcyc_per_req_delivery_pre_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1591 dml_print("DML_DLG: %s: refcyc_per_req_delivery_c = %3.2f\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1592 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1593 refcyc_per_req_delivery_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1594
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1595 ASSERT(refcyc_per_req_delivery_pre_c < dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1596 ASSERT(refcyc_per_req_delivery_c < dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1597 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1598
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1599 // TTU - Cursor
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1600 refcyc_per_req_delivery_pre_cur0 = 0.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1601 refcyc_per_req_delivery_cur0 = 0.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1602 if (src->num_cursors > 0) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1603 calculate_ttu_cursor(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1604 &refcyc_per_req_delivery_pre_cur0,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1605 &refcyc_per_req_delivery_cur0,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1606 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1607 ref_freq_to_pix_freq,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1608 hscale_pixel_rate_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1609 scl->hscl_ratio,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1610 vratio_pre_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1611 vratio_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1612 src->cur0_src_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1613 (enum cursor_bpp)(src->cur0_bpp));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1614 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1615
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1616 refcyc_per_req_delivery_pre_cur1 = 0.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1617 refcyc_per_req_delivery_cur1 = 0.0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1618 if (src->num_cursors > 1) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1619 calculate_ttu_cursor(mode_lib,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1620 &refcyc_per_req_delivery_pre_cur1,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1621 &refcyc_per_req_delivery_cur1,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1622 refclk_freq_in_mhz,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1623 ref_freq_to_pix_freq,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1624 hscale_pixel_rate_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1625 scl->hscl_ratio,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1626 vratio_pre_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1627 vratio_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1628 src->cur1_src_width,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1629 (enum cursor_bpp)(src->cur1_bpp));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1630 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1631
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1632 // TTU - Misc
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1633 // all hard-coded
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1634
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1635 // Assignment to register structures
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1636 disp_dlg_regs->dst_y_after_scaler = dst_y_after_scaler; // in terms of line
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1637 ASSERT(disp_dlg_regs->dst_y_after_scaler < (unsigned int)8);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1638 disp_dlg_regs->refcyc_x_after_scaler = dst_x_after_scaler * ref_freq_to_pix_freq; // in terms of refclk
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1639 ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1640 disp_dlg_regs->dst_y_prefetch = (unsigned int)(dst_y_prefetch * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1641 disp_dlg_regs->dst_y_per_vm_vblank = (unsigned int)(dst_y_per_vm_vblank * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1642 disp_dlg_regs->dst_y_per_row_vblank = (unsigned int)(dst_y_per_row_vblank * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1643 disp_dlg_regs->dst_y_per_vm_flip = (unsigned int)(dst_y_per_vm_flip * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1644 disp_dlg_regs->dst_y_per_row_flip = (unsigned int)(dst_y_per_row_flip * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1645
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1646 disp_dlg_regs->vratio_prefetch = (unsigned int)(vratio_pre_l * dml_pow(2, 19));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1647 disp_dlg_regs->vratio_prefetch_c = (unsigned int)(vratio_pre_c * dml_pow(2, 19));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1648
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1649 dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1650 dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_vblank);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1651 dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_vm_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_vm_flip);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1652 dml_print("DML_DLG: %s: disp_dlg_regs->dst_y_per_row_flip = 0x%x\n", __func__, disp_dlg_regs->dst_y_per_row_flip);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1653 disp_dlg_regs->refcyc_per_pte_group_vblank_l =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1654 (unsigned int)(dst_y_per_row_vblank * (double)htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1655 * ref_freq_to_pix_freq / (double)dpte_groups_per_row_ub_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1656 ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_l < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1657
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1658 if (dual_plane) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1659 disp_dlg_regs->refcyc_per_pte_group_vblank_c = (unsigned int)(dst_y_per_row_vblank
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1660 * (double)htotal * ref_freq_to_pix_freq
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1661 / (double)dpte_groups_per_row_ub_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1662 ASSERT(disp_dlg_regs->refcyc_per_pte_group_vblank_c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1663 < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1664 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1665
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1666 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1667 (unsigned int)(dst_y_per_row_vblank * (double)htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1668 * ref_freq_to_pix_freq / (double)meta_chunks_per_row_ub_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1669 ASSERT(disp_dlg_regs->refcyc_per_meta_chunk_vblank_l < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1670
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1671 disp_dlg_regs->refcyc_per_meta_chunk_vblank_c =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1672 disp_dlg_regs->refcyc_per_meta_chunk_vblank_l; // dcc for 4:2:0 is not supported in dcn1.0. assigned to be the same as _l for now
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1673
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1674 disp_dlg_regs->refcyc_per_pte_group_flip_l = (unsigned int)(dst_y_per_row_flip * htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1675 * ref_freq_to_pix_freq) / dpte_groups_per_row_ub_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1676 disp_dlg_regs->refcyc_per_meta_chunk_flip_l = (unsigned int)(dst_y_per_row_flip * htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1677 * ref_freq_to_pix_freq) / meta_chunks_per_row_ub_l;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1678
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1679 if (dual_plane) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1680 disp_dlg_regs->refcyc_per_pte_group_flip_c = (unsigned int)(dst_y_per_row_flip
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1681 * htotal * ref_freq_to_pix_freq) / dpte_groups_per_row_ub_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1682 disp_dlg_regs->refcyc_per_meta_chunk_flip_c = (unsigned int)(dst_y_per_row_flip
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1683 * htotal * ref_freq_to_pix_freq) / meta_chunks_per_row_ub_c;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1684 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1685
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1686 disp_dlg_regs->refcyc_per_vm_group_vblank = get_refcyc_per_vm_group_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1687 disp_dlg_regs->refcyc_per_vm_group_flip = get_refcyc_per_vm_group_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1688 disp_dlg_regs->refcyc_per_vm_req_vblank = get_refcyc_per_vm_req_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1689 disp_dlg_regs->refcyc_per_vm_req_flip = get_refcyc_per_vm_req_flip(mode_lib, e2e_pipe_param, num_pipes, pipe_idx) * refclk_freq_in_mhz * dml_pow(2, 10);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1690
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1691 // Clamp to max for now
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1692 if (disp_dlg_regs->refcyc_per_vm_group_vblank >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1693 disp_dlg_regs->refcyc_per_vm_group_vblank = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1694
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1695 if (disp_dlg_regs->refcyc_per_vm_group_flip >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1696 disp_dlg_regs->refcyc_per_vm_group_flip = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1697
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1698 if (disp_dlg_regs->refcyc_per_vm_req_vblank >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1699 disp_dlg_regs->refcyc_per_vm_req_vblank = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1700
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1701 if (disp_dlg_regs->refcyc_per_vm_req_flip >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1702 disp_dlg_regs->refcyc_per_vm_req_flip = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1703
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1704 disp_dlg_regs->dst_y_per_pte_row_nom_l = (unsigned int)((double)dpte_row_height_l
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1705 / (double)vratio_l * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1706 ASSERT(disp_dlg_regs->dst_y_per_pte_row_nom_l < (unsigned int)dml_pow(2, 17));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1707
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1708 if (dual_plane) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1709 disp_dlg_regs->dst_y_per_pte_row_nom_c = (unsigned int)((double)dpte_row_height_c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1710 / (double)vratio_c * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1711 if (disp_dlg_regs->dst_y_per_pte_row_nom_c >= (unsigned int)dml_pow(2, 17)) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1712 dml_print("DML_DLG: %s: Warning dst_y_per_pte_row_nom_c %u larger than supported by register format U15.2 %u\n",
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1713 __func__,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1714 disp_dlg_regs->dst_y_per_pte_row_nom_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1715 (unsigned int)dml_pow(2, 17) - 1);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1716 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1717 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1718
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1719 disp_dlg_regs->dst_y_per_meta_row_nom_l = (unsigned int)((double)meta_row_height_l
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1720 / (double)vratio_l * dml_pow(2, 2));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1721 ASSERT(disp_dlg_regs->dst_y_per_meta_row_nom_l < (unsigned int)dml_pow(2, 17));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1722
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1723 disp_dlg_regs->dst_y_per_meta_row_nom_c = disp_dlg_regs->dst_y_per_meta_row_nom_l; // TODO: dcc for 4:2:0 is not supported in dcn1.0. assigned to be the same as _l for now
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1724
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1725 dml_print("DML: Trow: %fus\n", line_time_in_us * (double)dpte_row_height_l / (double)vratio_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1726
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1727 disp_dlg_regs->refcyc_per_pte_group_nom_l = (unsigned int)((double)dpte_row_height_l
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1728 / (double)vratio_l * (double)htotal * ref_freq_to_pix_freq
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1729 / (double)dpte_groups_per_row_ub_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1730 if (disp_dlg_regs->refcyc_per_pte_group_nom_l >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1731 disp_dlg_regs->refcyc_per_pte_group_nom_l = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1732 disp_dlg_regs->refcyc_per_meta_chunk_nom_l = (unsigned int)((double)meta_row_height_l
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1733 / (double)vratio_l * (double)htotal * ref_freq_to_pix_freq
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1734 / (double)meta_chunks_per_row_ub_l);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1735 if (disp_dlg_regs->refcyc_per_meta_chunk_nom_l >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1736 disp_dlg_regs->refcyc_per_meta_chunk_nom_l = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1737
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1738 if (dual_plane) {
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1739 disp_dlg_regs->refcyc_per_pte_group_nom_c =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1740 (unsigned int)((double)dpte_row_height_c / (double)vratio_c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1741 * (double)htotal * ref_freq_to_pix_freq
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1742 / (double)dpte_groups_per_row_ub_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1743 if (disp_dlg_regs->refcyc_per_pte_group_nom_c >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1744 disp_dlg_regs->refcyc_per_pte_group_nom_c = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1745
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1746 // TODO: Is this the right calculation? Does htotal need to be halved?
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1747 disp_dlg_regs->refcyc_per_meta_chunk_nom_c =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1748 (unsigned int)((double)meta_row_height_c / (double)vratio_c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1749 * (double)htotal * ref_freq_to_pix_freq
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1750 / (double)meta_chunks_per_row_ub_c);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1751 if (disp_dlg_regs->refcyc_per_meta_chunk_nom_c >= (unsigned int)dml_pow(2, 23))
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1752 disp_dlg_regs->refcyc_per_meta_chunk_nom_c = dml_pow(2, 23) - 1;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1753 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1754
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1755 disp_dlg_regs->refcyc_per_line_delivery_pre_l = (unsigned int)dml_floor(refcyc_per_line_delivery_pre_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1756 1);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1757 disp_dlg_regs->refcyc_per_line_delivery_l = (unsigned int)dml_floor(refcyc_per_line_delivery_l,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1758 1);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1759 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_l < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1760 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_l < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1761
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1762 disp_dlg_regs->refcyc_per_line_delivery_pre_c = (unsigned int)dml_floor(refcyc_per_line_delivery_pre_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1763 1);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1764 disp_dlg_regs->refcyc_per_line_delivery_c = (unsigned int)dml_floor(refcyc_per_line_delivery_c,
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1765 1);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1766 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_pre_c < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1767 ASSERT(disp_dlg_regs->refcyc_per_line_delivery_c < (unsigned int)dml_pow(2, 13));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1768
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1769 disp_dlg_regs->chunk_hdl_adjust_cur0 = 3;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1770 disp_dlg_regs->dst_y_offset_cur0 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1771 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1772 disp_dlg_regs->dst_y_offset_cur1 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1773
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1774 disp_dlg_regs->dst_y_delta_drq_limit = 0x7fff; // off
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1775
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1776 disp_ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int)(refcyc_per_req_delivery_pre_l
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1777 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1778 disp_ttu_regs->refcyc_per_req_delivery_l = (unsigned int)(refcyc_per_req_delivery_l
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1779 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1780 disp_ttu_regs->refcyc_per_req_delivery_pre_c = (unsigned int)(refcyc_per_req_delivery_pre_c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1781 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1782 disp_ttu_regs->refcyc_per_req_delivery_c = (unsigned int)(refcyc_per_req_delivery_c
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1783 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1784 disp_ttu_regs->refcyc_per_req_delivery_pre_cur0 =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1785 (unsigned int)(refcyc_per_req_delivery_pre_cur0 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1786 disp_ttu_regs->refcyc_per_req_delivery_cur0 = (unsigned int)(refcyc_per_req_delivery_cur0
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1787 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1788 disp_ttu_regs->refcyc_per_req_delivery_pre_cur1 =
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1789 (unsigned int)(refcyc_per_req_delivery_pre_cur1 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1790 disp_ttu_regs->refcyc_per_req_delivery_cur1 = (unsigned int)(refcyc_per_req_delivery_cur1
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1791 * dml_pow(2, 10));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1792 disp_ttu_regs->qos_level_low_wm = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1793 ASSERT(disp_ttu_regs->qos_level_low_wm < dml_pow(2, 14));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1794 disp_ttu_regs->qos_level_high_wm = (unsigned int)(4.0 * (double)htotal
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1795 * ref_freq_to_pix_freq);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1796 ASSERT(disp_ttu_regs->qos_level_high_wm < dml_pow(2, 14));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1797
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1798 disp_ttu_regs->qos_level_flip = 14;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1799 disp_ttu_regs->qos_level_fixed_l = 8;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1800 disp_ttu_regs->qos_level_fixed_c = 8;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1801 disp_ttu_regs->qos_level_fixed_cur0 = 8;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1802 disp_ttu_regs->qos_ramp_disable_l = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1803 disp_ttu_regs->qos_ramp_disable_c = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1804 disp_ttu_regs->qos_ramp_disable_cur0 = 0;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1805
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1806 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz;
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1807 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24));
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1808
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1809 print__ttu_regs_st(mode_lib, *disp_ttu_regs);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1810 print__dlg_regs_st(mode_lib, *disp_dlg_regs);
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1811 }
6725a88f88a7e9 Bhawanpreet Lakha 2020-05-21 1812
:::::: The code at line 963 was first introduced by commit
:::::: 6725a88f88a7e922e91c45bf83d320487810c192 drm/amd/display: Add DCN3 DML
:::::: TO: Bhawanpreet Lakha <Bhawanpreet.Lakha(a)amd.com>
:::::: CC: Alex Deucher <alexander.deucher(a)amd.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 5 months
- 1
- 0
[kbuild] Re: [PATCH net-next v2 1/2] of: net: pass the dst buffer to of_get_mac_address()
by Dan Carpenter
Hi Michael,
I love your patch! Perhaps something to improve:
[auto build test WARNING on net-next/master]
url: https://github.com/0day-ci/linux/commits/Michael-Walle/of-net-support-non...
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git cc0626c2aaed8e475efdd85fa374b497a7192e35
config: x86_64-randconfig-m001-20210406 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
smatch warnings:
drivers/net/ethernet/xilinx/xilinx_axienet_main.c:2069 axienet_probe() warn: passing a valid pointer to 'PTR_ERR'
vim +/PTR_ERR +2069 drivers/net/ethernet/xilinx/xilinx_axienet_main.c
2be586205ca2b8 Srikanth Thokala 2015-05-05 1832 static int axienet_probe(struct platform_device *pdev)
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1833 {
8495659bf93c8e Srikanth Thokala 2015-05-05 1834 int ret;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1835 struct device_node *np;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1836 struct axienet_local *lp;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1837 struct net_device *ndev;
28ef9ebdb64c6f Robert Hancock 2019-06-06 1838 struct resource *ethres;
411b125c6ace1f Michael Walle 2021-04-06 1839 u8 mac_addr[ETH_ALEN];
^^^^^^^^^^^^^^^^^^^^^^
5fff0151b3244d Andre Przywara 2020-03-24 1840 int addr_width = 32;
8495659bf93c8e Srikanth Thokala 2015-05-05 1841 u32 value;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1842
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1843 ndev = alloc_etherdev(sizeof(*lp));
41de8d4cff21a2 Joe Perches 2012-01-29 1844 if (!ndev)
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1845 return -ENOMEM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1846
95219aa538e11d Srikanth Thokala 2015-05-05 1847 platform_set_drvdata(pdev, ndev);
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1848
95219aa538e11d Srikanth Thokala 2015-05-05 1849 SET_NETDEV_DEV(ndev, &pdev->dev);
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1850 ndev->flags &= ~IFF_MULTICAST; /* clear multicast */
28e24c62ab3062 Eric Dumazet 2013-12-02 1851 ndev->features = NETIF_F_SG;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1852 ndev->netdev_ops = &axienet_netdev_ops;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1853 ndev->ethtool_ops = &axienet_ethtool_ops;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1854
d894be57ca92c8 Jarod Wilson 2016-10-20 1855 /* MTU range: 64 - 9000 */
d894be57ca92c8 Jarod Wilson 2016-10-20 1856 ndev->min_mtu = 64;
d894be57ca92c8 Jarod Wilson 2016-10-20 1857 ndev->max_mtu = XAE_JUMBO_MTU;
d894be57ca92c8 Jarod Wilson 2016-10-20 1858
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1859 lp = netdev_priv(ndev);
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1860 lp->ndev = ndev;
95219aa538e11d Srikanth Thokala 2015-05-05 1861 lp->dev = &pdev->dev;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1862 lp->options = XAE_OPTION_DEFAULTS;
8b09ca823ffb4e Robert Hancock 2019-06-06 1863 lp->rx_bd_num = RX_BD_NUM_DEFAULT;
8b09ca823ffb4e Robert Hancock 2019-06-06 1864 lp->tx_bd_num = TX_BD_NUM_DEFAULT;
57baf8cc70ea4c Robert Hancock 2021-02-12 1865
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1866 lp->axi_clk = devm_clk_get_optional(&pdev->dev, "s_axi_lite_clk");
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1867 if (!lp->axi_clk) {
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1868 /* For backward compatibility, if named AXI clock is not present,
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1869 * treat the first clock specified as the AXI clock.
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1870 */
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1871 lp->axi_clk = devm_clk_get_optional(&pdev->dev, NULL);
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1872 }
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1873 if (IS_ERR(lp->axi_clk)) {
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1874 ret = PTR_ERR(lp->axi_clk);
57baf8cc70ea4c Robert Hancock 2021-02-12 1875 goto free_netdev;
57baf8cc70ea4c Robert Hancock 2021-02-12 1876 }
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1877 ret = clk_prepare_enable(lp->axi_clk);
57baf8cc70ea4c Robert Hancock 2021-02-12 1878 if (ret) {
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1879 dev_err(&pdev->dev, "Unable to enable AXI clock: %d\n", ret);
57baf8cc70ea4c Robert Hancock 2021-02-12 1880 goto free_netdev;
57baf8cc70ea4c Robert Hancock 2021-02-12 1881 }
57baf8cc70ea4c Robert Hancock 2021-02-12 1882
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1883 lp->misc_clks[0].id = "axis_clk";
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1884 lp->misc_clks[1].id = "ref_clk";
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1885 lp->misc_clks[2].id = "mgt_clk";
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1886
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1887 ret = devm_clk_bulk_get_optional(&pdev->dev, XAE_NUM_MISC_CLOCKS, lp->misc_clks);
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1888 if (ret)
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1889 goto cleanup_clk;
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1890
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1891 ret = clk_bulk_prepare_enable(XAE_NUM_MISC_CLOCKS, lp->misc_clks);
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1892 if (ret)
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1893 goto cleanup_clk;
b11bfb9a19f9d7 Robert Hancock 2021-03-25 1894
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1895 /* Map device registers */
46aa27df885321 Srikanth Thokala 2015-05-05 1896 ethres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
46aa27df885321 Srikanth Thokala 2015-05-05 1897 lp->regs = devm_ioremap_resource(&pdev->dev, ethres);
fcc028c106e575 Krzysztof Kozlowski 2015-07-09 1898 if (IS_ERR(lp->regs)) {
fcc028c106e575 Krzysztof Kozlowski 2015-07-09 1899 ret = PTR_ERR(lp->regs);
59cd4f19267a0a Robert Hancock 2021-03-11 1900 goto cleanup_clk;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1901 }
7fa0043d5c74c6 Robert Hancock 2019-06-11 1902 lp->regs_start = ethres->start;
46aa27df885321 Srikanth Thokala 2015-05-05 1903
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1904 /* Setup checksum offload, but default to off if not specified */
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1905 lp->features = 0;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1906
8495659bf93c8e Srikanth Thokala 2015-05-05 1907 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,txcsum", &value);
8495659bf93c8e Srikanth Thokala 2015-05-05 1908 if (!ret) {
8495659bf93c8e Srikanth Thokala 2015-05-05 1909 switch (value) {
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1910 case 1:
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1911 lp->csum_offload_on_tx_path =
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1912 XAE_FEATURE_PARTIAL_TX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1913 lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1914 /* Can checksum TCP/UDP over IPv4. */
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1915 ndev->features |= NETIF_F_IP_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1916 break;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1917 case 2:
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1918 lp->csum_offload_on_tx_path =
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1919 XAE_FEATURE_FULL_TX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1920 lp->features |= XAE_FEATURE_FULL_TX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1921 /* Can checksum TCP/UDP over IPv4. */
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1922 ndev->features |= NETIF_F_IP_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1923 break;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1924 default:
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1925 lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1926 }
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1927 }
8495659bf93c8e Srikanth Thokala 2015-05-05 1928 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,rxcsum", &value);
8495659bf93c8e Srikanth Thokala 2015-05-05 1929 if (!ret) {
8495659bf93c8e Srikanth Thokala 2015-05-05 1930 switch (value) {
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1931 case 1:
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1932 lp->csum_offload_on_rx_path =
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1933 XAE_FEATURE_PARTIAL_RX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1934 lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1935 break;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1936 case 2:
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1937 lp->csum_offload_on_rx_path =
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1938 XAE_FEATURE_FULL_RX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1939 lp->features |= XAE_FEATURE_FULL_RX_CSUM;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1940 break;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1941 default:
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1942 lp->csum_offload_on_rx_path = XAE_NO_CSUM_OFFLOAD;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1943 }
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1944 }
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1945 /* For supporting jumbo frames, the Axi Ethernet hardware must have
f080a8c35d8932 Srikanth Thokala 2015-05-05 1946 * a larger Rx/Tx Memory. Typically, the size must be large so that
f080a8c35d8932 Srikanth Thokala 2015-05-05 1947 * we can enable jumbo option and start supporting jumbo frames.
f080a8c35d8932 Srikanth Thokala 2015-05-05 1948 * Here we check for memory allocated for Rx/Tx in the hardware from
f080a8c35d8932 Srikanth Thokala 2015-05-05 1949 * the device-tree and accordingly set flags.
f080a8c35d8932 Srikanth Thokala 2015-05-05 1950 */
8495659bf93c8e Srikanth Thokala 2015-05-05 1951 of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem);
ee06b1728b9564 Alvaro G. M 2017-07-17 1952
6c8f06bb2e5147 Robert Hancock 2021-02-12 1953 lp->switch_x_sgmii = of_property_read_bool(pdev->dev.of_node,
6c8f06bb2e5147 Robert Hancock 2021-02-12 1954 "xlnx,switch-x-sgmii");
6c8f06bb2e5147 Robert Hancock 2021-02-12 1955
ee06b1728b9564 Alvaro G. M 2017-07-17 1956 /* Start with the proprietary, and broken phy_type */
ee06b1728b9564 Alvaro G. M 2017-07-17 1957 ret = of_property_read_u32(pdev->dev.of_node, "xlnx,phy-type", &value);
ee06b1728b9564 Alvaro G. M 2017-07-17 1958 if (!ret) {
ee06b1728b9564 Alvaro G. M 2017-07-17 1959 netdev_warn(ndev, "Please upgrade your device tree binary blob to use phy-mode");
ee06b1728b9564 Alvaro G. M 2017-07-17 1960 switch (value) {
ee06b1728b9564 Alvaro G. M 2017-07-17 1961 case XAE_PHY_TYPE_MII:
ee06b1728b9564 Alvaro G. M 2017-07-17 1962 lp->phy_mode = PHY_INTERFACE_MODE_MII;
ee06b1728b9564 Alvaro G. M 2017-07-17 1963 break;
ee06b1728b9564 Alvaro G. M 2017-07-17 1964 case XAE_PHY_TYPE_GMII:
ee06b1728b9564 Alvaro G. M 2017-07-17 1965 lp->phy_mode = PHY_INTERFACE_MODE_GMII;
ee06b1728b9564 Alvaro G. M 2017-07-17 1966 break;
ee06b1728b9564 Alvaro G. M 2017-07-17 1967 case XAE_PHY_TYPE_RGMII_2_0:
ee06b1728b9564 Alvaro G. M 2017-07-17 1968 lp->phy_mode = PHY_INTERFACE_MODE_RGMII_ID;
ee06b1728b9564 Alvaro G. M 2017-07-17 1969 break;
ee06b1728b9564 Alvaro G. M 2017-07-17 1970 case XAE_PHY_TYPE_SGMII:
ee06b1728b9564 Alvaro G. M 2017-07-17 1971 lp->phy_mode = PHY_INTERFACE_MODE_SGMII;
ee06b1728b9564 Alvaro G. M 2017-07-17 1972 break;
ee06b1728b9564 Alvaro G. M 2017-07-17 1973 case XAE_PHY_TYPE_1000BASE_X:
ee06b1728b9564 Alvaro G. M 2017-07-17 1974 lp->phy_mode = PHY_INTERFACE_MODE_1000BASEX;
ee06b1728b9564 Alvaro G. M 2017-07-17 1975 break;
ee06b1728b9564 Alvaro G. M 2017-07-17 1976 default:
ee06b1728b9564 Alvaro G. M 2017-07-17 1977 ret = -EINVAL;
59cd4f19267a0a Robert Hancock 2021-03-11 1978 goto cleanup_clk;
ee06b1728b9564 Alvaro G. M 2017-07-17 1979 }
ee06b1728b9564 Alvaro G. M 2017-07-17 1980 } else {
0c65b2b90d13c1 Andrew Lunn 2019-11-04 1981 ret = of_get_phy_mode(pdev->dev.of_node, &lp->phy_mode);
0c65b2b90d13c1 Andrew Lunn 2019-11-04 1982 if (ret)
59cd4f19267a0a Robert Hancock 2021-03-11 1983 goto cleanup_clk;
ee06b1728b9564 Alvaro G. M 2017-07-17 1984 }
6c8f06bb2e5147 Robert Hancock 2021-02-12 1985 if (lp->switch_x_sgmii && lp->phy_mode != PHY_INTERFACE_MODE_SGMII &&
6c8f06bb2e5147 Robert Hancock 2021-02-12 1986 lp->phy_mode != PHY_INTERFACE_MODE_1000BASEX) {
6c8f06bb2e5147 Robert Hancock 2021-02-12 1987 dev_err(&pdev->dev, "xlnx,switch-x-sgmii only supported with SGMII or 1000BaseX\n");
6c8f06bb2e5147 Robert Hancock 2021-02-12 1988 ret = -EINVAL;
59cd4f19267a0a Robert Hancock 2021-03-11 1989 goto cleanup_clk;
6c8f06bb2e5147 Robert Hancock 2021-02-12 1990 }
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1991
8a3b7a252dca9f Daniel Borkmann 2012-01-19 1992 /* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
95219aa538e11d Srikanth Thokala 2015-05-05 1993 np = of_parse_phandle(pdev->dev.of_node, "axistream-connected", 0);
28ef9ebdb64c6f Robert Hancock 2019-06-06 1994 if (np) {
28ef9ebdb64c6f Robert Hancock 2019-06-06 1995 struct resource dmares;
28ef9ebdb64c6f Robert Hancock 2019-06-06 1996
46aa27df885321 Srikanth Thokala 2015-05-05 1997 ret = of_address_to_resource(np, 0, &dmares);
46aa27df885321 Srikanth Thokala 2015-05-05 1998 if (ret) {
28ef9ebdb64c6f Robert Hancock 2019-06-06 1999 dev_err(&pdev->dev,
28ef9ebdb64c6f Robert Hancock 2019-06-06 2000 "unable to get DMA resource\n");
fa3a419d2f674b Wen Yang 2019-03-22 2001 of_node_put(np);
59cd4f19267a0a Robert Hancock 2021-03-11 2002 goto cleanup_clk;
46aa27df885321 Srikanth Thokala 2015-05-05 2003 }
28ef9ebdb64c6f Robert Hancock 2019-06-06 2004 lp->dma_regs = devm_ioremap_resource(&pdev->dev,
28ef9ebdb64c6f Robert Hancock 2019-06-06 2005 &dmares);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2006 lp->rx_irq = irq_of_parse_and_map(np, 1);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2007 lp->tx_irq = irq_of_parse_and_map(np, 0);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2008 of_node_put(np);
d6349e3e14c7f7 Andre Przywara 2020-03-24 2009 lp->eth_irq = platform_get_irq_optional(pdev, 0);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2010 } else {
28ef9ebdb64c6f Robert Hancock 2019-06-06 2011 /* Check for these resources directly on the Ethernet node. */
28ef9ebdb64c6f Robert Hancock 2019-06-06 2012 struct resource *res = platform_get_resource(pdev,
28ef9ebdb64c6f Robert Hancock 2019-06-06 2013 IORESOURCE_MEM, 1);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2014 lp->dma_regs = devm_ioremap_resource(&pdev->dev, res);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2015 lp->rx_irq = platform_get_irq(pdev, 1);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2016 lp->tx_irq = platform_get_irq(pdev, 0);
d6349e3e14c7f7 Andre Przywara 2020-03-24 2017 lp->eth_irq = platform_get_irq_optional(pdev, 2);
28ef9ebdb64c6f Robert Hancock 2019-06-06 2018 }
fcc028c106e575 Krzysztof Kozlowski 2015-07-09 2019 if (IS_ERR(lp->dma_regs)) {
46aa27df885321 Srikanth Thokala 2015-05-05 2020 dev_err(&pdev->dev, "could not map DMA regs\n");
fcc028c106e575 Krzysztof Kozlowski 2015-07-09 2021 ret = PTR_ERR(lp->dma_regs);
59cd4f19267a0a Robert Hancock 2021-03-11 2022 goto cleanup_clk;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2023 }
cb59c87dbc8be2 Michal Simek 2013-01-10 2024 if ((lp->rx_irq <= 0) || (lp->tx_irq <= 0)) {
95219aa538e11d Srikanth Thokala 2015-05-05 2025 dev_err(&pdev->dev, "could not determine irqs\n");
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2026 ret = -ENOMEM;
59cd4f19267a0a Robert Hancock 2021-03-11 2027 goto cleanup_clk;
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2028 }
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2029
f735c40ed93cca Andre Przywara 2020-03-24 2030 /* Autodetect the need for 64-bit DMA pointers.
f735c40ed93cca Andre Przywara 2020-03-24 2031 * When the IP is configured for a bus width bigger than 32 bits,
f735c40ed93cca Andre Przywara 2020-03-24 2032 * writing the MSB registers is mandatory, even if they are all 0.
f735c40ed93cca Andre Przywara 2020-03-24 2033 * We can detect this case by writing all 1's to one such register
f735c40ed93cca Andre Przywara 2020-03-24 2034 * and see if that sticks: when the IP is configured for 32 bits
f735c40ed93cca Andre Przywara 2020-03-24 2035 * only, those registers are RES0.
f735c40ed93cca Andre Przywara 2020-03-24 2036 * Those MSB registers were introduced in IP v7.1, which we check first.
f735c40ed93cca Andre Przywara 2020-03-24 2037 */
f735c40ed93cca Andre Przywara 2020-03-24 2038 if ((axienet_ior(lp, XAE_ID_OFFSET) >> 24) >= 0x9) {
f735c40ed93cca Andre Przywara 2020-03-24 2039 void __iomem *desc = lp->dma_regs + XAXIDMA_TX_CDESC_OFFSET + 4;
f735c40ed93cca Andre Przywara 2020-03-24 2040
f735c40ed93cca Andre Przywara 2020-03-24 2041 iowrite32(0x0, desc);
f735c40ed93cca Andre Przywara 2020-03-24 2042 if (ioread32(desc) == 0) { /* sanity check */
f735c40ed93cca Andre Przywara 2020-03-24 2043 iowrite32(0xffffffff, desc);
f735c40ed93cca Andre Przywara 2020-03-24 2044 if (ioread32(desc) > 0) {
f735c40ed93cca Andre Przywara 2020-03-24 2045 lp->features |= XAE_FEATURE_DMA_64BIT;
5fff0151b3244d Andre Przywara 2020-03-24 2046 addr_width = 64;
f735c40ed93cca Andre Przywara 2020-03-24 2047 dev_info(&pdev->dev,
f735c40ed93cca Andre Przywara 2020-03-24 2048 "autodetected 64-bit DMA range\n");
f735c40ed93cca Andre Przywara 2020-03-24 2049 }
f735c40ed93cca Andre Przywara 2020-03-24 2050 iowrite32(0x0, desc);
f735c40ed93cca Andre Przywara 2020-03-24 2051 }
f735c40ed93cca Andre Przywara 2020-03-24 2052 }
f735c40ed93cca Andre Przywara 2020-03-24 2053
5fff0151b3244d Andre Przywara 2020-03-24 2054 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(addr_width));
5fff0151b3244d Andre Przywara 2020-03-24 2055 if (ret) {
5fff0151b3244d Andre Przywara 2020-03-24 2056 dev_err(&pdev->dev, "No suitable DMA available\n");
59cd4f19267a0a Robert Hancock 2021-03-11 2057 goto cleanup_clk;
5fff0151b3244d Andre Przywara 2020-03-24 2058 }
5fff0151b3244d Andre Przywara 2020-03-24 2059
522856cefaf09d Robert Hancock 2019-06-06 2060 /* Check for Ethernet core IRQ (optional) */
522856cefaf09d Robert Hancock 2019-06-06 2061 if (lp->eth_irq <= 0)
522856cefaf09d Robert Hancock 2019-06-06 2062 dev_info(&pdev->dev, "Ethernet core IRQ not defined\n");
522856cefaf09d Robert Hancock 2019-06-06 2063
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2064 /* Retrieve the MAC address */
411b125c6ace1f Michael Walle 2021-04-06 2065 ret = of_get_mac_address(pdev->dev.of_node, mac_addr);
411b125c6ace1f Michael Walle 2021-04-06 2066 if (!ret) {
411b125c6ace1f Michael Walle 2021-04-06 2067 axienet_set_mac_address(ndev, mac_addr);
411b125c6ace1f Michael Walle 2021-04-06 2068 } else {
d05a9ed5c3a773 Robert Hancock 2019-06-06 @2069 dev_warn(&pdev->dev, "could not find MAC address property: %ld\n",
d05a9ed5c3a773 Robert Hancock 2019-06-06 2070 PTR_ERR(mac_addr));
^^^^^^^^^^^^^^^^^
mac_addr isn't an error pointer.
411b125c6ace1f Michael Walle 2021-04-06 2071 axienet_set_mac_address(ndev, NULL);
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2072 }
8a3b7a252dca9f Daniel Borkmann 2012-01-19 2073
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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1 year, 5 months
- 1
- 0
[kbuild] drivers/vdpa/mlx5/core/mr.c:282 map_direct_mr() warn: missing error code 'err'
by Dan Carpenter
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: e49d033bddf5b565044e2abe4241353959bc9120
commit: 94abbccdf2916cb03f9626f2d36c6e9971490c12 vdpa/mlx5: Add shared memory registration code
config: microblaze-randconfig-m031-20210405 (attached as .config)
compiler: microblaze-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com>
New smatch warnings:
drivers/vdpa/mlx5/core/mr.c:282 map_direct_mr() warn: missing error code 'err'
Old smatch warnings:
drivers/vdpa/mlx5/core/mr.c:350 add_direct_chain() error: uninitialized symbol 'err'.
drivers/vdpa/mlx5/core/mr.c:483 mlx5_vdpa_handle_set_map() error: uninitialized symbol 'err'.
vim +/err +282 drivers/vdpa/mlx5/core/mr.c
94abbccdf2916c Eli Cohen 2020-08-04 226 static int map_direct_mr(struct mlx5_vdpa_dev *mvdev, struct mlx5_vdpa_direct_mr *mr,
94abbccdf2916c Eli Cohen 2020-08-04 227 struct vhost_iotlb *iotlb)
94abbccdf2916c Eli Cohen 2020-08-04 228 {
94abbccdf2916c Eli Cohen 2020-08-04 229 struct vhost_iotlb_map *map;
94abbccdf2916c Eli Cohen 2020-08-04 230 unsigned long lgcd = 0;
94abbccdf2916c Eli Cohen 2020-08-04 231 int log_entity_size;
94abbccdf2916c Eli Cohen 2020-08-04 232 unsigned long size;
94abbccdf2916c Eli Cohen 2020-08-04 233 u64 start = 0;
94abbccdf2916c Eli Cohen 2020-08-04 234 int err;
94abbccdf2916c Eli Cohen 2020-08-04 235 struct page *pg;
94abbccdf2916c Eli Cohen 2020-08-04 236 unsigned int nsg;
94abbccdf2916c Eli Cohen 2020-08-04 237 int sglen;
94abbccdf2916c Eli Cohen 2020-08-04 238 u64 pa;
94abbccdf2916c Eli Cohen 2020-08-04 239 u64 paend;
94abbccdf2916c Eli Cohen 2020-08-04 240 struct scatterlist *sg;
94abbccdf2916c Eli Cohen 2020-08-04 241 struct device *dma = mvdev->mdev->device;
94abbccdf2916c Eli Cohen 2020-08-04 242 int ret;
94abbccdf2916c Eli Cohen 2020-08-04 243
94abbccdf2916c Eli Cohen 2020-08-04 244 for (map = vhost_iotlb_itree_first(iotlb, mr->start, mr->end - 1);
94abbccdf2916c Eli Cohen 2020-08-04 245 map; map = vhost_iotlb_itree_next(map, start, mr->end - 1)) {
94abbccdf2916c Eli Cohen 2020-08-04 246 size = maplen(map, mr);
94abbccdf2916c Eli Cohen 2020-08-04 247 lgcd = gcd(lgcd, size);
94abbccdf2916c Eli Cohen 2020-08-04 248 start += size;
94abbccdf2916c Eli Cohen 2020-08-04 249 }
94abbccdf2916c Eli Cohen 2020-08-04 250 log_entity_size = ilog2(lgcd);
94abbccdf2916c Eli Cohen 2020-08-04 251
94abbccdf2916c Eli Cohen 2020-08-04 252 sglen = 1 << log_entity_size;
94abbccdf2916c Eli Cohen 2020-08-04 253 nsg = MLX5_DIV_ROUND_UP_POW2(mr->end - mr->start, log_entity_size);
94abbccdf2916c Eli Cohen 2020-08-04 254
94abbccdf2916c Eli Cohen 2020-08-04 255 err = sg_alloc_table(&mr->sg_head, nsg, GFP_KERNEL);
94abbccdf2916c Eli Cohen 2020-08-04 256 if (err)
94abbccdf2916c Eli Cohen 2020-08-04 257 return err;
94abbccdf2916c Eli Cohen 2020-08-04 258
94abbccdf2916c Eli Cohen 2020-08-04 259 sg = mr->sg_head.sgl;
94abbccdf2916c Eli Cohen 2020-08-04 260 for (map = vhost_iotlb_itree_first(iotlb, mr->start, mr->end - 1);
94abbccdf2916c Eli Cohen 2020-08-04 261 map; map = vhost_iotlb_itree_next(map, mr->start, mr->end - 1)) {
94abbccdf2916c Eli Cohen 2020-08-04 262 paend = map->addr + maplen(map, mr);
94abbccdf2916c Eli Cohen 2020-08-04 263 for (pa = map->addr; pa < paend; pa += sglen) {
94abbccdf2916c Eli Cohen 2020-08-04 264 pg = pfn_to_page(__phys_to_pfn(pa));
94abbccdf2916c Eli Cohen 2020-08-04 265 if (!sg) {
94abbccdf2916c Eli Cohen 2020-08-04 266 mlx5_vdpa_warn(mvdev, "sg null. start 0x%llx, end 0x%llx\n",
94abbccdf2916c Eli Cohen 2020-08-04 267 map->start, map->last + 1);
94abbccdf2916c Eli Cohen 2020-08-04 268 err = -ENOMEM;
94abbccdf2916c Eli Cohen 2020-08-04 269 goto err_map;
94abbccdf2916c Eli Cohen 2020-08-04 270 }
94abbccdf2916c Eli Cohen 2020-08-04 271 sg_set_page(sg, pg, sglen, 0);
94abbccdf2916c Eli Cohen 2020-08-04 272 sg = sg_next(sg);
94abbccdf2916c Eli Cohen 2020-08-04 273 if (!sg)
94abbccdf2916c Eli Cohen 2020-08-04 274 goto done;
94abbccdf2916c Eli Cohen 2020-08-04 275 }
94abbccdf2916c Eli Cohen 2020-08-04 276 }
94abbccdf2916c Eli Cohen 2020-08-04 277 done:
94abbccdf2916c Eli Cohen 2020-08-04 278 mr->log_size = log_entity_size;
94abbccdf2916c Eli Cohen 2020-08-04 279 mr->nsg = nsg;
94abbccdf2916c Eli Cohen 2020-08-04 280 ret = dma_map_sg_attrs(dma, mr->sg_head.sgl, mr->nsg, DMA_BIDIRECTIONAL, 0);
94abbccdf2916c Eli Cohen 2020-08-04 281 if (!ret)
94abbccdf2916c Eli Cohen 2020-08-04 @282 goto err_map;
^^^^^^^^^^^^^
This feels deliberate but it's an error path so that's sort of
confusing... Not sure.
94abbccdf2916c Eli Cohen 2020-08-04 283
94abbccdf2916c Eli Cohen 2020-08-04 284 err = create_direct_mr(mvdev, mr);
94abbccdf2916c Eli Cohen 2020-08-04 285 if (err)
94abbccdf2916c Eli Cohen 2020-08-04 286 goto err_direct;
94abbccdf2916c Eli Cohen 2020-08-04 287
94abbccdf2916c Eli Cohen 2020-08-04 288 return 0;
94abbccdf2916c Eli Cohen 2020-08-04 289
94abbccdf2916c Eli Cohen 2020-08-04 290 err_direct:
94abbccdf2916c Eli Cohen 2020-08-04 291 dma_unmap_sg_attrs(dma, mr->sg_head.sgl, mr->nsg, DMA_BIDIRECTIONAL, 0);
94abbccdf2916c Eli Cohen 2020-08-04 292 err_map:
94abbccdf2916c Eli Cohen 2020-08-04 293 sg_free_table(&mr->sg_head);
94abbccdf2916c Eli Cohen 2020-08-04 294 return err;
94abbccdf2916c Eli Cohen 2020-08-04 295 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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1 year, 5 months
- 1
- 0
Re: [PATCH 2/5] swap: fix do_swap_page() race with swapoff
by kernel test robot
Hi Miaohe,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linux/master]
[also build test ERROR on linus/master hnaz-linux-mm/master v5.12-rc6 next-20210408]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Miaohe-Lin/close-various-race-wi...
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 5e46d1b78a03d52306f21f77a4e4a144b6d31486
config: x86_64-randconfig-a012-20210408 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 56ea2e2fdd691136d5e6631fa0e447173694b82c)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/56e65e21c8c9858e36c3bca84006a15fe...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Miaohe-Lin/close-various-race-windows-for-swap/20210408-211224
git checkout 56e65e21c8c9858e36c3bca84006a15fe9b85efd
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All error/warnings (new ones prefixed by >>):
>> mm/memory.c:3300:7: error: implicit declaration of function 'get_swap_device' [-Werror,-Wimplicit-function-declaration]
si = get_swap_device(entry);
^
mm/memory.c:3300:7: note: did you mean 'get_cpu_device'?
include/linux/cpu.h:38:23: note: 'get_cpu_device' declared here
extern struct device *get_cpu_device(unsigned cpu);
^
>> mm/memory.c:3300:5: warning: incompatible integer to pointer conversion assigning to 'struct swap_info_struct *' from 'int' [-Wint-conversion]
si = get_swap_device(entry);
^ ~~~~~~~~~~~~~~~~~~~~~~
>> mm/memory.c:3483:3: error: implicit declaration of function 'put_swap_device' [-Werror,-Wimplicit-function-declaration]
put_swap_device(si);
^
mm/memory.c:3483:3: note: did you mean 'get_swap_device'?
mm/memory.c:3300:7: note: 'get_swap_device' declared here
si = get_swap_device(entry);
^
1 warning and 2 errors generated.
vim +/get_swap_device +3300 mm/memory.c
3258
3259 /*
3260 * We enter with non-exclusive mmap_lock (to exclude vma changes,
3261 * but allow concurrent faults), and pte mapped but not yet locked.
3262 * We return with pte unmapped and unlocked.
3263 *
3264 * We return with the mmap_lock locked or unlocked in the same cases
3265 * as does filemap_fault().
3266 */
3267 vm_fault_t do_swap_page(struct vm_fault *vmf)
3268 {
3269 struct vm_area_struct *vma = vmf->vma;
3270 struct page *page = NULL, *swapcache;
3271 struct swap_info_struct *si = NULL;
3272 swp_entry_t entry;
3273 pte_t pte;
3274 int locked;
3275 int exclusive = 0;
3276 vm_fault_t ret = 0;
3277 void *shadow = NULL;
3278
3279 if (!pte_unmap_same(vma->vm_mm, vmf->pmd, vmf->pte, vmf->orig_pte))
3280 goto out;
3281
3282 entry = pte_to_swp_entry(vmf->orig_pte);
3283 if (unlikely(non_swap_entry(entry))) {
3284 if (is_migration_entry(entry)) {
3285 migration_entry_wait(vma->vm_mm, vmf->pmd,
3286 vmf->address);
3287 } else if (is_device_private_entry(entry)) {
3288 vmf->page = device_private_entry_to_page(entry);
3289 ret = vmf->page->pgmap->ops->migrate_to_ram(vmf);
3290 } else if (is_hwpoison_entry(entry)) {
3291 ret = VM_FAULT_HWPOISON;
3292 } else {
3293 print_bad_pte(vma, vmf->address, vmf->orig_pte, NULL);
3294 ret = VM_FAULT_SIGBUS;
3295 }
3296 goto out;
3297 }
3298
3299
> 3300 si = get_swap_device(entry);
3301 /* In case we raced with swapoff. */
3302 if (unlikely(!si))
3303 goto out;
3304
3305 delayacct_set_flag(DELAYACCT_PF_SWAPIN);
3306 page = lookup_swap_cache(entry, vma, vmf->address);
3307 swapcache = page;
3308
3309 if (!page) {
3310 struct swap_info_struct *si = swp_swap_info(entry);
3311
3312 if (data_race(si->flags & SWP_SYNCHRONOUS_IO) &&
3313 __swap_count(entry) == 1) {
3314 /* skip swapcache */
3315 page = alloc_page_vma(GFP_HIGHUSER_MOVABLE, vma,
3316 vmf->address);
3317 if (page) {
3318 int err;
3319
3320 __SetPageLocked(page);
3321 __SetPageSwapBacked(page);
3322 set_page_private(page, entry.val);
3323
3324 /* Tell memcg to use swap ownership records */
3325 SetPageSwapCache(page);
3326 err = mem_cgroup_charge(page, vma->vm_mm,
3327 GFP_KERNEL);
3328 ClearPageSwapCache(page);
3329 if (err) {
3330 ret = VM_FAULT_OOM;
3331 goto out_page;
3332 }
3333
3334 shadow = get_shadow_from_swap_cache(entry);
3335 if (shadow)
3336 workingset_refault(page, shadow);
3337
3338 lru_cache_add(page);
3339 swap_readpage(page, true);
3340 }
3341 } else {
3342 page = swapin_readahead(entry, GFP_HIGHUSER_MOVABLE,
3343 vmf);
3344 swapcache = page;
3345 }
3346
3347 if (!page) {
3348 /*
3349 * Back out if somebody else faulted in this pte
3350 * while we released the pte lock.
3351 */
3352 vmf->pte = pte_offset_map_lock(vma->vm_mm, vmf->pmd,
3353 vmf->address, &vmf->ptl);
3354 if (likely(pte_same(*vmf->pte, vmf->orig_pte)))
3355 ret = VM_FAULT_OOM;
3356 delayacct_clear_flag(DELAYACCT_PF_SWAPIN);
3357 goto unlock;
3358 }
3359
3360 /* Had to read the page from swap area: Major fault */
3361 ret = VM_FAULT_MAJOR;
3362 count_vm_event(PGMAJFAULT);
3363 count_memcg_event_mm(vma->vm_mm, PGMAJFAULT);
3364 } else if (PageHWPoison(page)) {
3365 /*
3366 * hwpoisoned dirty swapcache pages are kept for killing
3367 * owner processes (which may be unknown at hwpoison time)
3368 */
3369 ret = VM_FAULT_HWPOISON;
3370 delayacct_clear_flag(DELAYACCT_PF_SWAPIN);
3371 goto out_release;
3372 }
3373
3374 locked = lock_page_or_retry(page, vma->vm_mm, vmf->flags);
3375
3376 delayacct_clear_flag(DELAYACCT_PF_SWAPIN);
3377 if (!locked) {
3378 ret |= VM_FAULT_RETRY;
3379 goto out_release;
3380 }
3381
3382 /*
3383 * Make sure try_to_free_swap or reuse_swap_page or swapoff did not
3384 * release the swapcache from under us. The page pin, and pte_same
3385 * test below, are not enough to exclude that. Even if it is still
3386 * swapcache, we need to check that the page's swap has not changed.
3387 */
3388 if (unlikely((!PageSwapCache(page) ||
3389 page_private(page) != entry.val)) && swapcache)
3390 goto out_page;
3391
3392 page = ksm_might_need_to_copy(page, vma, vmf->address);
3393 if (unlikely(!page)) {
3394 ret = VM_FAULT_OOM;
3395 page = swapcache;
3396 goto out_page;
3397 }
3398
3399 cgroup_throttle_swaprate(page, GFP_KERNEL);
3400
3401 /*
3402 * Back out if somebody else already faulted in this pte.
3403 */
3404 vmf->pte = pte_offset_map_lock(vma->vm_mm, vmf->pmd, vmf->address,
3405 &vmf->ptl);
3406 if (unlikely(!pte_same(*vmf->pte, vmf->orig_pte)))
3407 goto out_nomap;
3408
3409 if (unlikely(!PageUptodate(page))) {
3410 ret = VM_FAULT_SIGBUS;
3411 goto out_nomap;
3412 }
3413
3414 /*
3415 * The page isn't present yet, go ahead with the fault.
3416 *
3417 * Be careful about the sequence of operations here.
3418 * To get its accounting right, reuse_swap_page() must be called
3419 * while the page is counted on swap but not yet in mapcount i.e.
3420 * before page_add_anon_rmap() and swap_free(); try_to_free_swap()
3421 * must be called after the swap_free(), or it will never succeed.
3422 */
3423
3424 inc_mm_counter_fast(vma->vm_mm, MM_ANONPAGES);
3425 dec_mm_counter_fast(vma->vm_mm, MM_SWAPENTS);
3426 pte = mk_pte(page, vma->vm_page_prot);
3427 if ((vmf->flags & FAULT_FLAG_WRITE) && reuse_swap_page(page, NULL)) {
3428 pte = maybe_mkwrite(pte_mkdirty(pte), vma);
3429 vmf->flags &= ~FAULT_FLAG_WRITE;
3430 ret |= VM_FAULT_WRITE;
3431 exclusive = RMAP_EXCLUSIVE;
3432 }
3433 flush_icache_page(vma, page);
3434 if (pte_swp_soft_dirty(vmf->orig_pte))
3435 pte = pte_mksoft_dirty(pte);
3436 if (pte_swp_uffd_wp(vmf->orig_pte)) {
3437 pte = pte_mkuffd_wp(pte);
3438 pte = pte_wrprotect(pte);
3439 }
3440 set_pte_at(vma->vm_mm, vmf->address, vmf->pte, pte);
3441 arch_do_swap_page(vma->vm_mm, vma, vmf->address, pte, vmf->orig_pte);
3442 vmf->orig_pte = pte;
3443
3444 /* ksm created a completely new copy */
3445 if (unlikely(page != swapcache && swapcache)) {
3446 page_add_new_anon_rmap(page, vma, vmf->address, false);
3447 lru_cache_add_inactive_or_unevictable(page, vma);
3448 } else {
3449 do_page_add_anon_rmap(page, vma, vmf->address, exclusive);
3450 }
3451
3452 swap_free(entry);
3453 if (mem_cgroup_swap_full(page) ||
3454 (vma->vm_flags & VM_LOCKED) || PageMlocked(page))
3455 try_to_free_swap(page);
3456 unlock_page(page);
3457 if (page != swapcache && swapcache) {
3458 /*
3459 * Hold the lock to avoid the swap entry to be reused
3460 * until we take the PT lock for the pte_same() check
3461 * (to avoid false positives from pte_same). For
3462 * further safety release the lock after the swap_free
3463 * so that the swap count won't change under a
3464 * parallel locked swapcache.
3465 */
3466 unlock_page(swapcache);
3467 put_page(swapcache);
3468 }
3469
3470 if (vmf->flags & FAULT_FLAG_WRITE) {
3471 ret |= do_wp_page(vmf);
3472 if (ret & VM_FAULT_ERROR)
3473 ret &= VM_FAULT_ERROR;
3474 goto out;
3475 }
3476
3477 /* No need to invalidate - it was non-present before */
3478 update_mmu_cache(vma, vmf->address, vmf->pte);
3479 unlock:
3480 pte_unmap_unlock(vmf->pte, vmf->ptl);
3481 out:
3482 if (si)
> 3483 put_swap_device(si);
3484 return ret;
3485 out_nomap:
3486 pte_unmap_unlock(vmf->pte, vmf->ptl);
3487 out_page:
3488 unlock_page(page);
3489 out_release:
3490 put_page(page);
3491 if (page != swapcache && swapcache) {
3492 unlock_page(swapcache);
3493 put_page(swapcache);
3494 }
3495 if (si)
3496 put_swap_device(si);
3497 return ret;
3498 }
3499
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 5 months
- 2
- 1
Re: [PATCH] mm: gup: remove FOLL_SPLIT
by kernel test robot
Hi Yang,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on hnaz-linux-mm/master]
url: https://github.com/0day-ci/linux/commits/Yang-Shi/mm-gup-remove-FOLL_SPLI...
base: https://github.com/hnaz/linux-mm master
config: s390-randconfig-r032-20210330 (attached as .config)
compiler: s390-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/c8563a636718f98af86a3965d94e25b8f...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Yang-Shi/mm-gup-remove-FOLL_SPLIT/20210330-034042
git checkout c8563a636718f98af86a3965d94e25b8f2cf2354
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=s390
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
arch/s390/mm/gmap.c: In function 'thp_split_mm':
>> arch/s390/mm/gmap.c:2498:27: error: 'FOLL_SPLIT' undeclared (first use in this function); did you mean 'FOLL_PIN'?
2498 | follow_page(vma, addr, FOLL_SPLIT);
| ^~~~~~~~~~
| FOLL_PIN
arch/s390/mm/gmap.c:2498:27: note: each undeclared identifier is reported only once for each function it appears in
vim +2498 arch/s390/mm/gmap.c
0959e168678d2d Janosch Frank 2018-07-17 2487
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2488 static inline void thp_split_mm(struct mm_struct *mm)
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2489 {
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2490 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2491 struct vm_area_struct *vma;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2492 unsigned long addr;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2493
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2494 for (vma = mm->mmap; vma != NULL; vma = vma->vm_next) {
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2495 for (addr = vma->vm_start;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2496 addr < vma->vm_end;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2497 addr += PAGE_SIZE)
1e133ab296f3ff Martin Schwidefsky 2016-03-08 @2498 follow_page(vma, addr, FOLL_SPLIT);
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2499 vma->vm_flags &= ~VM_HUGEPAGE;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2500 vma->vm_flags |= VM_NOHUGEPAGE;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2501 }
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2502 mm->def_flags |= VM_NOHUGEPAGE;
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2503 #endif
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2504 }
1e133ab296f3ff Martin Schwidefsky 2016-03-08 2505
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0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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