[atishp04:dma_non_coherent_v1 3/5] drivers/soc/sifive/sifive_l2_cache.c:75:22: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_START'
by kernel test robot
tree: https://github.com/atishp04/linux dma_non_coherent_v1
head: 37cdb4f054939f097f3297ec76c1c6738312c577
commit: 3113512fedbd15cf6a83a08b18405fbcfb8d8985 [3/5] sifive/sifive_l2_cache: Align the address to cache line
config: riscv-randconfig-r005-20210618 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project d1baf2895467735ab14f4b3415fce204c0cc8e7f)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://github.com/atishp04/linux/commit/3113512fedbd15cf6a83a08b18405fbc...
git remote add atishp04 https://github.com/atishp04/linux
git fetch --no-tags atishp04 dma_non_coherent_v1
git checkout 3113512fedbd15cf6a83a08b18405fbcfb8d8985
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:564:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inw(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:56:76: note: expanded from macro 'inw'
#define inw(c) ({ u16 __v; __io_pbr(); __v = readw_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:88:76: note: expanded from macro 'readw_cpu'
#define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:36:51: note: expanded from macro '__le16_to_cpu'
#define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:572:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inl(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:57:76: note: expanded from macro 'inl'
#define inl(c) ({ u32 __v; __io_pbr(); __v = readl_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:89:76: note: expanded from macro 'readl_cpu'
#define readl_cpu(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:34:51: note: expanded from macro '__le32_to_cpu'
#define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:580:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outb(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:59:68: note: expanded from macro 'outb'
#define outb(v,c) ({ __io_pbw(); writeb_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:91:52: note: expanded from macro 'writeb_cpu'
#define writeb_cpu(v, c) ((void)__raw_writeb((v), (c)))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:588:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outw(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:60:68: note: expanded from macro 'outw'
#define outw(v,c) ({ __io_pbw(); writew_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:92:76: note: expanded from macro 'writew_cpu'
#define writew_cpu(v, c) ((void)__raw_writew((__force u16)cpu_to_le16(v), (c)))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:596:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outl(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:61:68: note: expanded from macro 'outl'
#define outl(v,c) ({ __io_pbw(); writel_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:93:76: note: expanded from macro 'writel_cpu'
#define writel_cpu(v, c) ((void)__raw_writel((__force u32)cpu_to_le32(v), (c)))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:1024:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
~~~~~~~~~~ ^
>> drivers/soc/sifive/sifive_l2_cache.c:75:22: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_START'
(start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
^
>> drivers/soc/sifive/sifive_l2_cache.c:76:9: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_SIZE'
CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
^
drivers/soc/sifive/sifive_l2_cache.c:74:13: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_START'
if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
^
drivers/soc/sifive/sifive_l2_cache.c:55:6: warning: no previous prototype for function 'sifive_l2_flush64_range' [-Wmissing-prototypes]
void sifive_l2_flush64_range(unsigned long start, unsigned long len)
^
drivers/soc/sifive/sifive_l2_cache.c:55:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void sifive_l2_flush64_range(unsigned long start, unsigned long len)
^
static
8 warnings and 3 errors generated.
Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for LOCKDEP
Depends on DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT && (FRAME_POINTER || MIPS || PPC || S390 || MICROBLAZE || ARM || ARC || X86)
Selected by
- DEBUG_LOCK_ALLOC && DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT
WARNING: unmet direct dependencies detected for ERRATA_SIFIVE
Depends on RISCV_ERRATA_ALTERNATIVE
Selected by
- SOC_SIFIVE
vim +/CONFIG_SIFIVE_L2_FLUSH_START +75 drivers/soc/sifive/sifive_l2_cache.c
54
55 void sifive_l2_flush64_range(unsigned long start, unsigned long len)
56 {
57 unsigned long line;
58
59 if(!l2_base) {
60 pr_warn("L2CACHE: base addr invalid, skipping flush\n");
61 return;
62 }
63
64 /* TODO: if (len == 0), skipping flush or going on? */
65 if(!len) {
66 pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start);
67 return;
68 }
69
70 len = len + (start % SIFIVE_L2_FLUSH64_LINE_LEN);
71 start = ALIGN_DOWN(start, SIFIVE_L2_FLUSH64_LINE_LEN);
72
73 /* make sure the address is in the range */
74 if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
> 75 (start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
> 76 CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
77 WARN(1, "L2CACHE: flush64 out of range: %lx(%lx), skip flush\n",
78 start, len);
79 return;
80 }
81
82 mb(); /* sync */
83 for (line = start; line < start + len;
84 line += SIFIVE_L2_FLUSH64_LINE_LEN) {
85 writeq(line, l2_base + SIFIVE_L2_FLUSH64);
86 mb();
87 }
88 }
89
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
drivers/rtc/rtc-pcf8523.c:35: warning: "REG_OFFSET" redefined
by kernel test robot
Hi Thomas,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 6fab154a33ba9b3574ba74a86ed085e0ed8454cb
commit: 7fd70c65faacd39628ba5f670be6490010c8132f ARM: irqstat: Get rid of duplicated declaration
date: 7 months ago
config: arm-randconfig-r025-20210619 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit...
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 7fd70c65faacd39628ba5f670be6490010c8132f
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> drivers/rtc/rtc-pcf8523.c:35: warning: "REG_OFFSET" redefined
35 | #define REG_OFFSET 0x0e
|
In file included from arch/arm/mach-ixp4xx/include/mach/hardware.h:30,
from arch/arm/mach-ixp4xx/include/mach/io.h:15,
from arch/arm/include/asm/io.h:198,
from include/linux/io.h:13,
from include/linux/irq.h:20,
from include/asm-generic/hardirq.h:13,
from arch/arm/include/asm/hardirq.h:10,
from include/linux/hardirq.h:10,
from include/linux/interrupt.h:11,
from include/linux/rtc.h:17,
from drivers/rtc/rtc-pcf8523.c:9:
arch/arm/mach-ixp4xx/include/mach/platform.h:23: note: this is the location of the previous definition
23 | #define REG_OFFSET 0
|
vim +/REG_OFFSET +35 drivers/rtc/rtc-pcf8523.c
f803f0d079ded4 Thierry Reding 2012-12-17 34
bc3bee02527252 Russell King 2017-09-29 @35 #define REG_OFFSET 0x0e
bc3bee02527252 Russell King 2017-09-29 36 #define REG_OFFSET_MODE BIT(7)
bc3bee02527252 Russell King 2017-09-29 37
:::::: The code at line 35 was first introduced by commit
:::::: bc3bee0252725240ffa62180d387cc245179c549 rtc: pcf8523: add support for trimming the RTC oscillator
:::::: TO: Russell King <rmk+kernel(a)armlinux.org.uk>
:::::: CC: Alexandre Belloni <alexandre.belloni(a)free-electrons.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
drivers/net/usb/r8152.c:7474:13: warning: stack frame size of 8736 bytes in function 'r8156b_hw_phy_cfg'
by kernel test robot
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 728a748b3ff70326f652ab92081d639dc51269ea
commit: 8203c7ce4ef2840929d38b447b4ccd384727f92b Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
date: 9 weeks ago
config: powerpc-randconfig-r023-20210619 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project d1baf2895467735ab14f4b3415fce204c0cc8e7f)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit...
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 8203c7ce4ef2840929d38b447b4ccd384727f92b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
In file included from drivers/net/usb/r8152.c:6:
In file included from include/linux/signal.h:5:
In file included from include/linux/bug.h:5:
In file included from arch/powerpc/include/asm/bug.h:109:
In file included from include/asm-generic/bug.h:20:
In file included from include/linux/kernel.h:11:
In file included from include/linux/bitops.h:32:
In file included from arch/powerpc/include/asm/bitops.h:62:
arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined]
#define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory")
^
<built-in>:308:9: note: previous definition is here
#define __lwsync __builtin_ppc_lwsync
^
>> drivers/net/usb/r8152.c:7474:13: warning: stack frame size of 8736 bytes in function 'r8156b_hw_phy_cfg' [-Wframe-larger-than]
static void r8156b_hw_phy_cfg(struct r8152 *tp)
^
2 warnings generated.
vim +/r8156b_hw_phy_cfg +7474 drivers/net/usb/r8152.c
195aae321c829d Hayes Wang 2021-04-16 7473
195aae321c829d Hayes Wang 2021-04-16 @7474 static void r8156b_hw_phy_cfg(struct r8152 *tp)
195aae321c829d Hayes Wang 2021-04-16 7475 {
195aae321c829d Hayes Wang 2021-04-16 7476 u32 ocp_data;
195aae321c829d Hayes Wang 2021-04-16 7477 u16 data;
195aae321c829d Hayes Wang 2021-04-16 7478
195aae321c829d Hayes Wang 2021-04-16 7479 switch (tp->version) {
195aae321c829d Hayes Wang 2021-04-16 7480 case RTL_VER_12:
195aae321c829d Hayes Wang 2021-04-16 7481 ocp_reg_write(tp, 0xbf86, 0x9000);
195aae321c829d Hayes Wang 2021-04-16 7482 data = ocp_reg_read(tp, 0xc402);
195aae321c829d Hayes Wang 2021-04-16 7483 data |= BIT(10);
195aae321c829d Hayes Wang 2021-04-16 7484 ocp_reg_write(tp, 0xc402, data);
195aae321c829d Hayes Wang 2021-04-16 7485 data &= ~BIT(10);
195aae321c829d Hayes Wang 2021-04-16 7486 ocp_reg_write(tp, 0xc402, data);
195aae321c829d Hayes Wang 2021-04-16 7487 ocp_reg_write(tp, 0xbd86, 0x1010);
195aae321c829d Hayes Wang 2021-04-16 7488 ocp_reg_write(tp, 0xbd88, 0x1010);
195aae321c829d Hayes Wang 2021-04-16 7489 data = ocp_reg_read(tp, 0xbd4e);
195aae321c829d Hayes Wang 2021-04-16 7490 data &= ~(BIT(10) | BIT(11));
195aae321c829d Hayes Wang 2021-04-16 7491 data |= BIT(11);
195aae321c829d Hayes Wang 2021-04-16 7492 ocp_reg_write(tp, 0xbd4e, data);
195aae321c829d Hayes Wang 2021-04-16 7493 data = ocp_reg_read(tp, 0xbf46);
195aae321c829d Hayes Wang 2021-04-16 7494 data &= ~0xf00;
195aae321c829d Hayes Wang 2021-04-16 7495 data |= 0x700;
195aae321c829d Hayes Wang 2021-04-16 7496 ocp_reg_write(tp, 0xbf46, data);
195aae321c829d Hayes Wang 2021-04-16 7497 break;
195aae321c829d Hayes Wang 2021-04-16 7498 case RTL_VER_13:
195aae321c829d Hayes Wang 2021-04-16 7499 case RTL_VER_15:
195aae321c829d Hayes Wang 2021-04-16 7500 r8156b_wait_loading_flash(tp);
195aae321c829d Hayes Wang 2021-04-16 7501 break;
195aae321c829d Hayes Wang 2021-04-16 7502 default:
195aae321c829d Hayes Wang 2021-04-16 7503 break;
195aae321c829d Hayes Wang 2021-04-16 7504 }
195aae321c829d Hayes Wang 2021-04-16 7505
195aae321c829d Hayes Wang 2021-04-16 7506 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
195aae321c829d Hayes Wang 2021-04-16 7507 if (ocp_data & PCUT_STATUS) {
195aae321c829d Hayes Wang 2021-04-16 7508 ocp_data &= ~PCUT_STATUS;
195aae321c829d Hayes Wang 2021-04-16 7509 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
195aae321c829d Hayes Wang 2021-04-16 7510 }
195aae321c829d Hayes Wang 2021-04-16 7511
195aae321c829d Hayes Wang 2021-04-16 7512 data = r8153_phy_status(tp, 0);
195aae321c829d Hayes Wang 2021-04-16 7513 switch (data) {
195aae321c829d Hayes Wang 2021-04-16 7514 case PHY_STAT_EXT_INIT:
195aae321c829d Hayes Wang 2021-04-16 7515 rtl8152_apply_firmware(tp, true);
195aae321c829d Hayes Wang 2021-04-16 7516
195aae321c829d Hayes Wang 2021-04-16 7517 data = ocp_reg_read(tp, 0xa466);
195aae321c829d Hayes Wang 2021-04-16 7518 data &= ~BIT(0);
195aae321c829d Hayes Wang 2021-04-16 7519 ocp_reg_write(tp, 0xa466, data);
195aae321c829d Hayes Wang 2021-04-16 7520
195aae321c829d Hayes Wang 2021-04-16 7521 data = ocp_reg_read(tp, 0xa468);
195aae321c829d Hayes Wang 2021-04-16 7522 data &= ~(BIT(3) | BIT(1));
195aae321c829d Hayes Wang 2021-04-16 7523 ocp_reg_write(tp, 0xa468, data);
195aae321c829d Hayes Wang 2021-04-16 7524 break;
195aae321c829d Hayes Wang 2021-04-16 7525 case PHY_STAT_LAN_ON:
195aae321c829d Hayes Wang 2021-04-16 7526 case PHY_STAT_PWRDN:
195aae321c829d Hayes Wang 2021-04-16 7527 default:
195aae321c829d Hayes Wang 2021-04-16 7528 rtl8152_apply_firmware(tp, false);
195aae321c829d Hayes Wang 2021-04-16 7529 break;
195aae321c829d Hayes Wang 2021-04-16 7530 }
195aae321c829d Hayes Wang 2021-04-16 7531
195aae321c829d Hayes Wang 2021-04-16 7532 data = r8152_mdio_read(tp, MII_BMCR);
195aae321c829d Hayes Wang 2021-04-16 7533 if (data & BMCR_PDOWN) {
195aae321c829d Hayes Wang 2021-04-16 7534 data &= ~BMCR_PDOWN;
195aae321c829d Hayes Wang 2021-04-16 7535 r8152_mdio_write(tp, MII_BMCR, data);
195aae321c829d Hayes Wang 2021-04-16 7536 }
195aae321c829d Hayes Wang 2021-04-16 7537
195aae321c829d Hayes Wang 2021-04-16 7538 /* disable ALDPS before updating the PHY parameters */
195aae321c829d Hayes Wang 2021-04-16 7539 r8153_aldps_en(tp, false);
195aae321c829d Hayes Wang 2021-04-16 7540
195aae321c829d Hayes Wang 2021-04-16 7541 /* disable EEE before updating the PHY parameters */
195aae321c829d Hayes Wang 2021-04-16 7542 rtl_eee_enable(tp, false);
195aae321c829d Hayes Wang 2021-04-16 7543
195aae321c829d Hayes Wang 2021-04-16 7544 data = r8153_phy_status(tp, PHY_STAT_LAN_ON);
195aae321c829d Hayes Wang 2021-04-16 7545 WARN_ON_ONCE(data != PHY_STAT_LAN_ON);
195aae321c829d Hayes Wang 2021-04-16 7546
195aae321c829d Hayes Wang 2021-04-16 7547 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
195aae321c829d Hayes Wang 2021-04-16 7548 ocp_data |= PFM_PWM_SWITCH;
195aae321c829d Hayes Wang 2021-04-16 7549 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
195aae321c829d Hayes Wang 2021-04-16 7550
195aae321c829d Hayes Wang 2021-04-16 7551 switch (tp->version) {
195aae321c829d Hayes Wang 2021-04-16 7552 case RTL_VER_12:
195aae321c829d Hayes Wang 2021-04-16 7553 data = ocp_reg_read(tp, 0xbc08);
195aae321c829d Hayes Wang 2021-04-16 7554 data |= BIT(3) | BIT(2);
195aae321c829d Hayes Wang 2021-04-16 7555 ocp_reg_write(tp, 0xbc08, data);
195aae321c829d Hayes Wang 2021-04-16 7556
195aae321c829d Hayes Wang 2021-04-16 7557 data = sram_read(tp, 0x8fff);
195aae321c829d Hayes Wang 2021-04-16 7558 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7559 data |= 0x0400;
195aae321c829d Hayes Wang 2021-04-16 7560 sram_write(tp, 0x8fff, data);
195aae321c829d Hayes Wang 2021-04-16 7561
195aae321c829d Hayes Wang 2021-04-16 7562 data = ocp_reg_read(tp, 0xacda);
195aae321c829d Hayes Wang 2021-04-16 7563 data |= 0xff00;
195aae321c829d Hayes Wang 2021-04-16 7564 ocp_reg_write(tp, 0xacda, data);
195aae321c829d Hayes Wang 2021-04-16 7565 data = ocp_reg_read(tp, 0xacde);
195aae321c829d Hayes Wang 2021-04-16 7566 data |= 0xf000;
195aae321c829d Hayes Wang 2021-04-16 7567 ocp_reg_write(tp, 0xacde, data);
195aae321c829d Hayes Wang 2021-04-16 7568 ocp_reg_write(tp, 0xac8c, 0x0ffc);
195aae321c829d Hayes Wang 2021-04-16 7569 ocp_reg_write(tp, 0xac46, 0xb7b4);
195aae321c829d Hayes Wang 2021-04-16 7570 ocp_reg_write(tp, 0xac50, 0x0fbc);
195aae321c829d Hayes Wang 2021-04-16 7571 ocp_reg_write(tp, 0xac3c, 0x9240);
195aae321c829d Hayes Wang 2021-04-16 7572 ocp_reg_write(tp, 0xac4e, 0x0db4);
195aae321c829d Hayes Wang 2021-04-16 7573 ocp_reg_write(tp, 0xacc6, 0x0707);
195aae321c829d Hayes Wang 2021-04-16 7574 ocp_reg_write(tp, 0xacc8, 0xa0d3);
195aae321c829d Hayes Wang 2021-04-16 7575 ocp_reg_write(tp, 0xad08, 0x0007);
195aae321c829d Hayes Wang 2021-04-16 7576
195aae321c829d Hayes Wang 2021-04-16 7577 ocp_reg_write(tp, 0xb87c, 0x8560);
195aae321c829d Hayes Wang 2021-04-16 7578 ocp_reg_write(tp, 0xb87e, 0x19cc);
195aae321c829d Hayes Wang 2021-04-16 7579 ocp_reg_write(tp, 0xb87c, 0x8562);
195aae321c829d Hayes Wang 2021-04-16 7580 ocp_reg_write(tp, 0xb87e, 0x19cc);
195aae321c829d Hayes Wang 2021-04-16 7581 ocp_reg_write(tp, 0xb87c, 0x8564);
195aae321c829d Hayes Wang 2021-04-16 7582 ocp_reg_write(tp, 0xb87e, 0x19cc);
195aae321c829d Hayes Wang 2021-04-16 7583 ocp_reg_write(tp, 0xb87c, 0x8566);
195aae321c829d Hayes Wang 2021-04-16 7584 ocp_reg_write(tp, 0xb87e, 0x147d);
195aae321c829d Hayes Wang 2021-04-16 7585 ocp_reg_write(tp, 0xb87c, 0x8568);
195aae321c829d Hayes Wang 2021-04-16 7586 ocp_reg_write(tp, 0xb87e, 0x147d);
195aae321c829d Hayes Wang 2021-04-16 7587 ocp_reg_write(tp, 0xb87c, 0x856a);
195aae321c829d Hayes Wang 2021-04-16 7588 ocp_reg_write(tp, 0xb87e, 0x147d);
195aae321c829d Hayes Wang 2021-04-16 7589 ocp_reg_write(tp, 0xb87c, 0x8ffe);
195aae321c829d Hayes Wang 2021-04-16 7590 ocp_reg_write(tp, 0xb87e, 0x0907);
195aae321c829d Hayes Wang 2021-04-16 7591 ocp_reg_write(tp, 0xb87c, 0x80d6);
195aae321c829d Hayes Wang 2021-04-16 7592 ocp_reg_write(tp, 0xb87e, 0x2801);
195aae321c829d Hayes Wang 2021-04-16 7593 ocp_reg_write(tp, 0xb87c, 0x80f2);
195aae321c829d Hayes Wang 2021-04-16 7594 ocp_reg_write(tp, 0xb87e, 0x2801);
195aae321c829d Hayes Wang 2021-04-16 7595 ocp_reg_write(tp, 0xb87c, 0x80f4);
195aae321c829d Hayes Wang 2021-04-16 7596 ocp_reg_write(tp, 0xb87e, 0x6077);
195aae321c829d Hayes Wang 2021-04-16 7597 ocp_reg_write(tp, 0xb506, 0x01e7);
195aae321c829d Hayes Wang 2021-04-16 7598
195aae321c829d Hayes Wang 2021-04-16 7599 ocp_reg_write(tp, 0xb87c, 0x8013);
195aae321c829d Hayes Wang 2021-04-16 7600 ocp_reg_write(tp, 0xb87e, 0x0700);
195aae321c829d Hayes Wang 2021-04-16 7601 ocp_reg_write(tp, 0xb87c, 0x8fb9);
195aae321c829d Hayes Wang 2021-04-16 7602 ocp_reg_write(tp, 0xb87e, 0x2801);
195aae321c829d Hayes Wang 2021-04-16 7603 ocp_reg_write(tp, 0xb87c, 0x8fba);
195aae321c829d Hayes Wang 2021-04-16 7604 ocp_reg_write(tp, 0xb87e, 0x0100);
195aae321c829d Hayes Wang 2021-04-16 7605 ocp_reg_write(tp, 0xb87c, 0x8fbc);
195aae321c829d Hayes Wang 2021-04-16 7606 ocp_reg_write(tp, 0xb87e, 0x1900);
195aae321c829d Hayes Wang 2021-04-16 7607 ocp_reg_write(tp, 0xb87c, 0x8fbe);
195aae321c829d Hayes Wang 2021-04-16 7608 ocp_reg_write(tp, 0xb87e, 0xe100);
195aae321c829d Hayes Wang 2021-04-16 7609 ocp_reg_write(tp, 0xb87c, 0x8fc0);
195aae321c829d Hayes Wang 2021-04-16 7610 ocp_reg_write(tp, 0xb87e, 0x0800);
195aae321c829d Hayes Wang 2021-04-16 7611 ocp_reg_write(tp, 0xb87c, 0x8fc2);
195aae321c829d Hayes Wang 2021-04-16 7612 ocp_reg_write(tp, 0xb87e, 0xe500);
195aae321c829d Hayes Wang 2021-04-16 7613 ocp_reg_write(tp, 0xb87c, 0x8fc4);
195aae321c829d Hayes Wang 2021-04-16 7614 ocp_reg_write(tp, 0xb87e, 0x0f00);
195aae321c829d Hayes Wang 2021-04-16 7615 ocp_reg_write(tp, 0xb87c, 0x8fc6);
195aae321c829d Hayes Wang 2021-04-16 7616 ocp_reg_write(tp, 0xb87e, 0xf100);
195aae321c829d Hayes Wang 2021-04-16 7617 ocp_reg_write(tp, 0xb87c, 0x8fc8);
195aae321c829d Hayes Wang 2021-04-16 7618 ocp_reg_write(tp, 0xb87e, 0x0400);
195aae321c829d Hayes Wang 2021-04-16 7619 ocp_reg_write(tp, 0xb87c, 0x8fca);
195aae321c829d Hayes Wang 2021-04-16 7620 ocp_reg_write(tp, 0xb87e, 0xf300);
195aae321c829d Hayes Wang 2021-04-16 7621 ocp_reg_write(tp, 0xb87c, 0x8fcc);
195aae321c829d Hayes Wang 2021-04-16 7622 ocp_reg_write(tp, 0xb87e, 0xfd00);
195aae321c829d Hayes Wang 2021-04-16 7623 ocp_reg_write(tp, 0xb87c, 0x8fce);
195aae321c829d Hayes Wang 2021-04-16 7624 ocp_reg_write(tp, 0xb87e, 0xff00);
195aae321c829d Hayes Wang 2021-04-16 7625 ocp_reg_write(tp, 0xb87c, 0x8fd0);
195aae321c829d Hayes Wang 2021-04-16 7626 ocp_reg_write(tp, 0xb87e, 0xfb00);
195aae321c829d Hayes Wang 2021-04-16 7627 ocp_reg_write(tp, 0xb87c, 0x8fd2);
195aae321c829d Hayes Wang 2021-04-16 7628 ocp_reg_write(tp, 0xb87e, 0x0100);
195aae321c829d Hayes Wang 2021-04-16 7629 ocp_reg_write(tp, 0xb87c, 0x8fd4);
195aae321c829d Hayes Wang 2021-04-16 7630 ocp_reg_write(tp, 0xb87e, 0xf400);
195aae321c829d Hayes Wang 2021-04-16 7631 ocp_reg_write(tp, 0xb87c, 0x8fd6);
195aae321c829d Hayes Wang 2021-04-16 7632 ocp_reg_write(tp, 0xb87e, 0xff00);
195aae321c829d Hayes Wang 2021-04-16 7633 ocp_reg_write(tp, 0xb87c, 0x8fd8);
195aae321c829d Hayes Wang 2021-04-16 7634 ocp_reg_write(tp, 0xb87e, 0xf600);
195aae321c829d Hayes Wang 2021-04-16 7635
195aae321c829d Hayes Wang 2021-04-16 7636 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_USB_CFG);
195aae321c829d Hayes Wang 2021-04-16 7637 ocp_data |= EN_XG_LIP | EN_G_LIP;
195aae321c829d Hayes Wang 2021-04-16 7638 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_USB_CFG, ocp_data);
195aae321c829d Hayes Wang 2021-04-16 7639 ocp_reg_write(tp, 0xb87c, 0x813d);
195aae321c829d Hayes Wang 2021-04-16 7640 ocp_reg_write(tp, 0xb87e, 0x390e);
195aae321c829d Hayes Wang 2021-04-16 7641 ocp_reg_write(tp, 0xb87c, 0x814f);
195aae321c829d Hayes Wang 2021-04-16 7642 ocp_reg_write(tp, 0xb87e, 0x790e);
195aae321c829d Hayes Wang 2021-04-16 7643 ocp_reg_write(tp, 0xb87c, 0x80b0);
195aae321c829d Hayes Wang 2021-04-16 7644 ocp_reg_write(tp, 0xb87e, 0x0f31);
195aae321c829d Hayes Wang 2021-04-16 7645 data = ocp_reg_read(tp, 0xbf4c);
195aae321c829d Hayes Wang 2021-04-16 7646 data |= BIT(1);
195aae321c829d Hayes Wang 2021-04-16 7647 ocp_reg_write(tp, 0xbf4c, data);
195aae321c829d Hayes Wang 2021-04-16 7648 data = ocp_reg_read(tp, 0xbcca);
195aae321c829d Hayes Wang 2021-04-16 7649 data |= BIT(9) | BIT(8);
195aae321c829d Hayes Wang 2021-04-16 7650 ocp_reg_write(tp, 0xbcca, data);
195aae321c829d Hayes Wang 2021-04-16 7651 ocp_reg_write(tp, 0xb87c, 0x8141);
195aae321c829d Hayes Wang 2021-04-16 7652 ocp_reg_write(tp, 0xb87e, 0x320e);
195aae321c829d Hayes Wang 2021-04-16 7653 ocp_reg_write(tp, 0xb87c, 0x8153);
195aae321c829d Hayes Wang 2021-04-16 7654 ocp_reg_write(tp, 0xb87e, 0x720e);
195aae321c829d Hayes Wang 2021-04-16 7655 ocp_reg_write(tp, 0xb87c, 0x8529);
195aae321c829d Hayes Wang 2021-04-16 7656 ocp_reg_write(tp, 0xb87e, 0x050e);
195aae321c829d Hayes Wang 2021-04-16 7657 data = ocp_reg_read(tp, OCP_EEE_CFG);
195aae321c829d Hayes Wang 2021-04-16 7658 data &= ~CTAP_SHORT_EN;
195aae321c829d Hayes Wang 2021-04-16 7659 ocp_reg_write(tp, OCP_EEE_CFG, data);
195aae321c829d Hayes Wang 2021-04-16 7660
195aae321c829d Hayes Wang 2021-04-16 7661 sram_write(tp, 0x816c, 0xc4a0);
195aae321c829d Hayes Wang 2021-04-16 7662 sram_write(tp, 0x8170, 0xc4a0);
195aae321c829d Hayes Wang 2021-04-16 7663 sram_write(tp, 0x8174, 0x04a0);
195aae321c829d Hayes Wang 2021-04-16 7664 sram_write(tp, 0x8178, 0x04a0);
195aae321c829d Hayes Wang 2021-04-16 7665 sram_write(tp, 0x817c, 0x0719);
195aae321c829d Hayes Wang 2021-04-16 7666 sram_write(tp, 0x8ff4, 0x0400);
195aae321c829d Hayes Wang 2021-04-16 7667 sram_write(tp, 0x8ff1, 0x0404);
195aae321c829d Hayes Wang 2021-04-16 7668
195aae321c829d Hayes Wang 2021-04-16 7669 ocp_reg_write(tp, 0xbf4a, 0x001b);
195aae321c829d Hayes Wang 2021-04-16 7670 ocp_reg_write(tp, 0xb87c, 0x8033);
195aae321c829d Hayes Wang 2021-04-16 7671 ocp_reg_write(tp, 0xb87e, 0x7c13);
195aae321c829d Hayes Wang 2021-04-16 7672 ocp_reg_write(tp, 0xb87c, 0x8037);
195aae321c829d Hayes Wang 2021-04-16 7673 ocp_reg_write(tp, 0xb87e, 0x7c13);
195aae321c829d Hayes Wang 2021-04-16 7674 ocp_reg_write(tp, 0xb87c, 0x803b);
195aae321c829d Hayes Wang 2021-04-16 7675 ocp_reg_write(tp, 0xb87e, 0xfc32);
195aae321c829d Hayes Wang 2021-04-16 7676 ocp_reg_write(tp, 0xb87c, 0x803f);
195aae321c829d Hayes Wang 2021-04-16 7677 ocp_reg_write(tp, 0xb87e, 0x7c13);
195aae321c829d Hayes Wang 2021-04-16 7678 ocp_reg_write(tp, 0xb87c, 0x8043);
195aae321c829d Hayes Wang 2021-04-16 7679 ocp_reg_write(tp, 0xb87e, 0x7c13);
195aae321c829d Hayes Wang 2021-04-16 7680 ocp_reg_write(tp, 0xb87c, 0x8047);
195aae321c829d Hayes Wang 2021-04-16 7681 ocp_reg_write(tp, 0xb87e, 0x7c13);
195aae321c829d Hayes Wang 2021-04-16 7682
195aae321c829d Hayes Wang 2021-04-16 7683 ocp_reg_write(tp, 0xb87c, 0x8145);
195aae321c829d Hayes Wang 2021-04-16 7684 ocp_reg_write(tp, 0xb87e, 0x370e);
195aae321c829d Hayes Wang 2021-04-16 7685 ocp_reg_write(tp, 0xb87c, 0x8157);
195aae321c829d Hayes Wang 2021-04-16 7686 ocp_reg_write(tp, 0xb87e, 0x770e);
195aae321c829d Hayes Wang 2021-04-16 7687 ocp_reg_write(tp, 0xb87c, 0x8169);
195aae321c829d Hayes Wang 2021-04-16 7688 ocp_reg_write(tp, 0xb87e, 0x0d0a);
195aae321c829d Hayes Wang 2021-04-16 7689 ocp_reg_write(tp, 0xb87c, 0x817b);
195aae321c829d Hayes Wang 2021-04-16 7690 ocp_reg_write(tp, 0xb87e, 0x1d0a);
195aae321c829d Hayes Wang 2021-04-16 7691
195aae321c829d Hayes Wang 2021-04-16 7692 data = sram_read(tp, 0x8217);
195aae321c829d Hayes Wang 2021-04-16 7693 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7694 data |= 0x5000;
195aae321c829d Hayes Wang 2021-04-16 7695 sram_write(tp, 0x8217, data);
195aae321c829d Hayes Wang 2021-04-16 7696 data = sram_read(tp, 0x821a);
195aae321c829d Hayes Wang 2021-04-16 7697 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7698 data |= 0x5000;
195aae321c829d Hayes Wang 2021-04-16 7699 sram_write(tp, 0x821a, data);
195aae321c829d Hayes Wang 2021-04-16 7700 sram_write(tp, 0x80da, 0x0403);
195aae321c829d Hayes Wang 2021-04-16 7701 data = sram_read(tp, 0x80dc);
195aae321c829d Hayes Wang 2021-04-16 7702 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7703 data |= 0x1000;
195aae321c829d Hayes Wang 2021-04-16 7704 sram_write(tp, 0x80dc, data);
195aae321c829d Hayes Wang 2021-04-16 7705 sram_write(tp, 0x80b3, 0x0384);
195aae321c829d Hayes Wang 2021-04-16 7706 sram_write(tp, 0x80b7, 0x2007);
195aae321c829d Hayes Wang 2021-04-16 7707 data = sram_read(tp, 0x80ba);
195aae321c829d Hayes Wang 2021-04-16 7708 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7709 data |= 0x6c00;
195aae321c829d Hayes Wang 2021-04-16 7710 sram_write(tp, 0x80ba, data);
195aae321c829d Hayes Wang 2021-04-16 7711 sram_write(tp, 0x80b5, 0xf009);
195aae321c829d Hayes Wang 2021-04-16 7712 data = sram_read(tp, 0x80bd);
195aae321c829d Hayes Wang 2021-04-16 7713 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7714 data |= 0x9f00;
195aae321c829d Hayes Wang 2021-04-16 7715 sram_write(tp, 0x80bd, data);
195aae321c829d Hayes Wang 2021-04-16 7716 sram_write(tp, 0x80c7, 0xf083);
195aae321c829d Hayes Wang 2021-04-16 7717 sram_write(tp, 0x80dd, 0x03f0);
195aae321c829d Hayes Wang 2021-04-16 7718 data = sram_read(tp, 0x80df);
195aae321c829d Hayes Wang 2021-04-16 7719 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7720 data |= 0x1000;
195aae321c829d Hayes Wang 2021-04-16 7721 sram_write(tp, 0x80df, data);
195aae321c829d Hayes Wang 2021-04-16 7722 sram_write(tp, 0x80cb, 0x2007);
195aae321c829d Hayes Wang 2021-04-16 7723 data = sram_read(tp, 0x80ce);
195aae321c829d Hayes Wang 2021-04-16 7724 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7725 data |= 0x6c00;
195aae321c829d Hayes Wang 2021-04-16 7726 sram_write(tp, 0x80ce, data);
195aae321c829d Hayes Wang 2021-04-16 7727 sram_write(tp, 0x80c9, 0x8009);
195aae321c829d Hayes Wang 2021-04-16 7728 data = sram_read(tp, 0x80d1);
195aae321c829d Hayes Wang 2021-04-16 7729 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7730 data |= 0x8000;
195aae321c829d Hayes Wang 2021-04-16 7731 sram_write(tp, 0x80d1, data);
195aae321c829d Hayes Wang 2021-04-16 7732 sram_write(tp, 0x80a3, 0x200a);
195aae321c829d Hayes Wang 2021-04-16 7733 sram_write(tp, 0x80a5, 0xf0ad);
195aae321c829d Hayes Wang 2021-04-16 7734 sram_write(tp, 0x809f, 0x6073);
195aae321c829d Hayes Wang 2021-04-16 7735 sram_write(tp, 0x80a1, 0x000b);
195aae321c829d Hayes Wang 2021-04-16 7736 data = sram_read(tp, 0x80a9);
195aae321c829d Hayes Wang 2021-04-16 7737 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7738 data |= 0xc000;
195aae321c829d Hayes Wang 2021-04-16 7739 sram_write(tp, 0x80a9, data);
195aae321c829d Hayes Wang 2021-04-16 7740
195aae321c829d Hayes Wang 2021-04-16 7741 if (rtl_phy_patch_request(tp, true, true))
195aae321c829d Hayes Wang 2021-04-16 7742 return;
195aae321c829d Hayes Wang 2021-04-16 7743
195aae321c829d Hayes Wang 2021-04-16 7744 data = ocp_reg_read(tp, 0xb896);
195aae321c829d Hayes Wang 2021-04-16 7745 data &= ~BIT(0);
195aae321c829d Hayes Wang 2021-04-16 7746 ocp_reg_write(tp, 0xb896, data);
195aae321c829d Hayes Wang 2021-04-16 7747 data = ocp_reg_read(tp, 0xb892);
195aae321c829d Hayes Wang 2021-04-16 7748 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7749 ocp_reg_write(tp, 0xb892, data);
195aae321c829d Hayes Wang 2021-04-16 7750 ocp_reg_write(tp, 0xb88e, 0xc23e);
195aae321c829d Hayes Wang 2021-04-16 7751 ocp_reg_write(tp, 0xb890, 0x0000);
195aae321c829d Hayes Wang 2021-04-16 7752 ocp_reg_write(tp, 0xb88e, 0xc240);
195aae321c829d Hayes Wang 2021-04-16 7753 ocp_reg_write(tp, 0xb890, 0x0103);
195aae321c829d Hayes Wang 2021-04-16 7754 ocp_reg_write(tp, 0xb88e, 0xc242);
195aae321c829d Hayes Wang 2021-04-16 7755 ocp_reg_write(tp, 0xb890, 0x0507);
195aae321c829d Hayes Wang 2021-04-16 7756 ocp_reg_write(tp, 0xb88e, 0xc244);
195aae321c829d Hayes Wang 2021-04-16 7757 ocp_reg_write(tp, 0xb890, 0x090b);
195aae321c829d Hayes Wang 2021-04-16 7758 ocp_reg_write(tp, 0xb88e, 0xc246);
195aae321c829d Hayes Wang 2021-04-16 7759 ocp_reg_write(tp, 0xb890, 0x0c0e);
195aae321c829d Hayes Wang 2021-04-16 7760 ocp_reg_write(tp, 0xb88e, 0xc248);
195aae321c829d Hayes Wang 2021-04-16 7761 ocp_reg_write(tp, 0xb890, 0x1012);
195aae321c829d Hayes Wang 2021-04-16 7762 ocp_reg_write(tp, 0xb88e, 0xc24a);
195aae321c829d Hayes Wang 2021-04-16 7763 ocp_reg_write(tp, 0xb890, 0x1416);
195aae321c829d Hayes Wang 2021-04-16 7764 data = ocp_reg_read(tp, 0xb896);
195aae321c829d Hayes Wang 2021-04-16 7765 data |= BIT(0);
195aae321c829d Hayes Wang 2021-04-16 7766 ocp_reg_write(tp, 0xb896, data);
195aae321c829d Hayes Wang 2021-04-16 7767
195aae321c829d Hayes Wang 2021-04-16 7768 rtl_phy_patch_request(tp, false, true);
195aae321c829d Hayes Wang 2021-04-16 7769
195aae321c829d Hayes Wang 2021-04-16 7770 data = ocp_reg_read(tp, 0xa86a);
195aae321c829d Hayes Wang 2021-04-16 7771 data |= BIT(0);
195aae321c829d Hayes Wang 2021-04-16 7772 ocp_reg_write(tp, 0xa86a, data);
195aae321c829d Hayes Wang 2021-04-16 7773 data = ocp_reg_read(tp, 0xa6f0);
195aae321c829d Hayes Wang 2021-04-16 7774 data |= BIT(0);
195aae321c829d Hayes Wang 2021-04-16 7775 ocp_reg_write(tp, 0xa6f0, data);
195aae321c829d Hayes Wang 2021-04-16 7776
195aae321c829d Hayes Wang 2021-04-16 7777 ocp_reg_write(tp, 0xbfa0, 0xd70d);
195aae321c829d Hayes Wang 2021-04-16 7778 ocp_reg_write(tp, 0xbfa2, 0x4100);
195aae321c829d Hayes Wang 2021-04-16 7779 ocp_reg_write(tp, 0xbfa4, 0xe868);
195aae321c829d Hayes Wang 2021-04-16 7780 ocp_reg_write(tp, 0xbfa6, 0xdc59);
195aae321c829d Hayes Wang 2021-04-16 7781 ocp_reg_write(tp, 0xb54c, 0x3c18);
195aae321c829d Hayes Wang 2021-04-16 7782 data = ocp_reg_read(tp, 0xbfa4);
195aae321c829d Hayes Wang 2021-04-16 7783 data &= ~BIT(5);
195aae321c829d Hayes Wang 2021-04-16 7784 ocp_reg_write(tp, 0xbfa4, data);
195aae321c829d Hayes Wang 2021-04-16 7785 data = sram_read(tp, 0x817d);
195aae321c829d Hayes Wang 2021-04-16 7786 data |= BIT(12);
195aae321c829d Hayes Wang 2021-04-16 7787 sram_write(tp, 0x817d, data);
195aae321c829d Hayes Wang 2021-04-16 7788 break;
195aae321c829d Hayes Wang 2021-04-16 7789 case RTL_VER_13:
195aae321c829d Hayes Wang 2021-04-16 7790 /* 2.5G INRX */
195aae321c829d Hayes Wang 2021-04-16 7791 data = ocp_reg_read(tp, 0xac46);
195aae321c829d Hayes Wang 2021-04-16 7792 data &= ~0x00f0;
195aae321c829d Hayes Wang 2021-04-16 7793 data |= 0x0090;
195aae321c829d Hayes Wang 2021-04-16 7794 ocp_reg_write(tp, 0xac46, data);
195aae321c829d Hayes Wang 2021-04-16 7795 data = ocp_reg_read(tp, 0xad30);
195aae321c829d Hayes Wang 2021-04-16 7796 data &= ~0x0003;
195aae321c829d Hayes Wang 2021-04-16 7797 data |= 0x0001;
195aae321c829d Hayes Wang 2021-04-16 7798 ocp_reg_write(tp, 0xad30, data);
195aae321c829d Hayes Wang 2021-04-16 7799 fallthrough;
195aae321c829d Hayes Wang 2021-04-16 7800 case RTL_VER_15:
195aae321c829d Hayes Wang 2021-04-16 7801 /* EEE parameter */
195aae321c829d Hayes Wang 2021-04-16 7802 ocp_reg_write(tp, 0xb87c, 0x80f5);
195aae321c829d Hayes Wang 2021-04-16 7803 ocp_reg_write(tp, 0xb87e, 0x760e);
195aae321c829d Hayes Wang 2021-04-16 7804 ocp_reg_write(tp, 0xb87c, 0x8107);
195aae321c829d Hayes Wang 2021-04-16 7805 ocp_reg_write(tp, 0xb87e, 0x360e);
195aae321c829d Hayes Wang 2021-04-16 7806 ocp_reg_write(tp, 0xb87c, 0x8551);
195aae321c829d Hayes Wang 2021-04-16 7807 data = ocp_reg_read(tp, 0xb87e);
195aae321c829d Hayes Wang 2021-04-16 7808 data &= ~0xff00;
195aae321c829d Hayes Wang 2021-04-16 7809 data |= 0x0800;
195aae321c829d Hayes Wang 2021-04-16 7810 ocp_reg_write(tp, 0xb87e, data);
195aae321c829d Hayes Wang 2021-04-16 7811
195aae321c829d Hayes Wang 2021-04-16 7812 /* ADC_PGA parameter */
195aae321c829d Hayes Wang 2021-04-16 7813 data = ocp_reg_read(tp, 0xbf00);
195aae321c829d Hayes Wang 2021-04-16 7814 data &= ~0xe000;
195aae321c829d Hayes Wang 2021-04-16 7815 data |= 0xa000;
195aae321c829d Hayes Wang 2021-04-16 7816 ocp_reg_write(tp, 0xbf00, data);
195aae321c829d Hayes Wang 2021-04-16 7817 data = ocp_reg_read(tp, 0xbf46);
195aae321c829d Hayes Wang 2021-04-16 7818 data &= ~0x0f00;
195aae321c829d Hayes Wang 2021-04-16 7819 data |= 0x0300;
195aae321c829d Hayes Wang 2021-04-16 7820 ocp_reg_write(tp, 0xbf46, data);
195aae321c829d Hayes Wang 2021-04-16 7821
195aae321c829d Hayes Wang 2021-04-16 7822 /* Green Table-PGA, 1G full viterbi */
195aae321c829d Hayes Wang 2021-04-16 7823 sram_write(tp, 0x8044, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7824 sram_write(tp, 0x804a, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7825 sram_write(tp, 0x8050, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7826 sram_write(tp, 0x8056, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7827 sram_write(tp, 0x805c, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7828 sram_write(tp, 0x8062, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7829 sram_write(tp, 0x8068, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7830 sram_write(tp, 0x806e, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7831 sram_write(tp, 0x8074, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7832 sram_write(tp, 0x807a, 0x2417);
195aae321c829d Hayes Wang 2021-04-16 7833
195aae321c829d Hayes Wang 2021-04-16 7834 /* XG PLL */
195aae321c829d Hayes Wang 2021-04-16 7835 data = ocp_reg_read(tp, 0xbf84);
195aae321c829d Hayes Wang 2021-04-16 7836 data &= ~0xe000;
195aae321c829d Hayes Wang 2021-04-16 7837 data |= 0xa000;
195aae321c829d Hayes Wang 2021-04-16 7838 ocp_reg_write(tp, 0xbf84, data);
195aae321c829d Hayes Wang 2021-04-16 7839 break;
195aae321c829d Hayes Wang 2021-04-16 7840 default:
195aae321c829d Hayes Wang 2021-04-16 7841 break;
195aae321c829d Hayes Wang 2021-04-16 7842 }
195aae321c829d Hayes Wang 2021-04-16 7843
195aae321c829d Hayes Wang 2021-04-16 7844 if (rtl_phy_patch_request(tp, true, true))
195aae321c829d Hayes Wang 2021-04-16 7845 return;
195aae321c829d Hayes Wang 2021-04-16 7846
195aae321c829d Hayes Wang 2021-04-16 7847 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4);
195aae321c829d Hayes Wang 2021-04-16 7848 ocp_data |= EEE_SPDWN_EN;
195aae321c829d Hayes Wang 2021-04-16 7849 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, ocp_data);
195aae321c829d Hayes Wang 2021-04-16 7850
195aae321c829d Hayes Wang 2021-04-16 7851 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
195aae321c829d Hayes Wang 2021-04-16 7852 data &= ~(EN_EEE_100 | EN_EEE_1000);
195aae321c829d Hayes Wang 2021-04-16 7853 data |= EN_10M_CLKDIV;
195aae321c829d Hayes Wang 2021-04-16 7854 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
195aae321c829d Hayes Wang 2021-04-16 7855 tp->ups_info._10m_ckdiv = true;
195aae321c829d Hayes Wang 2021-04-16 7856 tp->ups_info.eee_plloff_100 = false;
195aae321c829d Hayes Wang 2021-04-16 7857 tp->ups_info.eee_plloff_giga = false;
195aae321c829d Hayes Wang 2021-04-16 7858
195aae321c829d Hayes Wang 2021-04-16 7859 data = ocp_reg_read(tp, OCP_POWER_CFG);
195aae321c829d Hayes Wang 2021-04-16 7860 data &= ~EEE_CLKDIV_EN;
195aae321c829d Hayes Wang 2021-04-16 7861 ocp_reg_write(tp, OCP_POWER_CFG, data);
195aae321c829d Hayes Wang 2021-04-16 7862 tp->ups_info.eee_ckdiv = false;
195aae321c829d Hayes Wang 2021-04-16 7863
195aae321c829d Hayes Wang 2021-04-16 7864 rtl_phy_patch_request(tp, false, true);
195aae321c829d Hayes Wang 2021-04-16 7865
195aae321c829d Hayes Wang 2021-04-16 7866 rtl_green_en(tp, test_bit(GREEN_ETHERNET, &tp->flags));
195aae321c829d Hayes Wang 2021-04-16 7867
195aae321c829d Hayes Wang 2021-04-16 7868 data = ocp_reg_read(tp, 0xa428);
195aae321c829d Hayes Wang 2021-04-16 7869 data &= ~BIT(9);
195aae321c829d Hayes Wang 2021-04-16 7870 ocp_reg_write(tp, 0xa428, data);
195aae321c829d Hayes Wang 2021-04-16 7871 data = ocp_reg_read(tp, 0xa5ea);
195aae321c829d Hayes Wang 2021-04-16 7872 data &= ~BIT(0);
195aae321c829d Hayes Wang 2021-04-16 7873 ocp_reg_write(tp, 0xa5ea, data);
195aae321c829d Hayes Wang 2021-04-16 7874 tp->ups_info.lite_mode = 0;
195aae321c829d Hayes Wang 2021-04-16 7875
195aae321c829d Hayes Wang 2021-04-16 7876 if (tp->eee_en)
195aae321c829d Hayes Wang 2021-04-16 7877 rtl_eee_enable(tp, true);
195aae321c829d Hayes Wang 2021-04-16 7878
195aae321c829d Hayes Wang 2021-04-16 7879 r8153_aldps_en(tp, true);
195aae321c829d Hayes Wang 2021-04-16 7880 r8152b_enable_fc(tp);
195aae321c829d Hayes Wang 2021-04-16 7881 r8153_u2p3en(tp, true);
195aae321c829d Hayes Wang 2021-04-16 7882
195aae321c829d Hayes Wang 2021-04-16 7883 set_bit(PHY_RESET, &tp->flags);
ac718b69301c7c hayeswang 2013-05-02 7884 }
ac718b69301c7c hayeswang 2013-05-02 7885
:::::: The code at line 7474 was first introduced by commit
:::::: 195aae321c829dd1945900d75561e6aa79cce208 r8152: support new chips
:::::: TO: Hayes Wang <hayeswang(a)realtek.com>
:::::: CC: David S. Miller <davem(a)davemloft.net>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
[atishp04:dma_non_coherent_v1 8/42] drivers/gpio/gpio-starfive-jh7100.c:332:6: warning: no previous prototype for 'sf_vic_gpio_dout_reverse'
by kernel test robot
tree: https://github.com/atishp04/linux dma_non_coherent_v1
head: 37cdb4f054939f097f3297ec76c1c6738312c577
commit: ad78ee06db98750082ab52e23e4608a3787a3db4 [8/42] gpio: starfive-jh7100: Add StarFive JH7100 GPIO driver
config: arc-allyesconfig (attached as .config)
compiler: arceb-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/atishp04/linux/commit/ad78ee06db98750082ab52e23e4608a3...
git remote add atishp04 https://github.com/atishp04/linux
git fetch --no-tags atishp04 dma_non_coherent_v1
git checkout ad78ee06db98750082ab52e23e4608a3787a3db4
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpio/gpio-starfive-jh7100.c:332:6: warning: no previous prototype for 'sf_vic_gpio_dout_reverse' [-Wmissing-prototypes]
332 | void sf_vic_gpio_dout_reverse(int gpio, int en)
| ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:351:6: warning: no previous prototype for 'sf_vic_gpio_dout_value' [-Wmissing-prototypes]
351 | void sf_vic_gpio_dout_value(int gpio, int v)
| ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:369:6: warning: no previous prototype for 'sf_vic_gpio_dout_low' [-Wmissing-prototypes]
369 | void sf_vic_gpio_dout_low(int gpio)
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:375:6: warning: no previous prototype for 'sf_vic_gpio_dout_high' [-Wmissing-prototypes]
375 | void sf_vic_gpio_dout_high(int gpio)
| ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:381:6: warning: no previous prototype for 'sf_vic_gpio_doen_reverse' [-Wmissing-prototypes]
381 | void sf_vic_gpio_doen_reverse(int gpio, int en)
| ^~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:400:6: warning: no previous prototype for 'sf_vic_gpio_doen_value' [-Wmissing-prototypes]
400 | void sf_vic_gpio_doen_value(int gpio, int v)
| ^~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:419:6: warning: no previous prototype for 'sf_vic_gpio_doen_low' [-Wmissing-prototypes]
419 | void sf_vic_gpio_doen_low(int gpio)
| ^~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:425:6: warning: no previous prototype for 'sf_vic_gpio_doen_high' [-Wmissing-prototypes]
425 | void sf_vic_gpio_doen_high(int gpio)
| ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpio/gpio-starfive-jh7100.c:431:6: warning: no previous prototype for 'sf_vic_gpio_manual' [-Wmissing-prototypes]
431 | void sf_vic_gpio_manual(int offset, int v)
| ^~~~~~~~~~~~~~~~~~
vim +/sf_vic_gpio_dout_reverse +332 drivers/gpio/gpio-starfive-jh7100.c
331
> 332 void sf_vic_gpio_dout_reverse(int gpio, int en)
333 {
334 unsigned int value;
335 int offset;
336
337 if (!gpio_base)
338 return;
339
340 offset = gpio * 8 + GPIO_DOUT_X_REG;
341
342 spin_lock(&sfg_lock);
343 value = ioread32(gpio_base + offset);
344 value &= ~(0x1 << 31);
345 value |= (en & 0x1) << 31;
346 iowrite32(value, gpio_base + offset);
347 spin_unlock(&sfg_lock);
348 }
349 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_reverse);
350
> 351 void sf_vic_gpio_dout_value(int gpio, int v)
352 {
353 unsigned int value;
354 int offset;
355
356 if (!gpio_base)
357 return;
358
359 offset = gpio * 8 + GPIO_DOUT_X_REG;
360 spin_lock(&sfg_lock);
361 value = ioread32(gpio_base + offset);
362 value &= ~(0xFF);
363 value |= (v&0xFF);
364 iowrite32(value, gpio_base + offset);
365 spin_unlock(&sfg_lock);
366 }
367 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_value);
368
> 369 void sf_vic_gpio_dout_low(int gpio)
370 {
371 sf_vic_gpio_dout_value(gpio, 0);
372 }
373 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_low);
374
> 375 void sf_vic_gpio_dout_high(int gpio)
376 {
377 sf_vic_gpio_dout_value(gpio, 1);
378 }
379 EXPORT_SYMBOL_GPL(sf_vic_gpio_dout_high);
380
> 381 void sf_vic_gpio_doen_reverse(int gpio, int en)
382 {
383 unsigned int value;
384 int offset;
385
386 if (!gpio_base)
387 return;
388
389 offset = gpio * 8 + GPIO_DOEN_X_REG;
390
391 spin_lock(&sfg_lock);
392 value = ioread32(gpio_base + offset);
393 value &= ~(0x1 << 31);
394 value |= (en & 0x1) << 31;
395 iowrite32(value, gpio_base + offset);
396 spin_unlock(&sfg_lock);
397 }
398 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_reverse);
399
> 400 void sf_vic_gpio_doen_value(int gpio, int v)
401 {
402 unsigned int value;
403 int offset;
404
405 if (!gpio_base)
406 return;
407
408 offset = gpio * 8 + GPIO_DOEN_X_REG;
409
410 spin_lock(&sfg_lock);
411 value = ioread32(gpio_base + offset);
412 value &= ~(0xFF);
413 value |= (v&0xFF);
414 iowrite32(value, gpio_base + offset);
415 spin_unlock(&sfg_lock);
416 }
417 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_value);
418
> 419 void sf_vic_gpio_doen_low(int gpio)
420 {
421 sf_vic_gpio_doen_value(gpio, 0);
422 }
423 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_low);
424
> 425 void sf_vic_gpio_doen_high(int gpio)
426 {
427 sf_vic_gpio_doen_value(gpio, 1);
428 }
429 EXPORT_SYMBOL_GPL(sf_vic_gpio_doen_high);
430
> 431 void sf_vic_gpio_manual(int offset, int v)
432 {
433 unsigned int value;
434
435 if (!gpio_base)
436 return;
437
438 spin_lock(&sfg_lock);
439 value = ioread32(gpio_base + offset);
440 value &= ~(0xFF);
441 value |= (v&0xFF);
442 iowrite32(value, gpio_base + offset);
443 spin_unlock(&sfg_lock);
444 }
445 EXPORT_SYMBOL_GPL(sf_vic_gpio_manual);
446
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
[atishp04:dma_non_coherent_v1 3/5] drivers/soc/sifive/sifive_l2_cache.c:55:6: warning: no previous prototype for function 'sifive_l2_flush64_range'
by kernel test robot
tree: https://github.com/atishp04/linux dma_non_coherent_v1
head: 37cdb4f054939f097f3297ec76c1c6738312c577
commit: 3113512fedbd15cf6a83a08b18405fbcfb8d8985 [3/5] sifive/sifive_l2_cache: Align the address to cache line
config: riscv-randconfig-r005-20210618 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project d1baf2895467735ab14f4b3415fce204c0cc8e7f)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://github.com/atishp04/linux/commit/3113512fedbd15cf6a83a08b18405fbc...
git remote add atishp04 https://github.com/atishp04/linux
git fetch --no-tags atishp04 dma_non_coherent_v1
git checkout 3113512fedbd15cf6a83a08b18405fbcfb8d8985
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
arch/riscv/include/asm/io.h:56:76: note: expanded from macro 'inw'
#define inw(c) ({ u16 __v; __io_pbr(); __v = readw_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:88:76: note: expanded from macro 'readw_cpu'
#define readw_cpu(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:36:51: note: expanded from macro '__le16_to_cpu'
#define __le16_to_cpu(x) ((__force __u16)(__le16)(x))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:572:9: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return inl(addr);
^~~~~~~~~
arch/riscv/include/asm/io.h:57:76: note: expanded from macro 'inl'
#define inl(c) ({ u32 __v; __io_pbr(); __v = readl_cpu((void*)(PCI_IOBASE + (c))); __io_par(__v); __v; })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:89:76: note: expanded from macro 'readl_cpu'
#define readl_cpu(c) ({ u32 __r = le32_to_cpu((__force __le32)__raw_readl(c)); __r; })
^
include/uapi/linux/byteorder/little_endian.h:34:51: note: expanded from macro '__le32_to_cpu'
#define __le32_to_cpu(x) ((__force __u32)(__le32)(x))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:580:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outb(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:59:68: note: expanded from macro 'outb'
#define outb(v,c) ({ __io_pbw(); writeb_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:91:52: note: expanded from macro 'writeb_cpu'
#define writeb_cpu(v, c) ((void)__raw_writeb((v), (c)))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:588:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outw(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:60:68: note: expanded from macro 'outw'
#define outw(v,c) ({ __io_pbw(); writew_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:92:76: note: expanded from macro 'writew_cpu'
#define writew_cpu(v, c) ((void)__raw_writew((__force u16)cpu_to_le16(v), (c)))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:596:2: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
outl(value, addr);
^~~~~~~~~~~~~~~~~
arch/riscv/include/asm/io.h:61:68: note: expanded from macro 'outl'
#define outl(v,c) ({ __io_pbw(); writel_cpu((v),(void*)(PCI_IOBASE + (c))); __io_paw(); })
~~~~~~~~~~ ^
arch/riscv/include/asm/mmio.h:93:76: note: expanded from macro 'writel_cpu'
#define writel_cpu(v, c) ((void)__raw_writel((__force u32)cpu_to_le32(v), (c)))
^
In file included from drivers/soc/sifive/sifive_l2_cache.c:9:
In file included from include/linux/interrupt.h:11:
In file included from include/linux/hardirq.h:11:
In file included from ./arch/riscv/include/generated/asm/hardirq.h:1:
In file included from include/asm-generic/hardirq.h:17:
In file included from include/linux/irq.h:20:
In file included from include/linux/io.h:13:
In file included from arch/riscv/include/asm/io.h:149:
include/asm-generic/io.h:1024:55: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]
return (port > MMIO_UPPER_LIMIT) ? NULL : PCI_IOBASE + port;
~~~~~~~~~~ ^
drivers/soc/sifive/sifive_l2_cache.c:75:22: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_START'
(start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
^
drivers/soc/sifive/sifive_l2_cache.c:76:9: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_SIZE'
CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
^
drivers/soc/sifive/sifive_l2_cache.c:74:13: error: use of undeclared identifier 'CONFIG_SIFIVE_L2_FLUSH_START'
if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
^
>> drivers/soc/sifive/sifive_l2_cache.c:55:6: warning: no previous prototype for function 'sifive_l2_flush64_range' [-Wmissing-prototypes]
void sifive_l2_flush64_range(unsigned long start, unsigned long len)
^
drivers/soc/sifive/sifive_l2_cache.c:55:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void sifive_l2_flush64_range(unsigned long start, unsigned long len)
^
static
8 warnings and 3 errors generated.
Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for LOCKDEP
Depends on DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT && (FRAME_POINTER || MIPS || PPC || S390 || MICROBLAZE || ARM || ARC || X86)
Selected by
- DEBUG_LOCK_ALLOC && DEBUG_KERNEL && LOCK_DEBUGGING_SUPPORT
WARNING: unmet direct dependencies detected for ERRATA_SIFIVE
Depends on RISCV_ERRATA_ALTERNATIVE
Selected by
- SOC_SIFIVE
vim +/sifive_l2_flush64_range +55 drivers/soc/sifive/sifive_l2_cache.c
54
> 55 void sifive_l2_flush64_range(unsigned long start, unsigned long len)
56 {
57 unsigned long line;
58
59 if(!l2_base) {
60 pr_warn("L2CACHE: base addr invalid, skipping flush\n");
61 return;
62 }
63
64 /* TODO: if (len == 0), skipping flush or going on? */
65 if(!len) {
66 pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start);
67 return;
68 }
69
70 len = len + (start % SIFIVE_L2_FLUSH64_LINE_LEN);
71 start = ALIGN_DOWN(start, SIFIVE_L2_FLUSH64_LINE_LEN);
72
73 /* make sure the address is in the range */
74 if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
> 75 (start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
76 CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
77 WARN(1, "L2CACHE: flush64 out of range: %lx(%lx), skip flush\n",
78 start, len);
79 return;
80 }
81
82 mb(); /* sync */
83 for (line = start; line < start + len;
84 line += SIFIVE_L2_FLUSH64_LINE_LEN) {
85 writeq(line, l2_base + SIFIVE_L2_FLUSH64);
86 mb();
87 }
88 }
89
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
[android-common:android-4.19 1/2] drivers/scsi/ufs/ufshcd-crypto.c:250:26: sparse: sparse: symbol 'ufshcd_blk_crypto_mode_num_for_alg_dusize' was not declared. Should it be static?
by kernel test robot
tree: https://android.googlesource.com/kernel/common android-4.19
head: 9e25a3c2aea5621981b002e8c9b45553dc44112a
commit: b01c73ea7129745ce9d94b8d3b35663b716cd95b [1/2] BACKPORT: FROMLIST: Update Inline Encryption from v5 to v6 of patch series
config: x86_64-randconfig-s022-20210618 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-341-g8af24329-dirty
git remote add android-common https://android.googlesource.com/kernel/common
git fetch --no-tags android-common android-4.19
git checkout b01c73ea7129745ce9d94b8d3b35663b716cd95b
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/scsi/ufs/ufshcd-crypto.c:250:26: sparse: sparse: symbol 'ufshcd_blk_crypto_mode_num_for_alg_dusize' was not declared. Should it be static?
drivers/scsi/ufs/ufshcd-crypto.c:250:26: warning: no previous prototype for 'ufshcd_blk_crypto_mode_num_for_alg_dusize' [-Wmissing-prototypes]
250 | enum blk_crypto_mode_num ufshcd_blk_crypto_mode_num_for_alg_dusize(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/scsi/ufs/ufshcd-crypto.c:272: warning: Function parameter or member 'ksm_ops' not described in 'ufshcd_hba_init_crypto_spec'
vim +/ufshcd_blk_crypto_mode_num_for_alg_dusize +250 drivers/scsi/ufs/ufshcd-crypto.c
249
> 250 enum blk_crypto_mode_num ufshcd_blk_crypto_mode_num_for_alg_dusize(
251 enum ufs_crypto_alg ufs_crypto_alg,
252 enum ufs_crypto_key_size key_size)
253 {
254 /*
255 * This is currently the only mode that UFS and blk-crypto both support.
256 */
257 if (ufs_crypto_alg == UFS_CRYPTO_ALG_AES_XTS &&
258 key_size == UFS_CRYPTO_KEY_SIZE_256)
259 return BLK_ENCRYPTION_MODE_AES_256_XTS;
260
261 return BLK_ENCRYPTION_MODE_INVALID;
262 }
263
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
[android-common:android13-5.10 6733/10616] arch/arm64/kvm/fpsimd.c:129:5: error: implicit declaration of function 'sve_cond_update_zcr_vq'
by kernel test robot
tree: https://android.googlesource.com/kernel/common android13-5.10
head: 2637b5e5c6b68f2e91a3285187141ec3408040e7
commit: b0e15c8c44275afef4aacfb1560e38b974b02ac8 [6733/10616] FROMGIT: KVM: arm64: Save/restore SVE state for nVHE
config: arm64-randconfig-r003-20210618 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 64720f57bea6a6bf033feef4a5751ab9c0c3b401)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
git remote add android-common https://android.googlesource.com/kernel/common
git fetch --no-tags android-common android13-5.10
git checkout b0e15c8c44275afef4aacfb1560e38b974b02ac8
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> arch/arm64/kvm/fpsimd.c:129:5: error: implicit declaration of function 'sve_cond_update_zcr_vq' [-Werror,-Wimplicit-function-declaration]
sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1,
^
1 error generated.
vim +/sve_cond_update_zcr_vq +129 arch/arm64/kvm/fpsimd.c
108
109 /*
110 * Write back the vcpu FPSIMD regs if they are dirty, and invalidate the
111 * cpu FPSIMD regs so that they can't be spuriously reused if this vcpu
112 * disappears and another task or vcpu appears that recycles the same
113 * struct fpsimd_state.
114 */
115 void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)
116 {
117 unsigned long flags;
118 bool host_has_sve = system_supports_sve();
119 bool guest_has_sve = vcpu_has_sve(vcpu);
120
121 local_irq_save(flags);
122
123 if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {
124 if (guest_has_sve) {
125 __vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR);
126
127 /* Restore the VL that was saved when bound to the CPU */
128 if (!has_vhe())
> 129 sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1,
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months
[android-common:android13-5.10 6732/10616] arch/arm64/kvm/hyp/nvhe/hyp-main.c:245:3: error: implicit declaration of function 'sve_cond_update_zcr_vq'
by kernel test robot
tree: https://android.googlesource.com/kernel/common android13-5.10
head: 2637b5e5c6b68f2e91a3285187141ec3408040e7
commit: 194fd166b5d5f6694047b45dc409f9620a8a9646 [6732/10616] BACKPORT: FROMGIT: KVM: arm64: Trap host SVE accesses when the FPSIMD state is dirty
config: arm64-randconfig-r003-20210618 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 64720f57bea6a6bf033feef4a5751ab9c0c3b401)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
git remote add android-common https://android.googlesource.com/kernel/common
git fetch --no-tags android-common android13-5.10
git checkout 194fd166b5d5f6694047b45dc409f9620a8a9646
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
In file included from arch/arm64/kvm/hyp/nvhe/hyp-main.c:7:
arch/arm64/kvm/hyp/include/hyp/switch.h:216:2: error: implicit declaration of function 'sve_cond_update_zcr_vq' [-Werror,-Wimplicit-function-declaration]
sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1, SYS_ZCR_EL2);
^
>> arch/arm64/kvm/hyp/nvhe/hyp-main.c:245:3: error: implicit declaration of function 'sve_cond_update_zcr_vq' [-Werror,-Wimplicit-function-declaration]
sve_cond_update_zcr_vq(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2);
^
arch/arm64/kvm/hyp/nvhe/hyp-main.c:233:6: warning: no previous prototype for function 'handle_trap' [-Wmissing-prototypes]
void handle_trap(struct kvm_cpu_context *host_ctxt)
^
arch/arm64/kvm/hyp/nvhe/hyp-main.c:233:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void handle_trap(struct kvm_cpu_context *host_ctxt)
^
static
1 warning and 2 errors generated.
vim +/sve_cond_update_zcr_vq +245 arch/arm64/kvm/hyp/nvhe/hyp-main.c
232
233 void handle_trap(struct kvm_cpu_context *host_ctxt)
234 {
235 u64 esr = read_sysreg_el2(SYS_ESR);
236
237 switch (ESR_ELx_EC(esr)) {
238 case ESR_ELx_EC_HVC64:
239 handle_host_hcall(host_ctxt);
240 break;
241 case ESR_ELx_EC_SMC64:
242 handle_host_smc(host_ctxt);
243 break;
244 case ESR_ELx_EC_SVE:
> 245 sve_cond_update_zcr_vq(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
1 year, 3 months