Re: [PATCH v2 3/6] drm/meson: venc: add ENCL encoder setup for MIPI-DSI output
by kernel test robot
Hi Neil,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[also build test ERROR on drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next v5.16 next-20220120]
[cannot apply to drm/drm-next drm-intel/for-linux-next airlied/drm-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Neil-Armstrong/drm-meson-add-sup...
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: arm-randconfig-r002-20220120 (https://download.01.org/0day-ci/archive/20220120/202201202322.HA2Ce0Rs-lk...)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f7b7138a62648f4019c55e4671682af1f851f295)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/0day-ci/linux/commit/582fe216b10e102620e7148d6df969d4e...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Neil-Armstrong/drm-meson-add-support-for-MIPI-DSI-Display/20220120-163607
git checkout 582fe216b10e102620e7148d6df969d4eed430af
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/meson/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/meson/meson_venc.c:1595:10: error: implicit declaration of function 'FIELD_PREP' [-Werror,-Wimplicit-function-declaration]
FIELD_PREP(L_GAMMA_ADDR_PORT_ADDR, 0),
^
>> drivers/gpu/drm/meson/meson_venc.c:1661:17: error: use of undeclared identifier 'ENCL_PX_LN_CNT_SHADOW_EN'
writel_relaxed(ENCL_PX_LN_CNT_SHADOW_EN, priv->io_base + _REG(ENCL_VIDEO_MODE));
^
>> drivers/gpu/drm/meson/meson_venc.c:1662:17: error: use of undeclared identifier 'ENCL_VIDEO_MODE_ADV_VFIFO_EN'
writel_relaxed(ENCL_VIDEO_MODE_ADV_VFIFO_EN |
^
>> drivers/gpu/drm/meson/meson_venc.c:1663:10: error: use of undeclared identifier 'ENCL_VIDEO_MODE_ADV_GAIN_HDTV'
ENCL_VIDEO_MODE_ADV_GAIN_HDTV |
^
>> drivers/gpu/drm/meson/meson_venc.c:1664:10: error: use of undeclared identifier 'ENCL_SEL_GAMMA_RGB_IN'
ENCL_SEL_GAMMA_RGB_IN, priv->io_base + _REG(ENCL_VIDEO_MODE_ADV));
^
>> drivers/gpu/drm/meson/meson_venc.c:1666:17: error: use of undeclared identifier 'ENCL_VIDEO_FILT_CTRL_BYPASS_FILTER'
writel_relaxed(ENCL_VIDEO_FILT_CTRL_BYPASS_FILTER,
^
>> drivers/gpu/drm/meson/meson_venc.c:1681:17: error: use of undeclared identifier 'ENCL_VIDEO_RGBIN_RGB'
writel_relaxed(ENCL_VIDEO_RGBIN_RGB | ENCL_VIDEO_RGBIN_ZBLK,
^
>> drivers/gpu/drm/meson/meson_venc.c:1681:40: error: use of undeclared identifier 'ENCL_VIDEO_RGBIN_ZBLK'
writel_relaxed(ENCL_VIDEO_RGBIN_RGB | ENCL_VIDEO_RGBIN_ZBLK,
^
drivers/gpu/drm/meson/meson_venc.c:1690:22: error: use of undeclared identifier 'ENCL_VIDEO_MODE_ADV_VFIFO_EN'
writel_bits_relaxed(ENCL_VIDEO_MODE_ADV_VFIFO_EN, 0,
^
drivers/gpu/drm/meson/meson_venc.c:1690:22: error: use of undeclared identifier 'ENCL_VIDEO_MODE_ADV_VFIFO_EN'
>> drivers/gpu/drm/meson/meson_venc.c:1753:17: error: use of undeclared identifier 'L_TCON_MISC_SEL_STV1'
writel_relaxed(L_TCON_MISC_SEL_STV1 | L_TCON_MISC_SEL_STV2,
^
>> drivers/gpu/drm/meson/meson_venc.c:1753:40: error: use of undeclared identifier 'L_TCON_MISC_SEL_STV2'
writel_relaxed(L_TCON_MISC_SEL_STV1 | L_TCON_MISC_SEL_STV2,
^
>> drivers/gpu/drm/meson/meson_venc.c:1952:18: error: use of undeclared identifier 'VENC_INTCTRL_ENCP_LNRST_INT_EN'
writel_relaxed(VENC_INTCTRL_ENCP_LNRST_INT_EN,
^
13 errors generated.
vim +/FIELD_PREP +1595 drivers/gpu/drm/meson/meson_venc.c
1579
1580 static void meson_encl_set_gamma_table(struct meson_drm *priv, u16 *data,
1581 u32 rgb_mask)
1582 {
1583 int i, ret;
1584 u32 reg;
1585
1586 writel_bits_relaxed(L_GAMMA_CNTL_PORT_EN, 0,
1587 priv->io_base + _REG(L_GAMMA_CNTL_PORT));
1588
1589 ret = readl_relaxed_poll_timeout(priv->io_base + _REG(L_GAMMA_CNTL_PORT),
1590 reg, reg & L_GAMMA_CNTL_PORT_ADR_RDY, 10, 10000);
1591 if (ret)
1592 pr_warn("%s: GAMMA ADR_RDY timeout\n", __func__);
1593
1594 writel_relaxed(L_GAMMA_ADDR_PORT_AUTO_INC | rgb_mask |
> 1595 FIELD_PREP(L_GAMMA_ADDR_PORT_ADDR, 0),
1596 priv->io_base + _REG(L_GAMMA_ADDR_PORT));
1597
1598 for (i = 0; i < 256; i++) {
1599 ret = readl_relaxed_poll_timeout(priv->io_base + _REG(L_GAMMA_CNTL_PORT),
1600 reg, reg & L_GAMMA_CNTL_PORT_WR_RDY,
1601 10, 10000);
1602 if (ret)
1603 pr_warn_once("%s: GAMMA WR_RDY timeout\n", __func__);
1604
1605 writel_relaxed(data[i], priv->io_base + _REG(L_GAMMA_DATA_PORT));
1606 }
1607
1608 ret = readl_relaxed_poll_timeout(priv->io_base + _REG(L_GAMMA_CNTL_PORT),
1609 reg, reg & L_GAMMA_CNTL_PORT_ADR_RDY, 10, 10000);
1610 if (ret)
1611 pr_warn("%s: GAMMA ADR_RDY timeout\n", __func__);
1612
1613 writel_relaxed(L_GAMMA_ADDR_PORT_AUTO_INC | rgb_mask |
1614 FIELD_PREP(L_GAMMA_ADDR_PORT_ADDR, 0x23),
1615 priv->io_base + _REG(L_GAMMA_ADDR_PORT));
1616 }
1617
1618 void meson_encl_load_gamma(struct meson_drm *priv)
1619 {
1620 meson_encl_set_gamma_table(priv, meson_encl_gamma_table, L_GAMMA_ADDR_PORT_SEL_R);
1621 meson_encl_set_gamma_table(priv, meson_encl_gamma_table, L_GAMMA_ADDR_PORT_SEL_G);
1622 meson_encl_set_gamma_table(priv, meson_encl_gamma_table, L_GAMMA_ADDR_PORT_SEL_B);
1623
1624 writel_bits_relaxed(L_GAMMA_CNTL_PORT_EN, L_GAMMA_CNTL_PORT_EN,
1625 priv->io_base + _REG(L_GAMMA_CNTL_PORT));
1626 }
1627
1628 void meson_venc_mipi_dsi_mode_set(struct meson_drm *priv,
1629 const struct drm_display_mode *mode)
1630 {
1631 unsigned int max_pxcnt;
1632 unsigned int max_lncnt;
1633 unsigned int havon_begin;
1634 unsigned int havon_end;
1635 unsigned int vavon_bline;
1636 unsigned int vavon_eline;
1637 unsigned int hso_begin;
1638 unsigned int hso_end;
1639 unsigned int vso_begin;
1640 unsigned int vso_end;
1641 unsigned int vso_bline;
1642 unsigned int vso_eline;
1643
1644 max_pxcnt = mode->htotal - 1;
1645 max_lncnt = mode->vtotal - 1;
1646 havon_begin = mode->htotal - mode->hsync_start;
1647 havon_end = havon_begin + mode->hdisplay - 1;
1648 vavon_bline = mode->vtotal - mode->vsync_start;
1649 vavon_eline = vavon_bline + mode->vdisplay - 1;
1650 hso_begin = 0;
1651 hso_end = mode->hsync_end - mode->hsync_start;
1652 vso_begin = 0;
1653 vso_end = 0;
1654 vso_bline = 0;
1655 vso_eline = mode->vsync_end - mode->vsync_start;
1656
1657 meson_vpp_setup_mux(priv, MESON_VIU_VPP_MUX_ENCL);
1658
1659 writel_relaxed(0, priv->io_base + _REG(ENCL_VIDEO_EN));
1660
> 1661 writel_relaxed(ENCL_PX_LN_CNT_SHADOW_EN, priv->io_base + _REG(ENCL_VIDEO_MODE));
> 1662 writel_relaxed(ENCL_VIDEO_MODE_ADV_VFIFO_EN |
> 1663 ENCL_VIDEO_MODE_ADV_GAIN_HDTV |
> 1664 ENCL_SEL_GAMMA_RGB_IN, priv->io_base + _REG(ENCL_VIDEO_MODE_ADV));
1665
> 1666 writel_relaxed(ENCL_VIDEO_FILT_CTRL_BYPASS_FILTER,
1667 priv->io_base + _REG(ENCL_VIDEO_FILT_CTRL));
1668 writel_relaxed(max_pxcnt, priv->io_base + _REG(ENCL_VIDEO_MAX_PXCNT));
1669 writel_relaxed(max_lncnt, priv->io_base + _REG(ENCL_VIDEO_MAX_LNCNT));
1670 writel_relaxed(havon_begin, priv->io_base + _REG(ENCL_VIDEO_HAVON_BEGIN));
1671 writel_relaxed(havon_end, priv->io_base + _REG(ENCL_VIDEO_HAVON_END));
1672 writel_relaxed(vavon_bline, priv->io_base + _REG(ENCL_VIDEO_VAVON_BLINE));
1673 writel_relaxed(vavon_eline, priv->io_base + _REG(ENCL_VIDEO_VAVON_ELINE));
1674
1675 writel_relaxed(hso_begin, priv->io_base + _REG(ENCL_VIDEO_HSO_BEGIN));
1676 writel_relaxed(hso_end, priv->io_base + _REG(ENCL_VIDEO_HSO_END));
1677 writel_relaxed(vso_begin, priv->io_base + _REG(ENCL_VIDEO_VSO_BEGIN));
1678 writel_relaxed(vso_end, priv->io_base + _REG(ENCL_VIDEO_VSO_END));
1679 writel_relaxed(vso_bline, priv->io_base + _REG(ENCL_VIDEO_VSO_BLINE));
1680 writel_relaxed(vso_eline, priv->io_base + _REG(ENCL_VIDEO_VSO_ELINE));
> 1681 writel_relaxed(ENCL_VIDEO_RGBIN_RGB | ENCL_VIDEO_RGBIN_ZBLK,
1682 priv->io_base + _REG(ENCL_VIDEO_RGBIN_CTRL));
1683
1684 /* default black pattern */
1685 writel_relaxed(0, priv->io_base + _REG(ENCL_TST_MDSEL));
1686 writel_relaxed(0, priv->io_base + _REG(ENCL_TST_Y));
1687 writel_relaxed(0, priv->io_base + _REG(ENCL_TST_CB));
1688 writel_relaxed(0, priv->io_base + _REG(ENCL_TST_CR));
1689 writel_relaxed(1, priv->io_base + _REG(ENCL_TST_EN));
1690 writel_bits_relaxed(ENCL_VIDEO_MODE_ADV_VFIFO_EN, 0,
1691 priv->io_base + _REG(ENCL_VIDEO_MODE_ADV));
1692
1693 writel_relaxed(1, priv->io_base + _REG(ENCL_VIDEO_EN));
1694
1695 writel_relaxed(0, priv->io_base + _REG(L_RGB_BASE_ADDR));
1696 writel_relaxed(0x400, priv->io_base + _REG(L_RGB_COEFF_ADDR)); /* Magic value */
1697
1698 writel_relaxed(L_DITH_CNTL_DITH10_EN, priv->io_base + _REG(L_DITH_CNTL_ADDR));
1699
1700 /* DE signal for TTL */
1701 writel_relaxed(havon_begin, priv->io_base + _REG(L_OEH_HS_ADDR));
1702 writel_relaxed(havon_end + 1, priv->io_base + _REG(L_OEH_HE_ADDR));
1703 writel_relaxed(vavon_bline, priv->io_base + _REG(L_OEH_VS_ADDR));
1704 writel_relaxed(vavon_eline, priv->io_base + _REG(L_OEH_VE_ADDR));
1705
1706 /* DE signal for TTL */
1707 writel_relaxed(havon_begin, priv->io_base + _REG(L_OEV1_HS_ADDR));
1708 writel_relaxed(havon_end + 1, priv->io_base + _REG(L_OEV1_HE_ADDR));
1709 writel_relaxed(vavon_bline, priv->io_base + _REG(L_OEV1_VS_ADDR));
1710 writel_relaxed(vavon_eline, priv->io_base + _REG(L_OEV1_VE_ADDR));
1711
1712 /* Hsync signal for TTL */
1713 if (mode->flags & DRM_MODE_FLAG_PHSYNC) {
1714 writel_relaxed(hso_end, priv->io_base + _REG(L_STH1_HS_ADDR));
1715 writel_relaxed(hso_begin, priv->io_base + _REG(L_STH1_HE_ADDR));
1716 } else {
1717 writel_relaxed(hso_begin, priv->io_base + _REG(L_STH1_HS_ADDR));
1718 writel_relaxed(hso_end, priv->io_base + _REG(L_STH1_HE_ADDR));
1719 }
1720 writel_relaxed(0, priv->io_base + _REG(L_STH1_VS_ADDR));
1721 writel_relaxed(max_lncnt, priv->io_base + _REG(L_STH1_VE_ADDR));
1722
1723 /* Vsync signal for TTL */
1724 writel_relaxed(vso_begin, priv->io_base + _REG(L_STV1_HS_ADDR));
1725 writel_relaxed(vso_end, priv->io_base + _REG(L_STV1_HE_ADDR));
1726 if (mode->flags & DRM_MODE_FLAG_PVSYNC) {
1727 writel_relaxed(vso_eline, priv->io_base + _REG(L_STV1_VS_ADDR));
1728 writel_relaxed(vso_bline, priv->io_base + _REG(L_STV1_VE_ADDR));
1729 } else {
1730 writel_relaxed(vso_bline, priv->io_base + _REG(L_STV1_VS_ADDR));
1731 writel_relaxed(vso_eline, priv->io_base + _REG(L_STV1_VE_ADDR));
1732 }
1733
1734 /* DE signal */
1735 writel_relaxed(havon_begin, priv->io_base + _REG(L_DE_HS_ADDR));
1736 writel_relaxed(havon_end + 1, priv->io_base + _REG(L_DE_HE_ADDR));
1737 writel_relaxed(vavon_bline, priv->io_base + _REG(L_DE_VS_ADDR));
1738 writel_relaxed(vavon_eline, priv->io_base + _REG(L_DE_VE_ADDR));
1739
1740 /* Hsync signal */
1741 writel_relaxed(hso_begin, priv->io_base + _REG(L_HSYNC_HS_ADDR));
1742 writel_relaxed(hso_end, priv->io_base + _REG(L_HSYNC_HE_ADDR));
1743 writel_relaxed(0, priv->io_base + _REG(L_HSYNC_VS_ADDR));
1744 writel_relaxed(max_lncnt, priv->io_base + _REG(L_HSYNC_VE_ADDR));
1745
1746 /* Vsync signal */
1747 writel_relaxed(vso_begin, priv->io_base + _REG(L_VSYNC_HS_ADDR));
1748 writel_relaxed(vso_end, priv->io_base + _REG(L_VSYNC_HE_ADDR));
1749 writel_relaxed(vso_bline, priv->io_base + _REG(L_VSYNC_VS_ADDR));
1750 writel_relaxed(vso_eline, priv->io_base + _REG(L_VSYNC_VE_ADDR));
1751
1752 writel_relaxed(0, priv->io_base + _REG(L_INV_CNT_ADDR));
> 1753 writel_relaxed(L_TCON_MISC_SEL_STV1 | L_TCON_MISC_SEL_STV2,
1754 priv->io_base + _REG(L_TCON_MISC_SEL_ADDR));
1755
1756 priv->venc.current_mode = MESON_VENC_MODE_MIPI_DSI;
1757 }
1758 EXPORT_SYMBOL_GPL(meson_venc_mipi_dsi_mode_set);
1759
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months
Re: [PATCH v2] net: phy: marvell: Honor phy LED set by system firmware on a Dell hardware
by kernel test robot
Hi Kai-Heng,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v5.16 next-20220120]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Kai-Heng-Feng/net-phy-marvell-Ho...
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 1d1df41c5a33359a00e919d54eaebfb789711fdc
config: ia64-allmodconfig (https://download.01.org/0day-ci/archive/20220120/202201202323.K0yx4TYb-lk...)
compiler: ia64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/7556c47e56e3c39c1b4ddb5a8171f943b...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Kai-Heng-Feng/net-phy-marvell-Honor-phy-LED-set-by-system-firmware-on-a-Dell-hardware/20220120-132020
git checkout 7556c47e56e3c39c1b4ddb5a8171f943b10be919
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/net/phy/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
drivers/net/phy/phy_device.c: In function 'phy_attach_direct':
>> drivers/net/phy/phy_device.c:1465:38: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
1465 | phydev->dev_flags |= (u32)dmi->driver_data;
| ^
vim +1465 drivers/net/phy/phy_device.c
1360
1361 /**
1362 * phy_attach_direct - attach a network device to a given PHY device pointer
1363 * @dev: network device to attach
1364 * @phydev: Pointer to phy_device to attach
1365 * @flags: PHY device's dev_flags
1366 * @interface: PHY device's interface
1367 *
1368 * Description: Called by drivers to attach to a particular PHY
1369 * device. The phy_device is found, and properly hooked up
1370 * to the phy_driver. If no driver is attached, then a
1371 * generic driver is used. The phy_device is given a ptr to
1372 * the attaching device, and given a callback for link status
1373 * change. The phy_device is returned to the attaching driver.
1374 * This function takes a reference on the phy device.
1375 */
1376 int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1377 u32 flags, phy_interface_t interface)
1378 {
1379 struct mii_bus *bus = phydev->mdio.bus;
1380 struct device *d = &phydev->mdio.dev;
1381 struct module *ndev_owner = NULL;
1382 const struct dmi_system_id *dmi;
1383 bool using_genphy = false;
1384 int err;
1385
1386 /* For Ethernet device drivers that register their own MDIO bus, we
1387 * will have bus->owner match ndev_mod, so we do not want to increment
1388 * our own module->refcnt here, otherwise we would not be able to
1389 * unload later on.
1390 */
1391 if (dev)
1392 ndev_owner = dev->dev.parent->driver->owner;
1393 if (ndev_owner != bus->owner && !try_module_get(bus->owner)) {
1394 phydev_err(phydev, "failed to get the bus module\n");
1395 return -EIO;
1396 }
1397
1398 get_device(d);
1399
1400 /* Assume that if there is no driver, that it doesn't
1401 * exist, and we should use the genphy driver.
1402 */
1403 if (!d->driver) {
1404 if (phydev->is_c45)
1405 d->driver = &genphy_c45_driver.mdiodrv.driver;
1406 else
1407 d->driver = &genphy_driver.mdiodrv.driver;
1408
1409 using_genphy = true;
1410 }
1411
1412 if (!try_module_get(d->driver->owner)) {
1413 phydev_err(phydev, "failed to get the device driver module\n");
1414 err = -EIO;
1415 goto error_put_device;
1416 }
1417
1418 if (using_genphy) {
1419 err = d->driver->probe(d);
1420 if (err >= 0)
1421 err = device_bind_driver(d);
1422
1423 if (err)
1424 goto error_module_put;
1425 }
1426
1427 if (phydev->attached_dev) {
1428 dev_err(&dev->dev, "PHY already attached\n");
1429 err = -EBUSY;
1430 goto error;
1431 }
1432
1433 phydev->phy_link_change = phy_link_change;
1434 if (dev) {
1435 phydev->attached_dev = dev;
1436 dev->phydev = phydev;
1437
1438 if (phydev->sfp_bus_attached)
1439 dev->sfp_bus = phydev->sfp_bus;
1440 else if (dev->sfp_bus)
1441 phydev->is_on_sfp_module = true;
1442 }
1443
1444 /* Some Ethernet drivers try to connect to a PHY device before
1445 * calling register_netdevice() -> netdev_register_kobject() and
1446 * does the dev->dev.kobj initialization. Here we only check for
1447 * success which indicates that the network device kobject is
1448 * ready. Once we do that we still need to keep track of whether
1449 * links were successfully set up or not for phy_detach() to
1450 * remove them accordingly.
1451 */
1452 phydev->sysfs_links = false;
1453
1454 phy_sysfs_create_links(phydev);
1455
1456 if (!phydev->attached_dev) {
1457 err = sysfs_create_file(&phydev->mdio.dev.kobj,
1458 &dev_attr_phy_standalone.attr);
1459 if (err)
1460 phydev_err(phydev, "error creating 'phy_standalone' sysfs entry\n");
1461 }
1462
1463 dmi = dmi_first_match(platform_flags);
1464 if (dmi)
> 1465 phydev->dev_flags |= (u32)dmi->driver_data;
1466
1467 phydev->dev_flags |= flags;
1468
1469 phydev->interface = interface;
1470
1471 phydev->state = PHY_READY;
1472
1473 /* Port is set to PORT_TP by default and the actual PHY driver will set
1474 * it to different value depending on the PHY configuration. If we have
1475 * the generic PHY driver we can't figure it out, thus set the old
1476 * legacy PORT_MII value.
1477 */
1478 if (using_genphy)
1479 phydev->port = PORT_MII;
1480
1481 /* Initial carrier state is off as the phy is about to be
1482 * (re)initialized.
1483 */
1484 if (dev)
1485 netif_carrier_off(phydev->attached_dev);
1486
1487 /* Do initial configuration here, now that
1488 * we have certain key parameters
1489 * (dev_flags and interface)
1490 */
1491 err = phy_init_hw(phydev);
1492 if (err)
1493 goto error;
1494
1495 err = phy_disable_interrupts(phydev);
1496 if (err)
1497 return err;
1498
1499 phy_resume(phydev);
1500 phy_led_triggers_register(phydev);
1501
1502 return err;
1503
1504 error:
1505 /* phy_detach() does all of the cleanup below */
1506 phy_detach(phydev);
1507 return err;
1508
1509 error_module_put:
1510 module_put(d->driver->owner);
1511 error_put_device:
1512 put_device(d);
1513 if (ndev_owner != bus->owner)
1514 module_put(bus->owner);
1515 return err;
1516 }
1517 EXPORT_SYMBOL(phy_attach_direct);
1518
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months
[csky-linux:riscv_compat_v3 16/17] arch/riscv/kernel/compat_signal.c:199:5: warning: no previous prototype for function 'compat_setup_rt_frame'
by kernel test robot
Hi Guo,
First bad commit (maybe != root cause):
tree: https://github.com/c-sky/csky-linux riscv_compat_v3
head: 83f51edf28491d90ae9591131bc7cdd8ce7d3764
commit: ca6210b52caef524df951e60ec5bc09fb3196017 [16/17] riscv: compat: Add COMPAT Kbuild skeletal support
config: riscv-randconfig-r021-20220120 (https://download.01.org/0day-ci/archive/20220120/202201202234.gybNbUYU-lk...)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f7b7138a62648f4019c55e4671682af1f851f295)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install riscv cross compiling tool for clang build
# apt-get install binutils-riscv64-linux-gnu
# https://github.com/c-sky/csky-linux/commit/ca6210b52caef524df951e60ec5bc0...
git remote add csky-linux https://github.com/c-sky/csky-linux
git fetch --no-tags csky-linux riscv_compat_v3
git checkout ca6210b52caef524df951e60ec5bc09fb3196017
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/kernel/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
>> arch/riscv/kernel/compat_signal.c:199:5: warning: no previous prototype for function 'compat_setup_rt_frame' [-Wmissing-prototypes]
int compat_setup_rt_frame(struct ksignal *ksig, sigset_t *set,
^
arch/riscv/kernel/compat_signal.c:199:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
int compat_setup_rt_frame(struct ksignal *ksig, sigset_t *set,
^
static
1 warning generated.
vim +/compat_setup_rt_frame +199 arch/riscv/kernel/compat_signal.c
97edfbe8120313 Guo Ren 2021-12-13 198
97edfbe8120313 Guo Ren 2021-12-13 @199 int compat_setup_rt_frame(struct ksignal *ksig, sigset_t *set,
97edfbe8120313 Guo Ren 2021-12-13 200 struct pt_regs *regs)
97edfbe8120313 Guo Ren 2021-12-13 201 {
97edfbe8120313 Guo Ren 2021-12-13 202 struct compat_rt_sigframe __user *frame;
97edfbe8120313 Guo Ren 2021-12-13 203 long err = 0;
97edfbe8120313 Guo Ren 2021-12-13 204
97edfbe8120313 Guo Ren 2021-12-13 205 frame = compat_get_sigframe(ksig, regs, sizeof(*frame));
97edfbe8120313 Guo Ren 2021-12-13 206 if (!access_ok(frame, sizeof(*frame)))
97edfbe8120313 Guo Ren 2021-12-13 207 return -EFAULT;
97edfbe8120313 Guo Ren 2021-12-13 208
97edfbe8120313 Guo Ren 2021-12-13 209 err |= copy_siginfo_to_user32(&frame->info, &ksig->info);
97edfbe8120313 Guo Ren 2021-12-13 210
97edfbe8120313 Guo Ren 2021-12-13 211 /* Create the ucontext. */
97edfbe8120313 Guo Ren 2021-12-13 212 err |= __put_user(0, &frame->uc.uc_flags);
97edfbe8120313 Guo Ren 2021-12-13 213 err |= __put_user(NULL, &frame->uc.uc_link);
97edfbe8120313 Guo Ren 2021-12-13 214 err |= __compat_save_altstack(&frame->uc.uc_stack, regs->sp);
97edfbe8120313 Guo Ren 2021-12-13 215 err |= compat_setup_sigcontext(frame, regs);
97edfbe8120313 Guo Ren 2021-12-13 216 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
97edfbe8120313 Guo Ren 2021-12-13 217 if (err)
97edfbe8120313 Guo Ren 2021-12-13 218 return -EFAULT;
97edfbe8120313 Guo Ren 2021-12-13 219
97edfbe8120313 Guo Ren 2021-12-13 220 regs->ra = (unsigned long)COMPAT_VDSO_SYMBOL(
97edfbe8120313 Guo Ren 2021-12-13 221 current->mm->context.vdso, rt_sigreturn);
97edfbe8120313 Guo Ren 2021-12-13 222
97edfbe8120313 Guo Ren 2021-12-13 223 /*
97edfbe8120313 Guo Ren 2021-12-13 224 * Set up registers for signal handler.
97edfbe8120313 Guo Ren 2021-12-13 225 * Registers that we don't modify keep the value they had from
97edfbe8120313 Guo Ren 2021-12-13 226 * user-space at the time we took the signal.
97edfbe8120313 Guo Ren 2021-12-13 227 * We always pass siginfo and mcontext, regardless of SA_SIGINFO,
97edfbe8120313 Guo Ren 2021-12-13 228 * since some things rely on this (e.g. glibc's debug/segfault.c).
97edfbe8120313 Guo Ren 2021-12-13 229 */
97edfbe8120313 Guo Ren 2021-12-13 230 regs->epc = (unsigned long)ksig->ka.sa.sa_handler;
97edfbe8120313 Guo Ren 2021-12-13 231 regs->sp = (unsigned long)frame;
97edfbe8120313 Guo Ren 2021-12-13 232 regs->a0 = ksig->sig; /* a0: signal number */
97edfbe8120313 Guo Ren 2021-12-13 233 regs->a1 = (unsigned long)(&frame->info); /* a1: siginfo pointer */
97edfbe8120313 Guo Ren 2021-12-13 234 regs->a2 = (unsigned long)(&frame->uc); /* a2: ucontext pointer */
97edfbe8120313 Guo Ren 2021-12-13 235
:::::: The code at line 199 was first introduced by commit
:::::: 97edfbe8120313cf2a214c61d72175cf6f564430 riscv: compat: signal: Add rt_frame implementation
:::::: TO: Guo Ren <guoren(a)linux.alibaba.com>
:::::: CC: Guo Ren <guoren(a)linux.alibaba.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months
Re: [PATCH v5] ASoC: adds component driver for TAS575xM digital amplifiers
by Joerg Schambacher
On Thu, Jan 20, 2022 at 02:18:26AM +0800, kernel test robot wrote:
> tree: https://github.com/0day-ci/linux/commits/UPDATE-20220119-210919/Joerg-Sch...
> head: 05b8bf5544bc621031f5a0a6bdf1ac6468a7367b
> commit: 05b8bf5544bc621031f5a0a6bdf1ac6468a7367b ASoC: adds component driver for TAS575xM digital amplifiers
> date: 5 hours ago
> config: riscv-randconfig-c006-20220118 (https://download.01.org/0day-ci/archive/20220120/202201200259.nNgbKOJd-lk...)
> compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f7b7138a62648f4019c55e4671682af1f851f295)
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # install riscv cross compiling tool for clang build
> # apt-get install binutils-riscv64-linux-gnu
> # https://github.com/0day-ci/linux/commit/05b8bf5544bc621031f5a0a6bdf1ac646...
> git remote add linux-review https://github.com/0day-ci/linux
> git fetch --no-tags linux-review UPDATE-20220119-210919/Joerg-Schambacher/ASoC-adds-component-driver-for-TAS575xM-digital-amplifiers/20220110-164852
> git checkout 05b8bf5544bc621031f5a0a6bdf1ac6468a7367b
> # save the config file to linux build tree
> mkdir build_dir
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash sound/soc/codecs/
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp(a)intel.com>
>
> All warnings (new ones prefixed by >>):
>
> >> sound/soc/codecs/tas5754m.c:246:7: warning: variable 'ret' is used uninitialized whenever switch case is taken [-Wsometimes-uninitialized]
> case SND_SOC_BIAS_ON:
> ^~~~~~~~~~~~~~~
> sound/soc/codecs/tas5754m.c:267:9: note: uninitialized use occurs here
> return ret;
> ^~~
> sound/soc/codecs/tas5754m.c:247:7: warning: variable 'ret' is used uninitialized whenever switch case is taken [-Wsometimes-uninitialized]
> case SND_SOC_BIAS_PREPARE:
> ^~~~~~~~~~~~~~~~~~~~
> sound/soc/codecs/tas5754m.c:267:9: note: uninitialized use occurs here
> return ret;
> ^~~
> sound/soc/codecs/tas5754m.c:242:9: note: initialize the variable 'ret' to silence this warning
> int ret;
> ^
> = 0
> 2 warnings generated.
>
>
> vim +/ret +246 sound/soc/codecs/tas5754m.c
>
> 236
> 237 static int tas5754m_set_bias_level(struct snd_soc_component *component,
> 238 enum snd_soc_bias_level level)
> 239 {
> 240 struct tas5754m_priv *tas5754m =
> 241 snd_soc_component_get_drvdata(component);
> 242 int ret;
> 243
> 244 switch (level) {
> 245 default:
> > 246 case SND_SOC_BIAS_ON:
> 247 case SND_SOC_BIAS_PREPARE:
> 248 break;
> 249
> 250 case SND_SOC_BIAS_STANDBY:
> 251 ret = regmap_update_bits(tas5754m->regmap,
> 252 TAS5754M_POWER, TAS5754M_RQST, 0);
> 253 if (ret)
> 254 dev_err(component->dev,
> 255 "Failed to remove standby: %d\n", ret);
> 256 break;
> 257
> 258 case SND_SOC_BIAS_OFF:
> 259 ret = regmap_update_bits(tas5754m->regmap,
> 260 TAS5754M_POWER, TAS5754M_RQST, TAS5754M_RQST);
> 261 if (ret)
> 262 dev_err(component->dev,
> 263 "Failed to request standby: %d\n", ret);
> 264 break;
> 265 }
> 266
> 267 return ret;
> 268 }
> 269
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
all, fixed.
Joerg
From 331a880edff308e8f0608f72f244c25e56162e24 Mon Sep 17 00:00:00 2001
From: Joerg Schambacher <joerg(a)hifiberry.com>
Date: Tue, 5 Oct 2021 14:38:21 +0200
Subject: [PATCH] ASoC: adds component driver for TAS575xM digital amplifiers
Adds a minimum component driver to run the amplifier in I2S master
mode only from standard audio clocks. Therefore, it only allows
44.1, 88.2, 176.4, 48, 96 and 192ksps with 16, 20, 24 and 32 bits
sample size. Digital volume control and the -6dB and +0.8dB switches
are supported.
Signed-off-by: Joerg Schambacher <joerg(a)hifiberry.com>
---
sound/soc/codecs/Kconfig | 8 +
sound/soc/codecs/Makefile | 2 +
sound/soc/codecs/tas5754m.c | 691 ++++++++++++++++++++++++++++++++++++
sound/soc/codecs/tas5754m.h | 260 ++++++++++++++
4 files changed, 961 insertions(+)
create mode 100644 sound/soc/codecs/tas5754m.c
create mode 100644 sound/soc/codecs/tas5754m.h
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 82ee233a269d..cf0584948fcf 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -210,6 +210,7 @@ config SND_SOC_ALL_CODECS
imply SND_SOC_TAS5086
imply SND_SOC_TAS571X
imply SND_SOC_TAS5720
+ imply SND_SOC_TAS5754M
imply SND_SOC_TAS6424
imply SND_SOC_TDA7419
imply SND_SOC_TFA9879
@@ -1419,6 +1420,13 @@ config SND_SOC_TAS5720
Enable support for Texas Instruments TAS5720L/M high-efficiency mono
Class-D audio power amplifiers.
+config SND_SOC_TAS5754M
+ tristate "Texas Instruments TAS5754M Digital Input Audio amplifier"
+ depends on I2C
+ help
+ Enable support for Texas Instruments TAS5754M digital input
+ Class-D audio power amplifiers.
+
config SND_SOC_TAS6424
tristate "Texas Instruments TAS6424 Quad-Channel Audio amplifier"
depends on I2C
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 8dcea2c4604a..39984900258a 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -227,6 +227,7 @@ snd-soc-sti-sas-objs := sti-sas.o
snd-soc-tas5086-objs := tas5086.o
snd-soc-tas571x-objs := tas571x.o
snd-soc-tas5720-objs := tas5720.o
+snd-soc-tas5754m-objs := tas5754m.o
snd-soc-tas6424-objs := tas6424.o
snd-soc-tda7419-objs := tda7419.o
snd-soc-tas2770-objs := tas2770.o
@@ -555,6 +556,7 @@ obj-$(CONFIG_SND_SOC_TAS2764) += snd-soc-tas2764.o
obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o
obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc-tas5720.o
+obj-$(CONFIG_SND_SOC_TAS5754M) += snd-soc-tas5754m.o
obj-$(CONFIG_SND_SOC_TAS6424) += snd-soc-tas6424.o
obj-$(CONFIG_SND_SOC_TDA7419) += snd-soc-tda7419.o
obj-$(CONFIG_SND_SOC_TAS2770) += snd-soc-tas2770.o
diff --git a/sound/soc/codecs/tas5754m.c b/sound/soc/codecs/tas5754m.c
new file mode 100644
index 000000000000..06c10002f32e
--- /dev/null
+++ b/sound/soc/codecs/tas5754m.c
@@ -0,0 +1,691 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Driver for the TAS5754M Audio Amplifier
+ *
+ * Author: Joerg Schambacher <joerg(a)hifiberry.com>
+ * with fragments from Andy Liu <andy-liu(a)ti.com>
+ *
+ * The driver supports I2S master mode only with standard audio
+ * frequencies 44.1 to 192 ksps from a 24.576/22.2592MHz master
+ * clock input
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/regmap.h>
+#include <linux/delay.h>
+
+#include <sound/tlv.h>
+#include <sound/soc.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/initval.h>
+
+#include "tas5754m.h"
+
+#define TAS5754M_RATES (SNDRV_PCM_RATE_48000 | \
+ SNDRV_PCM_RATE_96000 | \
+ SNDRV_PCM_RATE_192000 | \
+ SNDRV_PCM_RATE_44100 | \
+ SNDRV_PCM_RATE_88200 | \
+ SNDRV_PCM_RATE_176400)
+#define TAS5754M_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+
+static const struct reg_default tas5754m_reg_defaults[] = {
+ { TAS5754M_RESET, 0x00 },
+ { TAS5754M_POWER, 0x00 },
+ { TAS5754M_MUTE, 0x00 },
+ { TAS5754M_DSP, 0x00 },
+ { TAS5754M_PLL_REF, 0x00 },
+ { TAS5754M_DAC_REF, 0x00 },
+ { TAS5754M_DAC_ROUTING, 0x11 },
+ { TAS5754M_DSP_PROGRAM, 0x01 },
+ { TAS5754M_CLKDET, 0x00 },
+ { TAS5754M_AUTO_MUTE, 0x00 },
+ { TAS5754M_ERROR_DETECT, 0x00 },
+ { TAS5754M_DIGITAL_VOLUME_1, 0x00 },
+ { TAS5754M_DIGITAL_VOLUME_2, 0x30 },
+ { TAS5754M_DIGITAL_VOLUME_3, 0x30 },
+ { TAS5754M_DIGITAL_MUTE_1, 0x22 },
+ { TAS5754M_DIGITAL_MUTE_2, 0x00 },
+ { TAS5754M_DIGITAL_MUTE_3, 0x07 },
+ { TAS5754M_OUTPUT_AMPLITUDE, 0x00 },
+ { TAS5754M_ANALOG_GAIN_CTRL, 0x00 },
+ { TAS5754M_UNDERVOLTAGE_PROT, 0x00 },
+ { TAS5754M_ANALOG_MUTE_CTRL, 0x00 },
+ { TAS5754M_ANALOG_GAIN_BOOST, 0x00 },
+ { TAS5754M_VCOM_CTRL_1, 0x00 },
+ { TAS5754M_VCOM_CTRL_2, 0x01 },
+ { TAS5754M_BCLK_LRCLK_CFG, 0x00 },
+ { TAS5754M_MASTER_MODE, 0x7c },
+ { TAS5754M_GPIO_PLLIN, 0x00 },
+ { TAS5754M_SYNCHRONIZE, 0x10 },
+ { TAS5754M_PLL_COEFF_P, 0x00 },
+ { TAS5754M_PLL_COEFF_J, 0x00 },
+ { TAS5754M_PLL_COEFF_DH, 0x00 },
+ { TAS5754M_PLL_COEFF_DL, 0x00 },
+ { TAS5754M_PLL_COEFF_R, 0x00 },
+ { TAS5754M_DSP_CLKDIV, 0x00 },
+ { TAS5754M_DAC_CLKDIV, 0x00 },
+ { TAS5754M_NCP_CLKDIV, 0x00 },
+ { TAS5754M_OSR_CLKDIV, 0x00 },
+ { TAS5754M_MASTER_SCLKDIV, 0x00 },
+ { TAS5754M_MASTER_LRCLKDIV, 0x00 },
+ { TAS5754M_FS_SPEED_MODE, 0x00 },
+ { TAS5754M_IDAC_1, 0x01 },
+ { TAS5754M_IDAC_2, 0x00 },
+};
+
+static bool tas5754m_readable(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case TAS5754M_RESET:
+ case TAS5754M_POWER:
+ case TAS5754M_MUTE:
+ case TAS5754M_PLL_EN:
+ case TAS5754M_DSP:
+ case TAS5754M_GPIO_EN:
+ case TAS5754M_BCLK_LRCLK_CFG:
+ case TAS5754M_DSP_GPIO_INPUT:
+ case TAS5754M_MASTER_MODE:
+ case TAS5754M_PLL_REF:
+ case TAS5754M_DAC_REF:
+ case TAS5754M_GPIO_PLLIN:
+ case TAS5754M_SYNCHRONIZE:
+ case TAS5754M_PLL_COEFF_P:
+ case TAS5754M_PLL_COEFF_J:
+ case TAS5754M_PLL_COEFF_DH:
+ case TAS5754M_PLL_COEFF_DL:
+ case TAS5754M_PLL_COEFF_R:
+ case TAS5754M_DSP_CLKDIV:
+ case TAS5754M_DAC_CLKDIV:
+ case TAS5754M_NCP_CLKDIV:
+ case TAS5754M_OSR_CLKDIV:
+ case TAS5754M_MASTER_SCLKDIV:
+ case TAS5754M_MASTER_LRCLKDIV:
+ case TAS5754M_FS_SPEED_MODE:
+ case TAS5754M_IDAC_1:
+ case TAS5754M_IDAC_2:
+ case TAS5754M_ERROR_DETECT:
+ case TAS5754M_I2S_1:
+ case TAS5754M_I2S_2:
+ case TAS5754M_DAC_ROUTING:
+ case TAS5754M_DSP_PROGRAM:
+ case TAS5754M_CLKDET:
+ case TAS5754M_AUTO_MUTE:
+ case TAS5754M_DIGITAL_VOLUME_1:
+ case TAS5754M_DIGITAL_VOLUME_2:
+ case TAS5754M_DIGITAL_VOLUME_3:
+ case TAS5754M_DIGITAL_MUTE_1:
+ case TAS5754M_DIGITAL_MUTE_2:
+ case TAS5754M_DIGITAL_MUTE_3:
+ case TAS5754M_GPIO_OUTPUT_0:
+ case TAS5754M_GPIO_OUTPUT_1:
+ case TAS5754M_GPIO_OUTPUT_2:
+ case TAS5754M_GPIO_CONTROL_1:
+ case TAS5754M_GPIO_CONTROL_2:
+ case TAS5754M_OVERFLOW:
+ case TAS5754M_RATE_DET_1:
+ case TAS5754M_RATE_DET_2:
+ case TAS5754M_RATE_DET_3:
+ case TAS5754M_RATE_DET_4:
+ case TAS5754M_CLOCK_STATUS:
+ case TAS5754M_ANALOG_MUTE_DET:
+ case TAS5754M_GPIN:
+ case TAS5754M_DIGITAL_MUTE_DET:
+ case TAS5754M_OUTPUT_AMPLITUDE:
+ case TAS5754M_ANALOG_GAIN_CTRL:
+ case TAS5754M_UNDERVOLTAGE_PROT:
+ case TAS5754M_ANALOG_MUTE_CTRL:
+ case TAS5754M_ANALOG_GAIN_BOOST:
+ case TAS5754M_VCOM_CTRL_1:
+ case TAS5754M_VCOM_CTRL_2:
+ case TAS5754M_CRAM_CTRL:
+ case TAS5754M_FLEX_A:
+ case TAS5754M_FLEX_B:
+ return true;
+ default:
+ return reg < 0x7f;
+ }
+}
+
+static bool tas5754m_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case TAS5754M_PLL_EN:
+ case TAS5754M_OVERFLOW:
+ case TAS5754M_RATE_DET_1:
+ case TAS5754M_RATE_DET_2:
+ case TAS5754M_RATE_DET_3:
+ case TAS5754M_RATE_DET_4:
+ case TAS5754M_CLOCK_STATUS:
+ case TAS5754M_ANALOG_MUTE_DET:
+ case TAS5754M_GPIN:
+ case TAS5754M_DIGITAL_MUTE_DET:
+ case TAS5754M_CRAM_CTRL:
+ return true;
+ default:
+ return reg < 0x7f;
+ }
+}
+
+struct tas5754m_priv {
+ struct regmap *regmap;
+ struct clk *sclk;
+ int sample_len;
+ int fmt;
+ int mode;
+};
+
+static const struct regmap_range_cfg tas5754m_range = {
+ .name = "Pages",
+ .range_min = TAS5754M_VIRT_BASE,
+ .range_max = TAS5754M_MAX_REGISTER,
+ .selector_reg = TAS5754M_PAGE,
+ .selector_mask = 0x7f,
+ .window_start = 0,
+ .window_len = 128,
+};
+
+const struct regmap_config tas5754m_regmap = {
+ .reg_bits = 8,
+ .val_bits = 8,
+
+ .ranges = &tas5754m_range,
+ .num_ranges = 1,
+ .max_register = TAS5754M_MAX_REGISTER,
+
+ .reg_defaults = tas5754m_reg_defaults,
+ .num_reg_defaults = ARRAY_SIZE(tas5754m_reg_defaults),
+ .readable_reg = tas5754m_readable,
+ .volatile_reg = tas5754m_volatile,
+
+ .cache_type = REGCACHE_RBTREE,
+};
+
+static const DECLARE_TLV_DB_SCALE(digital_tlv, -10350, 50, 1);
+static const DECLARE_TLV_DB_SCALE(analog_tlv, -600, 600, 0);
+static const DECLARE_TLV_DB_SCALE(boost_tlv, 0, 80, 0);
+
+static const struct snd_kcontrol_new tas5754m_controls[] = {
+SOC_DOUBLE_R_TLV("Digital Playback Volume", TAS5754M_DIGITAL_VOLUME_2,
+ TAS5754M_DIGITAL_VOLUME_3, 0, 255, 1, digital_tlv),
+SOC_DOUBLE_TLV("Analog Playback Volume", TAS5754M_ANALOG_GAIN_CTRL,
+ TAS5754M_LAGN_SHIFT, TAS5754M_RAGN_SHIFT, 1, 1, analog_tlv),
+SOC_DOUBLE_TLV("Analogue Playback Boost Volume", TAS5754M_ANALOG_GAIN_BOOST,
+ TAS5754M_AGBL_SHIFT, TAS5754M_AGBR_SHIFT, 1, 0, boost_tlv),
+};
+
+static int tas5754m_set_bias_level(struct snd_soc_component *component,
+ enum snd_soc_bias_level level)
+{
+ struct tas5754m_priv *tas5754m =
+ snd_soc_component_get_drvdata(component);
+ int ret = 0;
+
+ switch (level) {
+ default:
+ case SND_SOC_BIAS_ON:
+ case SND_SOC_BIAS_PREPARE:
+ break;
+
+ case SND_SOC_BIAS_STANDBY:
+ ret = regmap_update_bits(tas5754m->regmap,
+ TAS5754M_POWER, TAS5754M_RQST, 0);
+ if (ret)
+ dev_err(component->dev,
+ "Failed to remove standby: %d\n", ret);
+ break;
+
+ case SND_SOC_BIAS_OFF:
+ ret = regmap_update_bits(tas5754m->regmap,
+ TAS5754M_POWER, TAS5754M_RQST, TAS5754M_RQST);
+ if (ret)
+ dev_err(component->dev,
+ "Failed to request standby: %d\n", ret);
+ break;
+ }
+
+ return ret;
+}
+
+static int tas5754m_set_clock_tree_master(struct snd_soc_dai *dai,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_component *component = dai->component;
+ struct tas5754m_priv *tas5754m =
+ snd_soc_component_get_drvdata(component);
+ static const struct reg_sequence pll_settings[] = {
+ { TAS5754M_PLL_COEFF_P, 0x01 }, // P=2
+ { TAS5754M_PLL_COEFF_J, 0x08 }, // J=8
+ { TAS5754M_PLL_COEFF_DL, 0x00 }, // D12-8 = 0
+ { TAS5754M_PLL_COEFF_DH, 0x00 }, // D7-0 = 0
+ { TAS5754M_PLL_COEFF_R, 0x00 }, // R=1
+ };
+ int ret;
+
+ /* disable PLL before any clock tree change */
+ ret = regmap_update_bits(tas5754m->regmap, TAS5754M_PLL_EN,
+ TAS5754M_PLLE, 0);
+ if (ret) {
+ dev_err(component->dev, "Failed to disable PLL\n");
+ return ret;
+ }
+ /* set DAC clock source to MCLK */
+ ret = regmap_write(tas5754m->regmap, TAS5754M_DAC_REF, 0x30);
+ if (ret) {
+ dev_err(component->dev, "Failed to set DAC ref\n");
+ return ret;
+ }
+ /* run PLL at fixed ratio to MCLK */
+ ret = regmap_multi_reg_write(tas5754m->regmap, pll_settings,
+ ARRAY_SIZE(pll_settings));
+ if (ret) {
+ dev_err(component->dev, "Failed to set PLL ratio\n");
+ return ret;
+ }
+ /* set DSP divider to 2 => reg 0x01 */
+ ret = regmap_write(tas5754m->regmap, TAS5754M_DSP_CLKDIV, 1);
+ if (ret) {
+ dev_err(component->dev, "Failed to set DSP divider\n");
+ return ret;
+ }
+ /* set DAC divider to 4 => reg 0x03*/
+ ret = regmap_write(tas5754m->regmap, TAS5754M_DAC_CLKDIV, 3);
+ if (ret) {
+ dev_err(component->dev, "Failed to set OSDACR divider\n");
+ return ret;
+ }
+ /* set OSR divider to 1 */
+ ret = regmap_write(tas5754m->regmap, TAS5754M_OSR_CLKDIV, 0);
+ if (ret) {
+ dev_err(component->dev, "Failed to set OSR divider\n");
+ return ret;
+ }
+ /* set CP divider to 4 => reg 0x03*/
+ ret = regmap_write(tas5754m->regmap, TAS5754M_NCP_CLKDIV, 3);
+ if (ret) {
+ dev_err(component->dev, "Failed to set CP divider\n");
+ return ret;
+ }
+ /* finally enable PLL */
+ ret = regmap_update_bits(tas5754m->regmap, TAS5754M_PLL_EN,
+ TAS5754M_PLLE, 1);
+ if (ret) {
+ dev_err(component->dev, "Failed to enable PLL\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int tas5754m_set_dai_mode(struct snd_soc_dai *dai)
+{
+ struct snd_soc_component *component = dai->component;
+ struct tas5754m_priv *tas5754m =
+ snd_soc_component_get_drvdata(component);
+ int fmt = tas5754m->fmt;
+
+ /* only I2S MASTER mode implemented */
+ if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_I2S) {
+ dev_err(component->dev,
+ "DAI format not supported (I2S master only)\n");
+ return -EINVAL;
+ }
+
+ /* TAS5754/6m do not support inverted clocks in MASTER mode */
+ if ((fmt & SND_SOC_DAIFMT_CLOCK_MASK) != SND_SOC_DAIFMT_NB_NF) {
+ dev_err(component->dev, "Inverted clocks not supported\n");
+ return -EINVAL;
+ }
+
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+ case SND_SOC_DAIFMT_CBM_CFM:
+ regmap_update_bits(tas5754m->regmap,
+ TAS5754M_BCLK_LRCLK_CFG,
+ TAS5754M_LRKO | TAS5754M_BCKO,
+ TAS5754M_LRKO | TAS5754M_BCKO);
+ /* reset CLK dividers */
+ regmap_update_bits(tas5754m->regmap,
+ TAS5754M_MASTER_MODE,
+ 0x00,
+ TAS5754M_RLRK | TAS5754M_RBCK);
+ /* ignore all clock error detection but MCLK */
+ regmap_update_bits(tas5754m->regmap,
+ TAS5754M_ERROR_DETECT,
+ TAS5754M_IPLK | TAS5754M_DCAS |
+ TAS5754M_IDCM | TAS5754M_IDSK |
+ TAS5754M_IDBK | TAS5754M_IDFS,
+ TAS5754M_IPLK | TAS5754M_DCAS |
+ TAS5754M_IDCM | TAS5754M_IDSK |
+ TAS5754M_IDBK | TAS5754M_IDFS);
+ break;
+ case SND_SOC_DAIFMT_CBS_CFS:
+ case SND_SOC_DAIFMT_CBM_CFS:
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int tas5754m_set_dividers_master(struct snd_soc_dai *dai,
+ struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_component *component = dai->component;
+ struct tas5754m_priv *tas5754m =
+ snd_soc_component_get_drvdata(component);
+ unsigned long bclk;
+ unsigned long mclk;
+ int bclk_div;
+ int lrclk_div;
+ int osr;
+ int ret;
+
+ /* calculate divider settings based on mclk and sample_len */
+ mclk = clk_get_rate(tas5754m->sclk);
+ bclk = tas5754m->sample_len * 2 * params_rate(params);
+ bclk_div = mclk / bclk;
+ lrclk_div = tas5754m->sample_len * 2;
+ osr = mclk / 4 / params_rate(params) / 16;
+
+ /* stop LR / SCLK clocks */
+ ret = regmap_update_bits(tas5754m->regmap,
+ TAS5754M_MASTER_MODE, 0,
+ TAS5754M_RLRK | TAS5754M_RBCK);
+ if (ret) {
+ dev_err(component->dev, "Failed to stop PLL\n");
+ return ret;
+ }
+ /* set SCLK divider */
+ ret = regmap_write(tas5754m->regmap, TAS5754M_MASTER_SCLKDIV,
+ bclk_div - 1);
+ if (ret) {
+ dev_err(component->dev, "Failed to set SCLK divider\n");
+ return ret;
+ }
+ /* set LRCLK divider */
+ ret = regmap_write(tas5754m->regmap, TAS5754M_MASTER_LRCLKDIV,
+ lrclk_div - 1);
+ if (ret) {
+ dev_err(component->dev, "Failed to set LRCLK divider\n");
+ return ret;
+ }
+ ret = regmap_write(tas5754m->regmap,
+ TAS5754M_OSR_CLKDIV, osr - 1);
+ if (ret) {
+ dev_err(component->dev, "Failed to set OSR divider\n");
+ return ret;
+ }
+ /* restart LR / SCLK clocks */
+ ret = regmap_update_bits(tas5754m->regmap,
+ TAS5754M_MASTER_MODE,
+ TAS5754M_RLRK | TAS5754M_RBCK,
+ TAS5754M_RLRK | TAS5754M_RBCK);
+ if (ret) {
+ dev_err(component->dev, "Failed to restart PLL\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int tas5754m_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct snd_soc_component *component = dai->component;
+ struct tas5754m_priv *tas5754m =
+ snd_soc_component_get_drvdata(component);
+ int alen;
+ int ret;
+
+ switch (params_width(params)) {
+ case 16:
+ tas5754m->sample_len = 16;
+ alen = TAS5754M_ALEN_16;
+ break;
+ case 20:
+ tas5754m->sample_len = 32;
+ alen = TAS5754M_ALEN_20;
+ break;
+ case 24:
+ tas5754m->sample_len = 32;
+ alen = TAS5754M_ALEN_24;
+ break;
+ case 32:
+ tas5754m->sample_len = 32;
+ alen = TAS5754M_ALEN_32;
+ break;
+ default:
+ dev_err(component->dev, "Unsupported sample size: %d\n",
+ params_width(params));
+ return -EINVAL;
+ }
+ ret = regmap_update_bits(tas5754m->regmap, TAS5754M_I2S_1, alen, alen);
+ if (ret) {
+ dev_err(component->dev,
+ "Cannot set sample size: %d\n", ret);
+ return ret;
+ }
+
+ ret = tas5754m_set_dai_mode(dai);
+ if (ret) {
+ dev_err(component->dev,
+ "DAI mode not supported: %d\n", ret);
+ return ret;
+ }
+
+ ret = tas5754m_set_clock_tree_master(dai, params);
+ if (ret)
+ return ret;
+
+ switch (params_rate(params)) {
+ case 44100:
+ case 48000:
+ ret = regmap_write(tas5754m->regmap,
+ TAS5754M_FS_SPEED_MODE, TAS5754M_FSSP_48KHZ);
+ break;
+ case 88200:
+ case 96000:
+ ret = regmap_write(tas5754m->regmap,
+ TAS5754M_FS_SPEED_MODE, TAS5754M_FSSP_96KHZ);
+ break;
+ case 176400:
+ case 192000:
+ ret = regmap_write(tas5754m->regmap,
+ TAS5754M_FS_SPEED_MODE, TAS5754M_FSSP_192KHZ);
+ break;
+ default:
+ dev_err(component->dev, "Sample rate not supported: %d\n",
+ params_rate(params));
+ return -EINVAL;
+ }
+ if (ret) {
+ dev_err(component->dev, "Failed to config PLL\n");
+ return ret;
+ }
+
+ ret = tas5754m_set_dividers_master(dai, params);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int tas5754m_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
+{
+ struct snd_soc_component *component = dai->component;
+ struct tas5754m_priv *tas5754m =
+ snd_soc_component_get_drvdata(component);
+
+ tas5754m->fmt = fmt;
+
+ return 0;
+}
+
+
+static const struct snd_soc_component_driver tas5754m_soc_component = {
+ .set_bias_level = tas5754m_set_bias_level,
+ .idle_bias_on = true,
+ .controls = tas5754m_controls,
+ .num_controls = ARRAY_SIZE(tas5754m_controls),
+};
+
+static int tas5754m_mute(struct snd_soc_dai *dai, int mute, int stream)
+{
+ struct snd_soc_component *component = dai->component;
+
+ if (mute) {
+ snd_soc_component_write(component, TAS5754M_MUTE, 0x11);
+ } else {
+ /* wait for stable operation before unmute */
+ usleep_range(1000, 2000);
+ snd_soc_component_write(component, TAS5754M_MUTE, 0x00);
+ }
+ return 0;
+}
+
+static const struct snd_soc_dai_ops tas5754m_dai_ops = {
+ .mute_stream = tas5754m_mute,
+ .hw_params = tas5754m_hw_params,
+ .set_fmt = tas5754m_set_fmt,
+};
+
+static struct snd_soc_dai_driver tas5754m_dai = {
+ .name = "tas5754m-amplifier",
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = TAS5754M_RATES,
+ .formats = TAS5754M_FORMATS,
+ },
+ .ops = &tas5754m_dai_ops,
+};
+
+static int tas5754m_probe(struct device *dev, struct regmap *regmap)
+{
+ struct tas5754m_priv *tas5754m;
+ int ret;
+
+ tas5754m = devm_kzalloc(dev, sizeof(struct tas5754m_priv), GFP_KERNEL);
+ if (!tas5754m)
+ return -ENOMEM;
+
+ dev_set_drvdata(dev, tas5754m);
+ tas5754m->regmap = regmap;
+
+ ret = regmap_write(regmap, TAS5754M_RESET,
+ TAS5754M_RSTR | TAS5754M_RSTM);
+ if (ret) {
+ dev_err(dev, "Failed to initialize TAS5754M: %d\n", ret);
+ goto err;
+ }
+
+ tas5754m->sclk = devm_clk_get(dev, NULL);
+ if (PTR_ERR(tas5754m->sclk) == -EPROBE_DEFER) {
+ ret = -EPROBE_DEFER;
+ goto err;
+ }
+ if (!IS_ERR(tas5754m->sclk)) {
+ ret = clk_prepare_enable(tas5754m->sclk);
+ if (ret) {
+ dev_err(dev, "Failed to enable SCLK: %d\n", ret);
+ goto err;
+ }
+ }
+
+ ret = devm_snd_soc_register_component(dev,
+ &tas5754m_soc_component, &tas5754m_dai, 1);
+ if (ret) {
+ dev_err(dev, "Failed to register CODEC: %d\n", ret);
+ goto err;
+ }
+
+ return 0;
+
+err:
+ return ret;
+
+}
+
+static int tas5754m_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
+{
+ struct regmap *regmap;
+ struct regmap_config config = tas5754m_regmap;
+
+ /* enable auto-increment mode */
+ config.read_flag_mask = 0x80;
+ config.write_flag_mask = 0x80;
+
+ regmap = devm_regmap_init_i2c(i2c, &config);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+
+ return tas5754m_probe(&i2c->dev, regmap);
+}
+
+static int tas5754m_remove(struct device *dev)
+{
+ snd_soc_unregister_component(dev);
+
+ return 0;
+}
+
+static int tas5754m_i2c_remove(struct i2c_client *i2c)
+{
+ tas5754m_remove(&i2c->dev);
+
+ return 0;
+}
+
+static const struct i2c_device_id tas5754m_i2c_id[] = {
+ { "tas5754m", },
+ { "tas5756m", },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, tas5754m_i2c_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id tas5754m_of_match[] = {
+ { .compatible = "ti,tas5754m", },
+ { .compatible = "ti,tas5756m", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, tas5754m_of_match);
+#endif
+
+static struct i2c_driver tas5754m_i2c_driver = {
+ .probe = tas5754m_i2c_probe,
+ .remove = tas5754m_i2c_remove,
+ .id_table = tas5754m_i2c_id,
+ .driver = {
+ .name = "tas5754m",
+ .of_match_table = of_match_ptr(tas5754m_of_match),
+ },
+};
+
+module_i2c_driver(tas5754m_i2c_driver);
+
+MODULE_AUTHOR("Joerg Schambacher <joerg(a)hifiberry.com>");
+MODULE_DESCRIPTION("TAS5754M Audio Amplifier Driver - Master mode only");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/tas5754m.h b/sound/soc/codecs/tas5754m.h
new file mode 100644
index 000000000000..c6e26dba169f
--- /dev/null
+++ b/sound/soc/codecs/tas5754m.h
@@ -0,0 +1,260 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Driver for the TAS575xM DAC+amplifier combo devices
+ *
+ * Author: (copied from pcm512x.h)
+ * Mark Brown <broonie(a)kernel.org>
+ * Copyright 2014 Linaro Ltd
+ *
+ * Register names adapted and non available
+ * register definitions removed according
+ + to TAS5754M specification
+ * Joerg Schambacher <joerg(a)hifiberry.com>
+ */
+
+#ifndef _SND_SOC_TAS5754M
+#define _SND_SOC_TAS5754M
+
+#include <linux/pm.h>
+#include <linux/regmap.h>
+
+#define TAS5754M_VIRT_BASE 0x000
+#define TAS5754M_PAGE_LEN 0x80
+#define TAS5754M_PAGE_BASE(n) (TAS5754M_VIRT_BASE + (TAS5754M_PAGE_LEN * n))
+
+#define TAS5754M_PAGE 0
+
+#define TAS5754M_RESET (TAS5754M_PAGE_BASE(0) + 1)
+#define TAS5754M_POWER (TAS5754M_PAGE_BASE(0) + 2)
+#define TAS5754M_MUTE (TAS5754M_PAGE_BASE(0) + 3)
+#define TAS5754M_PLL_EN (TAS5754M_PAGE_BASE(0) + 4)
+#define TAS5754M_DSP (TAS5754M_PAGE_BASE(0) + 7)
+#define TAS5754M_GPIO_EN (TAS5754M_PAGE_BASE(0) + 8)
+#define TAS5754M_BCLK_LRCLK_CFG (TAS5754M_PAGE_BASE(0) + 9)
+#define TAS5754M_DSP_GPIO_INPUT (TAS5754M_PAGE_BASE(0) + 10)
+#define TAS5754M_MASTER_MODE (TAS5754M_PAGE_BASE(0) + 12)
+#define TAS5754M_PLL_REF (TAS5754M_PAGE_BASE(0) + 13)
+#define TAS5754M_DAC_REF (TAS5754M_PAGE_BASE(0) + 14)
+#define TAS5754M_GPIO_PLLIN (TAS5754M_PAGE_BASE(0) + 18)
+#define TAS5754M_SYNCHRONIZE (TAS5754M_PAGE_BASE(0) + 19)
+#define TAS5754M_PLL_COEFF_P (TAS5754M_PAGE_BASE(0) + 20)
+#define TAS5754M_PLL_COEFF_J (TAS5754M_PAGE_BASE(0) + 21)
+#define TAS5754M_PLL_COEFF_DH (TAS5754M_PAGE_BASE(0) + 22)
+#define TAS5754M_PLL_COEFF_DL (TAS5754M_PAGE_BASE(0) + 23)
+#define TAS5754M_PLL_COEFF_R (TAS5754M_PAGE_BASE(0) + 24)
+#define TAS5754M_DSP_CLKDIV (TAS5754M_PAGE_BASE(0) + 27)
+#define TAS5754M_DAC_CLKDIV (TAS5754M_PAGE_BASE(0) + 28)
+#define TAS5754M_NCP_CLKDIV (TAS5754M_PAGE_BASE(0) + 29)
+#define TAS5754M_OSR_CLKDIV (TAS5754M_PAGE_BASE(0) + 30)
+#define TAS5754M_MASTER_SCLKDIV (TAS5754M_PAGE_BASE(0) + 32)
+#define TAS5754M_MASTER_LRCLKDIV (TAS5754M_PAGE_BASE(0) + 33)
+#define TAS5754M_FS_SPEED_MODE (TAS5754M_PAGE_BASE(0) + 34)
+#define TAS5754M_IDAC_1 (TAS5754M_PAGE_BASE(0) + 35)
+#define TAS5754M_IDAC_2 (TAS5754M_PAGE_BASE(0) + 36)
+#define TAS5754M_ERROR_DETECT (TAS5754M_PAGE_BASE(0) + 37)
+#define TAS5754M_I2S_1 (TAS5754M_PAGE_BASE(0) + 40)
+#define TAS5754M_I2S_2 (TAS5754M_PAGE_BASE(0) + 41)
+#define TAS5754M_DAC_ROUTING (TAS5754M_PAGE_BASE(0) + 42)
+#define TAS5754M_DSP_PROGRAM (TAS5754M_PAGE_BASE(0) + 43)
+#define TAS5754M_CLKDET (TAS5754M_PAGE_BASE(0) + 44)
+#define TAS5754M_AUTO_MUTE (TAS5754M_PAGE_BASE(0) + 59)
+#define TAS5754M_DIGITAL_VOLUME_1 (TAS5754M_PAGE_BASE(0) + 60)
+#define TAS5754M_DIGITAL_VOLUME_2 (TAS5754M_PAGE_BASE(0) + 61)
+#define TAS5754M_DIGITAL_VOLUME_3 (TAS5754M_PAGE_BASE(0) + 62)
+#define TAS5754M_DIGITAL_MUTE_1 (TAS5754M_PAGE_BASE(0) + 63)
+#define TAS5754M_DIGITAL_MUTE_2 (TAS5754M_PAGE_BASE(0) + 64)
+#define TAS5754M_DIGITAL_MUTE_3 (TAS5754M_PAGE_BASE(0) + 65)
+#define TAS5754M_GPIO_OUTPUT_1 (TAS5754M_PAGE_BASE(0) + 82)
+#define TAS5754M_GPIO_OUTPUT_0 (TAS5754M_PAGE_BASE(0) + 83)
+#define TAS5754M_GPIO_OUTPUT_2 (TAS5754M_PAGE_BASE(0) + 85)
+#define TAS5754M_GPIO_CONTROL_1 (TAS5754M_PAGE_BASE(0) + 86)
+#define TAS5754M_GPIO_CONTROL_2 (TAS5754M_PAGE_BASE(0) + 87)
+#define TAS5754M_OVERFLOW (TAS5754M_PAGE_BASE(0) + 90)
+#define TAS5754M_RATE_DET_1 (TAS5754M_PAGE_BASE(0) + 91)
+#define TAS5754M_RATE_DET_2 (TAS5754M_PAGE_BASE(0) + 92)
+#define TAS5754M_RATE_DET_3 (TAS5754M_PAGE_BASE(0) + 93)
+#define TAS5754M_RATE_DET_4 (TAS5754M_PAGE_BASE(0) + 94)
+#define TAS5754M_CLOCK_STATUS (TAS5754M_PAGE_BASE(0) + 95)
+#define TAS5754M_ANALOG_MUTE_DET (TAS5754M_PAGE_BASE(0) + 108)
+#define TAS5754M_FS_MODE_MON (TAS5754M_PAGE_BASE(0) + 115)
+#define TAS5754M_GPIN (TAS5754M_PAGE_BASE(0) + 119)
+#define TAS5754M_DIGITAL_MUTE_DET (TAS5754M_PAGE_BASE(0) + 120)
+
+#define TAS5754M_OUTPUT_AMPLITUDE (TAS5754M_PAGE_BASE(1) + 1)
+#define TAS5754M_ANALOG_GAIN_CTRL (TAS5754M_PAGE_BASE(1) + 2)
+#define TAS5754M_UNDERVOLTAGE_PROT (TAS5754M_PAGE_BASE(1) + 5)
+#define TAS5754M_ANALOG_MUTE_CTRL (TAS5754M_PAGE_BASE(1) + 6)
+#define TAS5754M_ANALOG_GAIN_BOOST (TAS5754M_PAGE_BASE(1) + 7)
+#define TAS5754M_VCOM_CTRL_1 (TAS5754M_PAGE_BASE(1) + 8)
+#define TAS5754M_VCOM_CTRL_2 (TAS5754M_PAGE_BASE(1) + 9)
+
+#define TAS5754M_CRAM_CTRL (TAS5754M_PAGE_BASE(44) + 1)
+
+#define TAS5754M_FLEX_A (TAS5754M_PAGE_BASE(253) + 63)
+#define TAS5754M_FLEX_B (TAS5754M_PAGE_BASE(253) + 64)
+
+#define TAS5754M_MAX_REGISTER (TAS5754M_PAGE_BASE(253) + 64)
+
+/* Page 0, Register 1 - reset */
+#define TAS5754M_RSTR (1 << 0)
+#define TAS5754M_RSTM (1 << 4)
+
+/* Page 0, Register 2 - power */
+#define TAS5754M_RQPD (1 << 0)
+#define TAS5754M_RQPD_SHIFT 0
+#define TAS5754M_RQST (1 << 4)
+#define TAS5754M_RQST_SHIFT 4
+
+/* Page 0, Register 3 - mute */
+#define TAS5754M_RQMR (1 << 0)
+#define TAS5754M_RQMR_SHIFT 0
+#define TAS5754M_RQML (1 << 4)
+#define TAS5754M_RQML_SHIFT 4
+
+/* Page 0, Register 4 - PLL */
+#define TAS5754M_PLLE (1 << 0)
+#define TAS5754M_PLLE_SHIFT 0
+#define TAS5754M_PLCK (1 << 4)
+#define TAS5754M_PLCK_SHIFT 4
+
+/* Page 0, Register 7 - DSP */
+#define TAS5754M_SDSL (1 << 0)
+#define TAS5754M_SDSL_SHIFT 0
+#define TAS5754M_DEMP (1 << 4)
+#define TAS5754M_DEMP_SHIFT 4
+
+/* Page 0, Register 8 - GPIO output enable */
+#define TAS5754M_G1OE (1 << 0)
+#define TAS5754M_G2OE (1 << 1)
+#define TAS5754M_G3OE (1 << 2)
+#define TAS5754M_G4OE (1 << 3)
+#define TAS5754M_G5OE (1 << 4)
+#define TAS5754M_G6OE (1 << 5)
+
+/* Page 0, Register 9 - BCK, LRCLK configuration */
+#define TAS5754M_LRKO (1 << 0)
+#define TAS5754M_LRKO_SHIFT 0
+#define TAS5754M_BCKO (1 << 4)
+#define TAS5754M_BCKO_SHIFT 4
+#define TAS5754M_BCKP (1 << 5)
+#define TAS5754M_BCKP_SHIFT 5
+
+/* Page 0, Register 12 - Master mode BCK, LRCLK reset */
+#define TAS5754M_RLRK (1 << 0)
+#define TAS5754M_RLRK_SHIFT 0
+#define TAS5754M_RBCK (1 << 1)
+#define TAS5754M_RBCK_SHIFT 1
+
+/* Page 0, Register 13 - PLL reference */
+#define TAS5754M_SREF (7 << 4)
+#define TAS5754M_SREF_SHIFT 4
+#define TAS5754M_SREF_SCK (0 << 4)
+#define TAS5754M_SREF_BCK (1 << 4)
+#define TAS5754M_SREF_GPIO (3 << 4)
+
+/* Page 0, Register 14 - DAC reference */
+#define TAS5754M_SDAC (7 << 4)
+#define TAS5754M_SDAC_SHIFT 4
+#define TAS5754M_SDAC_MCK (0 << 4)
+#define TAS5754M_SDAC_PLL (1 << 4)
+#define TAS5754M_SDAC_SCK (3 << 4)
+#define TAS5754M_SDAC_BCK (4 << 4)
+#define TAS5754M_SDAC_GPIO (5 << 4)
+
+/* Page 0, Register 16, 18 - GPIO source for DAC, PLL */
+#define TAS5754M_GREF (7 << 0)
+#define TAS5754M_GREF_SHIFT 0
+#define TAS5754M_GREF_GPIO1 (0 << 0)
+#define TAS5754M_GREF_GPIO2 (1 << 0)
+#define TAS5754M_GREF_GPIO3 (2 << 0)
+#define TAS5754M_GREF_GPIO4 (3 << 0)
+#define TAS5754M_GREF_GPIO5 (4 << 0)
+#define TAS5754M_GREF_GPIO6 (5 << 0)
+
+/* Page 0, Register 19 - synchronize */
+#define TAS5754M_RQSY (1 << 0)
+#define TAS5754M_RQSY_RESUME (0 << 0)
+#define TAS5754M_RQSY_HALT (1 << 0)
+
+/* Page 0, Register 34 - fs speed mode */
+#define TAS5754M_FSSP (3 << 0)
+#define TAS5754M_FSSP_SHIFT 0
+#define TAS5754M_FSSP_48KHZ (0 << 0)
+#define TAS5754M_FSSP_96KHZ (1 << 0)
+#define TAS5754M_FSSP_192KHZ (2 << 0)
+#define TAS5754M_FSSP_384KHZ (3 << 0)
+
+/* Page 0, Register 37 - Error detection */
+#define TAS5754M_IPLK (1 << 0)
+#define TAS5754M_DCAS (1 << 1)
+#define TAS5754M_IDCM (1 << 2)
+#define TAS5754M_IDCH (1 << 3)
+#define TAS5754M_IDSK (1 << 4)
+#define TAS5754M_IDBK (1 << 5)
+#define TAS5754M_IDFS (1 << 6)
+
+/* Page 0, Register 40 - I2S configuration */
+#define TAS5754M_ALEN (3 << 0)
+#define TAS5754M_ALEN_SHIFT 0
+#define TAS5754M_ALEN_16 (0 << 0)
+#define TAS5754M_ALEN_20 (1 << 0)
+#define TAS5754M_ALEN_24 (2 << 0)
+#define TAS5754M_ALEN_32 (3 << 0)
+#define TAS5754M_AFMT (3 << 4)
+#define TAS5754M_AFMT_SHIFT 4
+#define TAS5754M_AFMT_I2S (0 << 4)
+#define TAS5754M_AFMT_DSP (1 << 4)
+#define TAS5754M_AFMT_RTJ (2 << 4)
+#define TAS5754M_AFMT_LTJ (3 << 4)
+
+/* Page 0, Register 42 - DAC routing */
+#define TAS5754M_AUPR_SHIFT 0
+#define TAS5754M_AUPL_SHIFT 4
+
+/* Page 0, Register 59 - auto mute */
+#define TAS5754M_ATMR_SHIFT 0
+#define TAS5754M_ATML_SHIFT 4
+
+/* Page 0, Register 63 - ramp rates */
+#define TAS5754M_VNDF_SHIFT 6
+#define TAS5754M_VNDS_SHIFT 4
+#define TAS5754M_VNUF_SHIFT 2
+#define TAS5754M_VNUS_SHIFT 0
+
+/* Page 0, Register 64 - emergency ramp rates */
+#define TAS5754M_VEDF_SHIFT 6
+#define TAS5754M_VEDS_SHIFT 4
+
+/* Page 0, Register 65 - Digital mute enables */
+#define TAS5754M_ACTL_SHIFT 2
+#define TAS5754M_AMLE_SHIFT 1
+#define TAS5754M_AMRE_SHIFT 0
+
+/* Page 0, Register 80-85, GPIO output selection */
+#define TAS5754M_GxSL (31 << 0)
+#define TAS5754M_GxSL_SHIFT 0
+#define TAS5754M_GxSL_OFF (0 << 0)
+#define TAS5754M_GxSL_DSP (1 << 0)
+#define TAS5754M_GxSL_REG (2 << 0)
+#define TAS5754M_GxSL_AMUTB (3 << 0)
+#define TAS5754M_GxSL_AMUTL (4 << 0)
+#define TAS5754M_GxSL_AMUTR (5 << 0)
+#define TAS5754M_GxSL_CLKI (6 << 0)
+#define TAS5754M_GxSL_SDOUT (7 << 0)
+#define TAS5754M_GxSL_ANMUL (8 << 0)
+#define TAS5754M_GxSL_ANMUR (9 << 0)
+#define TAS5754M_GxSL_PLLLK (10 << 0)
+#define TAS5754M_GxSL_CPCLK (11 << 0)
+#define TAS5754M_GxSL_UV0_7 (14 << 0)
+#define TAS5754M_GxSL_UV0_3 (15 << 0)
+#define TAS5754M_GxSL_PLLCK (16 << 0)
+
+/* Page 1, Register 2 - analog volume control */
+#define TAS5754M_RAGN_SHIFT 0
+#define TAS5754M_LAGN_SHIFT 4
+
+/* Page 1, Register 7 - analog boost control */
+#define TAS5754M_AGBR_SHIFT 0
+#define TAS5754M_AGBL_SHIFT 4
+
+#endif
--
2.25.1
8 months
[chrome-os:chromeos-5.10 9936/9999] kernel/dma/coiommu.c:406:21: error: 'MAX_PHYSMEM_BITS' undeclared
by kernel test robot
tree: https://chromium.googlesource.com/chromiumos/third_party/kernel chromeos-5.10
head: e95975499c9370e3227f332445708ebb3f70a9e0
commit: 613bf95a43405d9180583f11980360b7e9862376 [9936/9999] CHROMIUM: coiommu: initialize the DMA tracking table
config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20220120/202201202005.cUy94h5h-lk...)
compiler: alpha-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git remote add chrome-os https://chromium.googlesource.com/chromiumos/third_party/kernel
git fetch --no-tags chrome-os chromeos-5.10
git checkout 613bf95a43405d9180583f11980360b7e9862376
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=alpha SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
kernel/dma/coiommu.c: In function 'get_dtt_level':
>> kernel/dma/coiommu.c:406:21: error: 'MAX_PHYSMEM_BITS' undeclared (first use in this function)
406 | pfn_width = MAX_PHYSMEM_BITS - PAGE_SHIFT;
| ^~~~~~~~~~~~~~~~
kernel/dma/coiommu.c:406:21: note: each undeclared identifier is reported only once for each function it appears in
At top level:
kernel/dma/coiommu.c:381:33: warning: 'coiommu_ops' defined but not used [-Wunused-const-variable=]
381 | static const struct dma_map_ops coiommu_ops = {
| ^~~~~~~~~~~
Kconfig warnings: (for reference only)
WARNING: unmet direct dependencies detected for SND_AMD_ACP_CONFIG
Depends on SOUND && !UML && SND && SND_SOC && SND_SOC_ACPI
Selected by
- SND_SOC_SOF_AMD_COMMON && SOUND && !UML && SND && SND_SOC && SND_SOC_SOF_TOPLEVEL && SND_SOC_SOF_AMD_TOPLEVEL
vim +/MAX_PHYSMEM_BITS +406 kernel/dma/coiommu.c
401
402 static inline unsigned int get_dtt_level(void)
403 {
404 unsigned int pfn_width;
405
> 406 pfn_width = MAX_PHYSMEM_BITS - PAGE_SHIFT;
407
408 if (pfn_width <= COIOMMU_PT_LEVEL_STRIDE)
409 return 1;
410
411 return DIV_ROUND_UP((pfn_width - COIOMMU_PT_LEVEL_STRIDE),
412 COIOMMU_UPPER_LEVEL_STRIDE) + 1;
413 }
414
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months
Re: [Intel-gfx] [PATCH 5/6] drm/i915: Move GT registers to their own header file
by kernel test robot
Hi Matt,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next v5.16 next-20220120]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Matt-Roper/Second-round-of-i915_...
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-allmodconfig (https://download.01.org/0day-ci/archive/20220120/202201201838.YQUqtmJI-lk...)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f7b7138a62648f4019c55e4671682af1f851f295)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/d7a6d230bd959372cab764baec5407256...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Matt-Roper/Second-round-of-i915_reg-h-splitting/20220120-144038
git checkout d7a6d230bd959372cab764baec5407256725e48b
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/pxp/intel_pxp_irq.c:51:29: error: use of undeclared identifier 'GEN11_CRYPTO_RSVD_INTR_ENABLE'
intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, mask);
^
>> drivers/gpu/drm/i915/pxp/intel_pxp_irq.c:52:29: error: use of undeclared identifier 'GEN11_CRYPTO_RSVD_INTR_MASK'
intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK, ~mask);
^
>> drivers/gpu/drm/i915/pxp/intel_pxp_irq.c:58:32: error: use of undeclared identifier 'GEN11_KCR'
gen11_gt_reset_one_iir(gt, 0, GEN11_KCR);
^
drivers/gpu/drm/i915/pxp/intel_pxp_irq.c:69:46: error: use of undeclared identifier 'GEN11_KCR'
WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_KCR));
^
4 errors generated.
vim +/GEN11_CRYPTO_RSVD_INTR_ENABLE +51 drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
2ae096872a2c61 Huang, Sean Z 2021-09-24 45
2ae096872a2c61 Huang, Sean Z 2021-09-24 46 static inline void __pxp_set_interrupts(struct intel_gt *gt, u32 interrupts)
2ae096872a2c61 Huang, Sean Z 2021-09-24 47 {
2ae096872a2c61 Huang, Sean Z 2021-09-24 48 struct intel_uncore *uncore = gt->uncore;
2ae096872a2c61 Huang, Sean Z 2021-09-24 49 const u32 mask = interrupts << 16;
2ae096872a2c61 Huang, Sean Z 2021-09-24 50
2ae096872a2c61 Huang, Sean Z 2021-09-24 @51 intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_ENABLE, mask);
2ae096872a2c61 Huang, Sean Z 2021-09-24 @52 intel_uncore_write(uncore, GEN11_CRYPTO_RSVD_INTR_MASK, ~mask);
2ae096872a2c61 Huang, Sean Z 2021-09-24 53 }
2ae096872a2c61 Huang, Sean Z 2021-09-24 54
2ae096872a2c61 Huang, Sean Z 2021-09-24 55 static inline void pxp_irq_reset(struct intel_gt *gt)
2ae096872a2c61 Huang, Sean Z 2021-09-24 56 {
2ae096872a2c61 Huang, Sean Z 2021-09-24 57 spin_lock_irq(>->irq_lock);
2ae096872a2c61 Huang, Sean Z 2021-09-24 @58 gen11_gt_reset_one_iir(gt, 0, GEN11_KCR);
2ae096872a2c61 Huang, Sean Z 2021-09-24 59 spin_unlock_irq(>->irq_lock);
2ae096872a2c61 Huang, Sean Z 2021-09-24 60 }
2ae096872a2c61 Huang, Sean Z 2021-09-24 61
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months
Re: [wpan-next 5/9] net: ieee802154: ca8210: Stop leaking skb's
by kernel test robot
Hi Miquel,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.16 next-20220120]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Miquel-Raynal/ieee802154-A-bunch...
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 1d1df41c5a33359a00e919d54eaebfb789711fdc
config: i386-randconfig-a013 (https://download.01.org/0day-ci/archive/20220120/202201201557.38baVRVX-lk...)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f7b7138a62648f4019c55e4671682af1f851f295)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/77d3026b30aff560ef269d03aecc09f8c...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Miquel-Raynal/ieee802154-A-bunch-of-fixes/20220120-083906
git checkout 77d3026b30aff560ef269d03aecc09f8c46a9173
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/net/ieee802154/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
>> drivers/net/ieee802154/ca8210.c:1775:22: error: use of undeclared identifier 'atusb'
dev_kfree_skb_any(atusb->tx_skb);
^
1 error generated.
vim +/atusb +1775 drivers/net/ieee802154/ca8210.c
1737
1738 /**
1739 * ca8210_async_xmit_complete() - Called to announce that an asynchronous
1740 * transmission has finished
1741 * @hw: ieee802154_hw of ca8210 that has finished exchange
1742 * @msduhandle: Identifier of transmission that has completed
1743 * @status: Returned 802.15.4 status code of the transmission
1744 *
1745 * Return: 0 or linux error code
1746 */
1747 static int ca8210_async_xmit_complete(
1748 struct ieee802154_hw *hw,
1749 u8 msduhandle,
1750 u8 status)
1751 {
1752 struct ca8210_priv *priv = hw->priv;
1753
1754 if (priv->nextmsduhandle != msduhandle) {
1755 dev_err(
1756 &priv->spi->dev,
1757 "Unexpected msdu_handle on data confirm, Expected %d, got %d\n",
1758 priv->nextmsduhandle,
1759 msduhandle
1760 );
1761 return -EIO;
1762 }
1763
1764 priv->async_tx_pending = false;
1765 priv->nextmsduhandle++;
1766
1767 if (status) {
1768 dev_err(
1769 &priv->spi->dev,
1770 "Link transmission unsuccessful, status = %d\n",
1771 status
1772 );
1773 if (status != MAC_TRANSACTION_OVERFLOW) {
1774 ieee802154_wake_queue(priv->hw);
> 1775 dev_kfree_skb_any(atusb->tx_skb);
1776 return 0;
1777 }
1778 }
1779 ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);
1780
1781 return 0;
1782 }
1783
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months
drivers/dma-buf/heaps/system_heap.c:357:24: sparse: sparse: incorrect type in return expression (different base types)
by kernel test robot
tree: https://github.com/0day-ci/linux/commits/UPDATE-20220120-113516/guangming...
head: d6d3f09d899553b1100b195a91a8f718d1bd6bc2
commit: d6d3f09d899553b1100b195a91a8f718d1bd6bc2 dma-buf: system_heap: Add a size check for allocation
date: 6 hours ago
config: sh-randconfig-s031-20220117 (https://download.01.org/0day-ci/archive/20220120/202201201703.UusZsskM-lk...)
compiler: sh4-linux-gcc (GCC) 11.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.4-dirty
# https://github.com/0day-ci/linux/commit/d6d3f09d899553b1100b195a91a8f718d...
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review UPDATE-20220120-113516/guangming-cao-mediatek-com/dma-buf-dma-heap-Add-a-size-limitation-for-allocation/20211217-174135
git checkout d6d3f09d899553b1100b195a91a8f718d1bd6bc2
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=sh SHELL=/bin/bash drivers/dma-buf/heaps/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/dma-buf/heaps/system_heap.c:357:24: sparse: sparse: incorrect type in return expression (different base types) @@ expected struct dma_buf * @@ got int @@
drivers/dma-buf/heaps/system_heap.c:357:24: sparse: expected struct dma_buf *
drivers/dma-buf/heaps/system_heap.c:357:24: sparse: got int
vim +357 drivers/dma-buf/heaps/system_heap.c
334
335 static struct dma_buf *system_heap_allocate(struct dma_heap *heap,
336 unsigned long len,
337 unsigned long fd_flags,
338 unsigned long heap_flags)
339 {
340 struct system_heap_buffer *buffer;
341 DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
342 unsigned long size_remaining = len;
343 unsigned int max_order = orders[0];
344 struct dma_buf *dmabuf;
345 struct sg_table *table;
346 struct scatterlist *sg;
347 struct list_head pages;
348 struct page *page, *tmp_page;
349 int i, ret = -ENOMEM;
350
351 /*
352 * Size check. The "len" should be less than totalram since system_heap
353 * memory is comes from system. Adding check here can prevent consuming
354 * too much time for invalid allocations.
355 */
356 if (len >> PAGE_SHIFT > totalram_pages())
> 357 return -EINVAL;
358 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
359 if (!buffer)
360 return ERR_PTR(-ENOMEM);
361
362 INIT_LIST_HEAD(&buffer->attachments);
363 mutex_init(&buffer->lock);
364 buffer->heap = heap;
365 buffer->len = len;
366
367 INIT_LIST_HEAD(&pages);
368 i = 0;
369 while (size_remaining > 0) {
370 /*
371 * Avoid trying to allocate memory if the process
372 * has been killed by SIGKILL
373 */
374 if (fatal_signal_pending(current)) {
375 ret = -EINTR;
376 goto free_buffer;
377 }
378
379 page = alloc_largest_available(size_remaining, max_order);
380 if (!page)
381 goto free_buffer;
382
383 list_add_tail(&page->lru, &pages);
384 size_remaining -= page_size(page);
385 max_order = compound_order(page);
386 i++;
387 }
388
389 table = &buffer->sg_table;
390 if (sg_alloc_table(table, i, GFP_KERNEL))
391 goto free_buffer;
392
393 sg = table->sgl;
394 list_for_each_entry_safe(page, tmp_page, &pages, lru) {
395 sg_set_page(sg, page, page_size(page), 0);
396 sg = sg_next(sg);
397 list_del(&page->lru);
398 }
399
400 /* create the dmabuf */
401 exp_info.exp_name = dma_heap_get_name(heap);
402 exp_info.ops = &system_heap_buf_ops;
403 exp_info.size = buffer->len;
404 exp_info.flags = fd_flags;
405 exp_info.priv = buffer;
406 dmabuf = dma_buf_export(&exp_info);
407 if (IS_ERR(dmabuf)) {
408 ret = PTR_ERR(dmabuf);
409 goto free_pages;
410 }
411 return dmabuf;
412
413 free_pages:
414 for_each_sgtable_sg(table, sg, i) {
415 struct page *p = sg_page(sg);
416
417 __free_pages(p, compound_order(p));
418 }
419 sg_free_table(table);
420 free_buffer:
421 list_for_each_entry_safe(page, tmp_page, &pages, lru)
422 __free_pages(page, compound_order(page));
423 kfree(buffer);
424
425 return ERR_PTR(ret);
426 }
427
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0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
8 months