[kbuild-all] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c:765 dcn30_apply_idle_power_optimizations() error: we previously assumed 'stream' could be null (see line 749)

Friday, 17 December 2021


tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   2b14864acbaaf03d9c01982e243a84632524c3ac
commit: ea7154d8d9fb26129f51e4d763febe97a13228a5 drm/amd/display: Update
dcn30_apply_idle_power_optimizations() code
config: x86_64-randconfig-m001-20211207
(https://download.01.org/0day-ci/archive/20211216/202112161717.aP6FA32v-lk...)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com&gt;
Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com&gt;

New smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c:765
dcn30_apply_idle_power_optimizations() error: we previously assumed 'stream' could
be null (see line 749)
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c:767
dcn30_apply_idle_power_optimizations() error: we previously assumed 'plane' could
be null (see line 749)

Old smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c:483 dcn30_init_hw() warn:
variable dereferenced before check 'res_pool->dccg' (see line 435)
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c:636 dcn30_init_hw() error: we
previously assumed 'dc->clk_mgr' could be null (see line 431)

vim +/stream +765 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c

d99f13878d6f9c Bhawanpreet Lakha 2020-05-21  710  bool
dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)
d99f13878d6f9c Bhawanpreet Lakha 2020-05-21  711  {
52f2e83e2fe559 Bhawanpreet Lakha 2020-05-29  712  	union dmub_rb_cmd cmd;
52f2e83e2fe559 Bhawanpreet Lakha 2020-05-29  713  	uint32_t tmr_delay = 0, tmr_scale = 0;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  714  	struct dc_cursor_attributes
cursor_attr;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  715  	bool cursor_cache_enable = false;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  716  	struct dc_stream_state *stream = NULL;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  717  	struct dc_plane_state *plane = NULL;
52f2e83e2fe559 Bhawanpreet Lakha 2020-05-29  718  
d99f13878d6f9c Bhawanpreet Lakha 2020-05-21  719  	if (!dc->ctx->dmub_srv)
d99f13878d6f9c Bhawanpreet Lakha 2020-05-21  720  		return false;
d99f13878d6f9c Bhawanpreet Lakha 2020-05-21  721  
d99f13878d6f9c Bhawanpreet Lakha 2020-05-21  722  	if (enable) {
48e48e59847821 Zhan Liu          2020-08-28  723  		if (dc->current_state) {
48e48e59847821 Zhan Liu          2020-08-28  724  			int i;
48e48e59847821 Zhan Liu          2020-08-28  725  
48e48e59847821 Zhan Liu          2020-08-28  726  			/* First, check no-memory-requests
case */
48e48e59847821 Zhan Liu          2020-08-28  727  			for (i = 0; i <
dc->current_state->stream_count; i++) {
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  728  				if
(dc->current_state->stream_status[i].plane_count)
48e48e59847821 Zhan Liu          2020-08-28  729  					/* Fail eligibility on a visible
stream */
48e48e59847821 Zhan Liu          2020-08-28  730  					break;
48e48e59847821 Zhan Liu          2020-08-28  731  			}
52f2e83e2fe559 Bhawanpreet Lakha 2020-05-29  732  
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  733  			if (i ==
dc->current_state->stream_count) {
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  734  				/* Enable no-memory-requests case
*/
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  735  				memset(&cmd, 0, sizeof(cmd));
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  736  				cmd.mall.header.type =
DMUB_CMD__MALL;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  737  				cmd.mall.header.sub_type =
DMUB_CMD__MALL_ACTION_NO_DF_REQ;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  738  				cmd.mall.header.payload_bytes =
sizeof(cmd.mall) - sizeof(cmd.mall.header);
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  739  
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  740 
				dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd);
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  741 
				dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv);
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  742  
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  743  				return true;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  744  			}
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  745  
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  746  			stream =
dc->current_state->streams[0];
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  747  			plane = (stream ?
dc->current_state->stream_status[0].plane_states[0] : NULL);
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  748  
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19 @749  			if (stream && plane) {
                                                                           
^^^^^^^^^^^^^^^
Checks for NULL

ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  750  				cursor_cache_enable =
stream->cursor_position.enable &&
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  751 
						plane->address.grph.cursor_cache_addr.quad_part;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  752  				cursor_attr =
stream->cursor_attributes;
a87a9a73d0e283 Alex Deucher      2020-10-26  753  			}
a87a9a73d0e283 Alex Deucher      2020-10-26  754  
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  755  			/*
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  756  			 * Second, check MALL eligibility
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  757  			 *
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  758  			 * single display only, single
surface only, 8 and 16 bit formats only, no VM,
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  759  			 * do not use MALL for displays that
support PSR as they use D0i3.2 in DMCUB FW
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  760  			 *
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  761  			 * TODO: When we implement
multi-display, PSR displays will be allowed if there is
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  762  			 * a non-PSR display present, since
in that case we can't do D0i3.2
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  763  			 */
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  764  			if
(dc->current_state->stream_count == 1 &&
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19 @765 
					stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED
&&
                                                                                       
^^^^^^^^
Unchecked dereferences.

ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  766 
					dc->current_state->stream_status[0].plane_count == 1 &&
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19 @767  					plane->format <=
SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F &&
                                                                                       
^^^^^^^^^^^^^

ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  768  					plane->format >=
SURFACE_PIXEL_FORMAT_GRPH_ARGB8888 &&
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  769 
					plane->address.page_table_base.quad_part == 0 &&
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  770  					dc->hwss.does_plane_fit_in_mall
&&
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  771 
					dc->hwss.does_plane_fit_in_mall(dc, plane,
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  772  							cursor_cache_enable ?
&cursor_attr : NULL)) {
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  773  				unsigned int v_total =
stream->adjust.v_total_max ?
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  774  						stream->adjust.v_total_max :
stream->timing.v_total;
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  775  				unsigned int refresh_hz = (unsigned
long long) stream->timing.pix_clk_100hz *
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  776  						100LL /	(v_total *
stream->timing.h_total);
52f2e83e2fe559 Bhawanpreet Lakha 2020-05-29  777  
52f2e83e2fe559 Bhawanpreet Lakha 2020-05-29  778  				/*
ea7154d8d9fb26 Bhawanpreet Lakha 2021-01-19  779  				 * one frame time in microsec:

---
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[kbuild-all] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.c:765 dcn30_apply_idle_power_optimizations() error: we previously assumed 'stream' could be null (see line 749)