4:32 p.m.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: fb57b1fabcb28f358901b2df90abd2b48abc1ca8
commit: e47616df008b1059c57892fb34883403a6933231 [10248/10701] drm/msm/dpu: add support
for color processing blocks in dpu driver
config: arm-randconfig-r013-20200519 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout e47616df008b1059c57892fb34883403a6933231
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: In function
'dpu_encoder_virt_mode_set':
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:968:31: warning:
variable 'num_dspp' set but not used [-Wunused-but-set-variable]
968 | int
num_lm, num_ctl, num_pp, num_dspp;
| ^~~~~~~~
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c:963:30: warning: variable 'topology'
set but not used [-Wunused-but-set-variable]
963 | struct msm_display_topology topology;
| ^~~~~~~~
vim +/num_dspp +968 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
950
951 static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
952 struct drm_display_mode *mode,
953 struct drm_display_mode *adj_mode)
954 {
955 struct dpu_encoder_virt *dpu_enc;
956 struct msm_drm_private *priv;
957 struct dpu_kms *dpu_kms;
958 struct list_head *connector_list;
959 struct drm_connector *conn = NULL, *conn_iter;
960 struct drm_crtc *drm_crtc;
961 struct dpu_crtc_state *cstate;
962 struct dpu_global_state *global_state;
963 struct msm_display_topology topology;
964 struct dpu_hw_blk *hw_pp[MAX_CHANNELS_PER_ENC];
965 struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
966 struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC];
967 struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL };
968 int num_lm, num_ctl, num_pp, num_dspp;
969 int i, j;
970
971 if (!drm_enc) {
972 DPU_ERROR("invalid encoder\n");
973 return;
974 }
975
976 dpu_enc = to_dpu_encoder_virt(drm_enc);
977 DPU_DEBUG_ENC(dpu_enc, "\n");
978
979 priv = drm_enc->dev->dev_private;
980 dpu_kms = to_dpu_kms(priv->kms);
981 connector_list = &dpu_kms->dev->mode_config.connector_list;
982
983 global_state = dpu_kms_get_existing_global_state(dpu_kms);
984 if (IS_ERR_OR_NULL(global_state)) {
985 DPU_ERROR("Failed to get global state");
986 return;
987 }
988
989 trace_dpu_enc_mode_set(DRMID(drm_enc));
990
991 list_for_each_entry(conn_iter, connector_list, head)
992 if (conn_iter->encoder == drm_enc)
993 conn = conn_iter;
994
995 if (!conn) {
996 DPU_ERROR_ENC(dpu_enc, "failed to find attached connector\n");
997 return;
998 } else if (!conn->state) {
999 DPU_ERROR_ENC(dpu_enc, "invalid connector state\n");
1000 return;
1001 }
1002
1003 drm_for_each_crtc(drm_crtc, drm_enc->dev)
1004 if (drm_crtc->state->encoder_mask & drm_encoder_mask(drm_enc))
1005 break;
1006
1007 topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode);
1008
1009 /* Query resource that have been reserved in atomic check step. */
1010 num_pp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
1011 drm_enc->base.id, DPU_HW_BLK_PINGPONG, hw_pp,
1012 ARRAY_SIZE(hw_pp));
1013 num_ctl = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
1014 drm_enc->base.id, DPU_HW_BLK_CTL, hw_ctl, ARRAY_SIZE(hw_ctl));
1015 num_lm = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
1016 drm_enc->base.id, DPU_HW_BLK_LM, hw_lm, ARRAY_SIZE(hw_lm));
1017 num_dspp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state,
1018 drm_enc->base.id, DPU_HW_BLK_DSPP, hw_dspp,
1019 ARRAY_SIZE(hw_dspp));
1020
1021 for (i = 0; i < MAX_CHANNELS_PER_ENC; i++)
1022 dpu_enc->hw_pp[i] = i < num_pp ? to_dpu_hw_pingpong(hw_pp[i])
1023 : NULL;
1024
1025 cstate = to_dpu_crtc_state(drm_crtc->state);
1026
1027 for (i = 0; i < num_lm; i++) {
1028 int ctl_idx = (i < num_ctl) ? i : (num_ctl-1);
1029
1030 cstate->mixers[i].hw_lm = to_dpu_hw_mixer(hw_lm[i]);
1031 cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]);
1032 cstate->mixers[i].hw_dspp = to_dpu_hw_dspp(hw_dspp[i]);
1033 }
1034
1035 cstate->num_mixers = num_lm;
1036
1037 for (i = 0; i < dpu_enc->num_phys_encs; i++) {
1038 int num_blk;
1039 struct dpu_hw_blk *hw_blk[MAX_CHANNELS_PER_ENC];
1040 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
1041
1042 if (!dpu_enc->hw_pp[i]) {
1043 DPU_ERROR_ENC(dpu_enc,
1044 "no pp block assigned at idx: %d\n", i);
1045 return;
1046 }
1047
1048 if (!hw_ctl[i]) {
1049 DPU_ERROR_ENC(dpu_enc,
1050 "no ctl block assigned at idx: %d\n", i);
1051 return;
1052 }
1053
1054 phys->hw_pp = dpu_enc->hw_pp[i];
1055 phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]);
1056
1057 num_blk = dpu_rm_get_assigned_resources(&dpu_kms->rm,
1058 global_state, drm_enc->base.id, DPU_HW_BLK_INTF,
1059 hw_blk, ARRAY_SIZE(hw_blk));
1060 for (j = 0; j < num_blk; j++) {
1061 struct dpu_hw_intf *hw_intf;
1062
1063 hw_intf = to_dpu_hw_intf(hw_blk[i]);
1064 if (hw_intf->idx == phys->intf_idx)
1065 phys->hw_intf = hw_intf;
1066 }
1067
1068 if (!phys->hw_intf) {
1069 DPU_ERROR_ENC(dpu_enc,
1070 "no intf block assigned at idx: %d\n", i);
1071 return;
1072 }
1073
1074 phys->connector = conn->state->connector;
1075 if (phys->ops.mode_set)
1076 phys->ops.mode_set(phys, mode, adj_mode);
1077 }
1078 }
1079
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0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org