[kbuild-all] drivers/irqchip/irq-ath79-misc.c:36:36: sparse: sparse: incorrect type in initializer (different address spaces)

tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 06a4ec1d9dc652e17ee3ac2ceb6c7cf6c2b75cdd commit: 670d0a4b10704667765f7d18f7592993d02783aa sparse: use identifiers to define address spaces date: 9 weeks ago config: mips-randconfig-s032-20200818 (attached as .config) compiler: mips-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.2-180-g49f7e13a-dirty git checkout 670d0a4b10704667765f7d18f7592993d02783aa # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; sparse warnings: (new ones prefixed by >>) drivers/irqchip/irq-ath79-misc.c:36:36: sparse: got void *host_data drivers/irqchip/irq-ath79-misc.c:62:56: sparse: expected void [noderef] __iomem *base drivers/irqchip/irq-ath79-misc.c:62:56: sparse: got void * drivers/irqchip/irq-ath79-misc.c:75:56: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void [noderef] __iomem *base @@ got void * @@ drivers/irqchip/irq-ath79-misc.c:75:56: sparse: expected void [noderef] __iomem *base drivers/irqchip/irq-ath79-misc.c:75:56: sparse: got void * drivers/irqchip/irq-ath79-misc.c:88:56: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void [noderef] __iomem *base @@ got void * @@ drivers/irqchip/irq-ath79-misc.c:88:56: sparse: expected void [noderef] __iomem *base drivers/irqchip/irq-ath79-misc.c:88:56: sparse: got void * drivers/irqchip/irq-ath79-misc.c:120:36: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void [noderef] __iomem *base @@ got void *host_data @@ drivers/irqchip/irq-ath79-misc.c:120:36: sparse: expected void [noderef] __iomem *base drivers/irqchip/irq-ath79-misc.c:120:36: sparse: got void *host_data drivers/irqchip/irq-ath79-misc.c:151:55: sparse: expected void *host_data drivers/irqchip/irq-ath79-misc.c:192:60: sparse: expected void *host_data drivers/irqchip/irq-ath79-misc.c:181:13: sparse: sparse: symbol 'ath79_misc_irq_init' was not declared. Should it be static? -- drivers/watchdog/ath79_wdt.c:161:37: sparse: got char const * drivers/watchdog/ath79_wdt.c:235:27: sparse: sparse: incorrect type in initializer (incompatible argument 2 (different address spaces)) @@ expected int ( *write )( ... ) @@ got int ( * )( ... ) @@ drivers/watchdog/ath79_wdt.c:235:27: sparse: expected int ( *write )( ... ) drivers/watchdog/ath79_wdt.c:235:27: sparse: got int ( * )( ... ) # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit... git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout 670d0a4b10704667765f7d18f7592993d02783aa vim +36 drivers/irqchip/irq-ath79-misc.c 07ba4b061a79896 Alban Bedel 2016-01-23 31 07ba4b061a79896 Alban Bedel 2016-01-23 32 static void ath79_misc_irq_handler(struct irq_desc *desc) 07ba4b061a79896 Alban Bedel 2016-01-23 33 { 07ba4b061a79896 Alban Bedel 2016-01-23 34 struct irq_domain *domain = irq_desc_get_handler_data(desc); 07ba4b061a79896 Alban Bedel 2016-01-23 35 struct irq_chip *chip = irq_desc_get_chip(desc); 07ba4b061a79896 Alban Bedel 2016-01-23 @36 void __iomem *base = domain->host_data; 07ba4b061a79896 Alban Bedel 2016-01-23 37 u32 pending; 07ba4b061a79896 Alban Bedel 2016-01-23 38 07ba4b061a79896 Alban Bedel 2016-01-23 39 chained_irq_enter(chip, desc); 07ba4b061a79896 Alban Bedel 2016-01-23 40 07ba4b061a79896 Alban Bedel 2016-01-23 41 pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) & 07ba4b061a79896 Alban Bedel 2016-01-23 42 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 43 07ba4b061a79896 Alban Bedel 2016-01-23 44 if (!pending) { 07ba4b061a79896 Alban Bedel 2016-01-23 45 spurious_interrupt(); 07ba4b061a79896 Alban Bedel 2016-01-23 46 chained_irq_exit(chip, desc); 07ba4b061a79896 Alban Bedel 2016-01-23 47 return; 07ba4b061a79896 Alban Bedel 2016-01-23 48 } 07ba4b061a79896 Alban Bedel 2016-01-23 49 07ba4b061a79896 Alban Bedel 2016-01-23 50 while (pending) { 07ba4b061a79896 Alban Bedel 2016-01-23 51 int bit = __ffs(pending); 07ba4b061a79896 Alban Bedel 2016-01-23 52 07ba4b061a79896 Alban Bedel 2016-01-23 53 generic_handle_irq(irq_linear_revmap(domain, bit)); 07ba4b061a79896 Alban Bedel 2016-01-23 54 pending &= ~BIT(bit); 07ba4b061a79896 Alban Bedel 2016-01-23 55 } 07ba4b061a79896 Alban Bedel 2016-01-23 56 07ba4b061a79896 Alban Bedel 2016-01-23 57 chained_irq_exit(chip, desc); 07ba4b061a79896 Alban Bedel 2016-01-23 58 } 07ba4b061a79896 Alban Bedel 2016-01-23 59 07ba4b061a79896 Alban Bedel 2016-01-23 60 static void ar71xx_misc_irq_unmask(struct irq_data *d) 07ba4b061a79896 Alban Bedel 2016-01-23 61 { 07ba4b061a79896 Alban Bedel 2016-01-23 @62 void __iomem *base = irq_data_get_irq_chip_data(d); 07ba4b061a79896 Alban Bedel 2016-01-23 63 unsigned int irq = d->hwirq; 07ba4b061a79896 Alban Bedel 2016-01-23 64 u32 t; 07ba4b061a79896 Alban Bedel 2016-01-23 65 07ba4b061a79896 Alban Bedel 2016-01-23 66 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 67 __raw_writel(t | BIT(irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 68 07ba4b061a79896 Alban Bedel 2016-01-23 69 /* flush write */ 07ba4b061a79896 Alban Bedel 2016-01-23 70 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 71 } 07ba4b061a79896 Alban Bedel 2016-01-23 72 07ba4b061a79896 Alban Bedel 2016-01-23 73 static void ar71xx_misc_irq_mask(struct irq_data *d) 07ba4b061a79896 Alban Bedel 2016-01-23 74 { 07ba4b061a79896 Alban Bedel 2016-01-23 75 void __iomem *base = irq_data_get_irq_chip_data(d); 07ba4b061a79896 Alban Bedel 2016-01-23 76 unsigned int irq = d->hwirq; 07ba4b061a79896 Alban Bedel 2016-01-23 77 u32 t; 07ba4b061a79896 Alban Bedel 2016-01-23 78 07ba4b061a79896 Alban Bedel 2016-01-23 79 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 80 __raw_writel(t & ~BIT(irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 81 07ba4b061a79896 Alban Bedel 2016-01-23 82 /* flush write */ 07ba4b061a79896 Alban Bedel 2016-01-23 83 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 84 } 07ba4b061a79896 Alban Bedel 2016-01-23 85 07ba4b061a79896 Alban Bedel 2016-01-23 86 static void ar724x_misc_irq_ack(struct irq_data *d) 07ba4b061a79896 Alban Bedel 2016-01-23 87 { 07ba4b061a79896 Alban Bedel 2016-01-23 88 void __iomem *base = irq_data_get_irq_chip_data(d); 07ba4b061a79896 Alban Bedel 2016-01-23 89 unsigned int irq = d->hwirq; 07ba4b061a79896 Alban Bedel 2016-01-23 90 u32 t; 07ba4b061a79896 Alban Bedel 2016-01-23 91 07ba4b061a79896 Alban Bedel 2016-01-23 92 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); 07ba4b061a79896 Alban Bedel 2016-01-23 93 __raw_writel(t & ~BIT(irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); 07ba4b061a79896 Alban Bedel 2016-01-23 94 07ba4b061a79896 Alban Bedel 2016-01-23 95 /* flush write */ 07ba4b061a79896 Alban Bedel 2016-01-23 96 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); 07ba4b061a79896 Alban Bedel 2016-01-23 97 } 07ba4b061a79896 Alban Bedel 2016-01-23 98 07ba4b061a79896 Alban Bedel 2016-01-23 99 static struct irq_chip ath79_misc_irq_chip = { 07ba4b061a79896 Alban Bedel 2016-01-23 100 .name = "MISC", 07ba4b061a79896 Alban Bedel 2016-01-23 101 .irq_unmask = ar71xx_misc_irq_unmask, 07ba4b061a79896 Alban Bedel 2016-01-23 102 .irq_mask = ar71xx_misc_irq_mask, 07ba4b061a79896 Alban Bedel 2016-01-23 103 }; 07ba4b061a79896 Alban Bedel 2016-01-23 104 07ba4b061a79896 Alban Bedel 2016-01-23 105 static int misc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) 07ba4b061a79896 Alban Bedel 2016-01-23 106 { 07ba4b061a79896 Alban Bedel 2016-01-23 107 irq_set_chip_and_handler(irq, &ath79_misc_irq_chip, handle_level_irq); 07ba4b061a79896 Alban Bedel 2016-01-23 108 irq_set_chip_data(irq, d->host_data); 07ba4b061a79896 Alban Bedel 2016-01-23 109 return 0; 07ba4b061a79896 Alban Bedel 2016-01-23 110 } 07ba4b061a79896 Alban Bedel 2016-01-23 111 07ba4b061a79896 Alban Bedel 2016-01-23 112 static const struct irq_domain_ops misc_irq_domain_ops = { 07ba4b061a79896 Alban Bedel 2016-01-23 113 .xlate = irq_domain_xlate_onecell, 07ba4b061a79896 Alban Bedel 2016-01-23 114 .map = misc_map, 07ba4b061a79896 Alban Bedel 2016-01-23 115 }; 07ba4b061a79896 Alban Bedel 2016-01-23 116 07ba4b061a79896 Alban Bedel 2016-01-23 117 static void __init ath79_misc_intc_domain_init( 07ba4b061a79896 Alban Bedel 2016-01-23 118 struct irq_domain *domain, int irq) 07ba4b061a79896 Alban Bedel 2016-01-23 119 { 07ba4b061a79896 Alban Bedel 2016-01-23 120 void __iomem *base = domain->host_data; 07ba4b061a79896 Alban Bedel 2016-01-23 121 a1e8783db8e0d58 Petr Štetiar 2019-04-12 122 ath79_perfcount_irq = irq_create_mapping(domain, ATH79_MISC_PERF_IRQ); a1e8783db8e0d58 Petr Štetiar 2019-04-12 123 07ba4b061a79896 Alban Bedel 2016-01-23 124 /* Disable and clear all interrupts */ 07ba4b061a79896 Alban Bedel 2016-01-23 125 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); 07ba4b061a79896 Alban Bedel 2016-01-23 126 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); 07ba4b061a79896 Alban Bedel 2016-01-23 127 07ba4b061a79896 Alban Bedel 2016-01-23 128 irq_set_chained_handler_and_data(irq, ath79_misc_irq_handler, domain); 07ba4b061a79896 Alban Bedel 2016-01-23 129 } 07ba4b061a79896 Alban Bedel 2016-01-23 130 07ba4b061a79896 Alban Bedel 2016-01-23 131 static int __init ath79_misc_intc_of_init( 07ba4b061a79896 Alban Bedel 2016-01-23 132 struct device_node *node, struct device_node *parent) 07ba4b061a79896 Alban Bedel 2016-01-23 133 { 07ba4b061a79896 Alban Bedel 2016-01-23 134 struct irq_domain *domain; 07ba4b061a79896 Alban Bedel 2016-01-23 135 void __iomem *base; 07ba4b061a79896 Alban Bedel 2016-01-23 136 int irq; 07ba4b061a79896 Alban Bedel 2016-01-23 137 07ba4b061a79896 Alban Bedel 2016-01-23 138 irq = irq_of_parse_and_map(node, 0); 07ba4b061a79896 Alban Bedel 2016-01-23 139 if (!irq) { 07ba4b061a79896 Alban Bedel 2016-01-23 140 pr_err("Failed to get MISC IRQ\n"); 07ba4b061a79896 Alban Bedel 2016-01-23 141 return -EINVAL; 07ba4b061a79896 Alban Bedel 2016-01-23 142 } 07ba4b061a79896 Alban Bedel 2016-01-23 143 07ba4b061a79896 Alban Bedel 2016-01-23 144 base = of_iomap(node, 0); 07ba4b061a79896 Alban Bedel 2016-01-23 145 if (!base) { 07ba4b061a79896 Alban Bedel 2016-01-23 146 pr_err("Failed to get MISC IRQ registers\n"); 07ba4b061a79896 Alban Bedel 2016-01-23 147 return -ENOMEM; 07ba4b061a79896 Alban Bedel 2016-01-23 148 } 07ba4b061a79896 Alban Bedel 2016-01-23 149 07ba4b061a79896 Alban Bedel 2016-01-23 150 domain = irq_domain_add_linear(node, ATH79_MISC_IRQ_COUNT, 07ba4b061a79896 Alban Bedel 2016-01-23 @151 &misc_irq_domain_ops, base); 07ba4b061a79896 Alban Bedel 2016-01-23 152 if (!domain) { 07ba4b061a79896 Alban Bedel 2016-01-23 153 pr_err("Failed to add MISC irqdomain\n"); 07ba4b061a79896 Alban Bedel 2016-01-23 154 return -EINVAL; 07ba4b061a79896 Alban Bedel 2016-01-23 155 } 07ba4b061a79896 Alban Bedel 2016-01-23 156 07ba4b061a79896 Alban Bedel 2016-01-23 157 ath79_misc_intc_domain_init(domain, irq); 07ba4b061a79896 Alban Bedel 2016-01-23 158 return 0; 07ba4b061a79896 Alban Bedel 2016-01-23 159 } 07ba4b061a79896 Alban Bedel 2016-01-23 160 07ba4b061a79896 Alban Bedel 2016-01-23 161 static int __init ar7100_misc_intc_of_init( 07ba4b061a79896 Alban Bedel 2016-01-23 162 struct device_node *node, struct device_node *parent) 07ba4b061a79896 Alban Bedel 2016-01-23 163 { 07ba4b061a79896 Alban Bedel 2016-01-23 164 ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; 07ba4b061a79896 Alban Bedel 2016-01-23 165 return ath79_misc_intc_of_init(node, parent); 07ba4b061a79896 Alban Bedel 2016-01-23 166 } 07ba4b061a79896 Alban Bedel 2016-01-23 167 07ba4b061a79896 Alban Bedel 2016-01-23 168 IRQCHIP_DECLARE(ar7100_misc_intc, "qca,ar7100-misc-intc", 07ba4b061a79896 Alban Bedel 2016-01-23 169 ar7100_misc_intc_of_init); 07ba4b061a79896 Alban Bedel 2016-01-23 170 07ba4b061a79896 Alban Bedel 2016-01-23 171 static int __init ar7240_misc_intc_of_init( 07ba4b061a79896 Alban Bedel 2016-01-23 172 struct device_node *node, struct device_node *parent) 07ba4b061a79896 Alban Bedel 2016-01-23 173 { 07ba4b061a79896 Alban Bedel 2016-01-23 174 ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; 07ba4b061a79896 Alban Bedel 2016-01-23 175 return ath79_misc_intc_of_init(node, parent); 07ba4b061a79896 Alban Bedel 2016-01-23 176 } 07ba4b061a79896 Alban Bedel 2016-01-23 177 07ba4b061a79896 Alban Bedel 2016-01-23 178 IRQCHIP_DECLARE(ar7240_misc_intc, "qca,ar7240-misc-intc", 07ba4b061a79896 Alban Bedel 2016-01-23 179 ar7240_misc_intc_of_init); 07ba4b061a79896 Alban Bedel 2016-01-23 180 07ba4b061a79896 Alban Bedel 2016-01-23 181 void __init ath79_misc_irq_init(void __iomem *regs, int irq, 07ba4b061a79896 Alban Bedel 2016-01-23 182 int irq_base, bool is_ar71xx) 07ba4b061a79896 Alban Bedel 2016-01-23 183 { 07ba4b061a79896 Alban Bedel 2016-01-23 184 struct irq_domain *domain; 07ba4b061a79896 Alban Bedel 2016-01-23 185 07ba4b061a79896 Alban Bedel 2016-01-23 186 if (is_ar71xx) 07ba4b061a79896 Alban Bedel 2016-01-23 187 ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; 07ba4b061a79896 Alban Bedel 2016-01-23 188 else 07ba4b061a79896 Alban Bedel 2016-01-23 189 ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; 07ba4b061a79896 Alban Bedel 2016-01-23 190 07ba4b061a79896 Alban Bedel 2016-01-23 191 domain = irq_domain_add_legacy(NULL, ATH79_MISC_IRQ_COUNT, 07ba4b061a79896 Alban Bedel 2016-01-23 @192 irq_base, 0, &misc_irq_domain_ops, regs); :::::: The code at line 36 was first introduced by commit :::::: 07ba4b061a79896315a7be4b123de12df6a9d2bd irqchip/ath79-misc: Move the MISC driver from arch/mips/ath79/ :::::: TO: Alban Bedel <albeu(a)free.fr&gt; :::::: CC: Jason Cooper <jason(a)lakedaemon.net&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org