6:42 p.m.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 5fcb9628fd1227a5f11d87171cb1b8b5c414d9d9
commit: 429b9db8e10eef6cdfbf2ecf27415bc79e2bee01 [649/2089] drm/amd/display: Remove nv12
work around
config: i386-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0
reproduce (this is a W=1 build):
git checkout 429b9db8e10eef6cdfbf2ecf27415bc79e2bee01
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:1022:6: warning: no previous
prototype for 'dcn20_enable_plane' [-Wmissing-prototypes]
1022 | void dcn20_enable_plane(
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: In function
'dcn20_update_dchubp_dpp':
>
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:1297:7: warning: variable
'viewport_changed' set but not used [-Wunused-but-set-variable]
1297 | bool
viewport_changed = false;
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c: At top level:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:2097:6: warning: no previous
prototype for 'dcn20_get_mpctree_visual_confirm_color' [-Wmissing-prototypes]
2097 | void dcn20_get_mpctree_visual_confirm_color(
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:86,
from drivers/gpu/drm/amd/amdgpu/../display/dc/basics/dc_common.h:29,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:28:
drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dpp.h:50:42: warning:
'dpp_input_csc_matrix' defined but not used [-Wunused-const-variable=]
50 | static const struct dpp_input_csc_matrix dpp_input_csc_matrix[] = {
| ^~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32,
from drivers/gpu/drm/amd/amdgpu/../display/dc/basics/dc_common.h:29,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:28:
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning:
'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=]
124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
| ^~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning:
'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=]
122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning:
'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=]
120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:27:
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning:
'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning:
'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
| ^~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning:
'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
| ^~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning:
'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
| ^~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning:
'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
| ^~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:67:32: warning:
'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
| ^~~~~~~~~~~~~
vim +/viewport_changed +1297 drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1287
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1288 static void dcn20_update_dchubp_dpp(
7ed4e6352c16fe Harry Wentland 2019-02-22 1289 struct dc *dc,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1290 struct pipe_ctx *pipe_ctx,
7ed4e6352c16fe Harry Wentland 2019-02-22 1291 struct dc_state *context)
7ed4e6352c16fe Harry Wentland 2019-02-22 1292 {
f42ea55be11147 Anthony Koo 2019-11-05 1293 struct dce_hwseq *hws =
dc->hwseq;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1294 struct hubp *hubp =
pipe_ctx->plane_res.hubp;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1295 struct dpp *dpp =
pipe_ctx->plane_res.dpp;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1296 struct dc_plane_state *plane_state =
pipe_ctx->plane_state;
cf27a6d15d950e Eric Yang 2019-11-18 @1297 bool viewport_changed = false;
7ed4e6352c16fe Harry Wentland 2019-02-22 1298
1ea8751bd28d1e Noah Abradjian 2019-09-27 1299 if
(pipe_ctx->update_flags.bits.dppclk)
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1300
dpp->funcs->dpp_dppclk_control(dpp, false, true);
7ed4e6352c16fe Harry Wentland 2019-02-22 1301
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1302 /* TODO: Need input parameter to
tell current DCHUB pipe tie to which OTG
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1303 * VTG is within DCHUBBUB which is
commond block share by each pipe HUBP.
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1304 * VTG is 1:1 mapping with OTG. Each
pipe HUBP will select which VTG
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1305 */
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1306 if
(pipe_ctx->update_flags.bits.hubp_rq_dlg_ttu) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1307
hubp->funcs->hubp_vtg_sel(hubp, pipe_ctx->stream_res.tg->inst);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1308
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1309 hubp->funcs->hubp_setup(
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1310 hubp,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1311 &pipe_ctx->dlg_regs,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1312 &pipe_ctx->ttu_regs,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1313 &pipe_ctx->rq_regs,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1314
&pipe_ctx->pipe_dlg_param);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1315 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1316 if
(pipe_ctx->update_flags.bits.hubp_interdependent)
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1317
hubp->funcs->hubp_setup_interdependent(
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1318 hubp,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1319 &pipe_ctx->dlg_regs,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1320 &pipe_ctx->ttu_regs);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1321
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1322 if
(pipe_ctx->update_flags.bits.enable ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1323
plane_state->update_flags.bits.bpp_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1324
plane_state->update_flags.bits.input_csc_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1325
plane_state->update_flags.bits.color_space_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1326
plane_state->update_flags.bits.coeff_reduction_change) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1327 struct dc_bias_and_scale bns_params
= {0};
21ffcc94d5b3dc Nicholas Kazlauskas 2019-07-11 1328
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1329 // program the input csc
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1330 dpp->funcs->dpp_setup(dpp,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1331 plane_state->format,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1332 EXPANSION_MODE_ZERO,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1333
plane_state->input_csc_color_matrix,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1334 plane_state->color_space,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1335 NULL);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1336
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1337 if
(dpp->funcs->dpp_program_bias_and_scale) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1338 //TODO :for CNVC set scale and
bias registers if necessary
78c7738211e027 Anthony Koo 2019-10-29 1339
build_prescale_params(&bns_params, plane_state);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1340
dpp->funcs->dpp_program_bias_and_scale(dpp, &bns_params);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1341 }
21ffcc94d5b3dc Nicholas Kazlauskas 2019-07-11 1342 }
21ffcc94d5b3dc Nicholas Kazlauskas 2019-07-11 1343
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1344 if
(pipe_ctx->update_flags.bits.mpcc
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1345 ||
plane_state->update_flags.bits.global_alpha_change
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1346 ||
plane_state->update_flags.bits.per_pixel_alpha_change) {
8b0fbb368c96df Noah Abradjian 2019-11-13 1347 // MPCC inst is equal to pipe index
in practice
1380c1bf5b9c31 Noah Abradjian 2019-11-29 1348 int mpcc_inst = hubp->inst;
8b0fbb368c96df Noah Abradjian 2019-11-13 1349 int opp_inst;
0120e8b8451c6a Noah Abradjian 2019-11-22 1350 int opp_count =
dc->res_pool->pipe_count;
8b0fbb368c96df Noah Abradjian 2019-11-13 1351
8b0fbb368c96df Noah Abradjian 2019-11-13 1352 for (opp_inst = 0; opp_inst <
opp_count; opp_inst++) {
8b0fbb368c96df Noah Abradjian 2019-11-13 1353 if
(dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst]) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1354
dc->res_pool->mpc->funcs->wait_for_idle(dc->res_pool->mpc,
mpcc_inst);
8b0fbb368c96df Noah Abradjian 2019-11-13 1355
dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst] = false;
8b0fbb368c96df Noah Abradjian 2019-11-13 1356 break;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1357 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1358 }
f42ea55be11147 Anthony Koo 2019-11-05 1359 hws->funcs.update_mpcc(dc,
pipe_ctx);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1360 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1361
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1362 if
(pipe_ctx->update_flags.bits.scaler ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1363
plane_state->update_flags.bits.scaling_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1364
plane_state->update_flags.bits.position_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1365
plane_state->update_flags.bits.per_pixel_alpha_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1366
pipe_ctx->stream->update_flags.bits.scaling) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1367
pipe_ctx->plane_res.scl_data.lb_params.alpha_en =
pipe_ctx->plane_state->per_pixel_alpha;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1368
ASSERT(pipe_ctx->plane_res.scl_data.lb_params.depth == LB_PIXEL_DEPTH_30BPP);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1369 /* scaler configuration */
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1370
pipe_ctx->plane_res.dpp->funcs->dpp_set_scaler(
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1371 pipe_ctx->plane_res.dpp,
&pipe_ctx->plane_res.scl_data);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1372 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1373
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1374 if
(pipe_ctx->update_flags.bits.viewport ||
b34659deb66bfe Nicholas Kazlauskas 2020-04-05 1375 (context == dc->current_state
&& plane_state->update_flags.bits.position_change) ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1376 (context == dc->current_state
&& plane_state->update_flags.bits.scaling_change) ||
cf27a6d15d950e Eric Yang 2019-11-18 1377 (context == dc->current_state
&& pipe_ctx->stream->update_flags.bits.scaling)) {
cf27a6d15d950e Eric Yang 2019-11-18 1378
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1379
hubp->funcs->mem_program_viewport(
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1380 hubp,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1381
&pipe_ctx->plane_res.scl_data.viewport,
cf27a6d15d950e Eric Yang 2019-11-18 1382
&pipe_ctx->plane_res.scl_data.viewport_c);
cf27a6d15d950e Eric Yang 2019-11-18 1383 viewport_changed = true;
cf27a6d15d950e Eric Yang 2019-11-18 1384 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1385
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1386 /* Any updates are handled in dc
interface, just need to apply existing for plane enable */
74cc5f02eb67c1 Aric Cyr 2019-11-23 1387 if
((pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed ||
74cc5f02eb67c1 Aric Cyr 2019-11-23 1388
pipe_ctx->update_flags.bits.scaler || pipe_ctx->update_flags.bits.viewport)
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1389 &&
pipe_ctx->stream->cursor_attributes.address.quad_part != 0) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1390
dc->hwss.set_cursor_position(pipe_ctx);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1391
dc->hwss.set_cursor_attribute(pipe_ctx);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1392
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1393 if
(dc->hwss.set_cursor_sdr_white_level)
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1394
dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1395 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1396
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1397 /* Any updates are handled in dc
interface, just need
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1398 * to apply existing for plane
enable / opp change */
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1399 if
(pipe_ctx->update_flags.bits.enable || pipe_ctx->update_flags.bits.opp_changed
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1400 ||
pipe_ctx->stream->update_flags.bits.gamut_remap
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1401 ||
pipe_ctx->stream->update_flags.bits.out_csc) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1402 /* dpp/cm gamut remap*/
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1403
dc->hwss.program_gamut_remap(pipe_ctx);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1404
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1405 /*call the dcn2 method which uses
mpc csc*/
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1406 dc->hwss.program_output_csc(dc,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1407 pipe_ctx,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1408
pipe_ctx->stream->output_color_space,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1409
pipe_ctx->stream->csc_color_matrix.matrix,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1410 hubp->opp_id);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1411 }
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1412
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1413 if
(pipe_ctx->update_flags.bits.enable ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1414
pipe_ctx->update_flags.bits.opp_changed ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1415
plane_state->update_flags.bits.pixel_format_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1416
plane_state->update_flags.bits.horizontal_mirror_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1417
plane_state->update_flags.bits.rotation_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1418
plane_state->update_flags.bits.swizzle_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1419
plane_state->update_flags.bits.dcc_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1420
plane_state->update_flags.bits.bpp_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1421
plane_state->update_flags.bits.scaling_change ||
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1422
plane_state->update_flags.bits.plane_size_change) {
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1423 struct plane_size size =
plane_state->plane_size;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1424
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1425 size.surface_size =
pipe_ctx->plane_res.scl_data.viewport;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1426
hubp->funcs->hubp_program_surface_config(
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1427 hubp,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1428 plane_state->format,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1429 &plane_state->tiling_info,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1430 &size,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1431 plane_state->rotation,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1432 &plane_state->dcc,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1433
plane_state->horizontal_mirror,
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1434 0);
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1435 hubp->power_gated = false;
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1436 }
4e0cbbbfbc37fd Leo Li 2019-03-20 1437
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1438 if
(pipe_ctx->update_flags.bits.enable || plane_state->update_flags.bits.addr_update)
f42ea55be11147 Anthony Koo 2019-11-05 1439 hws->funcs.update_plane_addr(dc,
pipe_ctx);
7ed4e6352c16fe Harry Wentland 2019-02-22 1440
cf27a6d15d950e Eric Yang 2019-11-18 1441
cf27a6d15d950e Eric Yang 2019-11-18 1442
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1443 if
(pipe_ctx->update_flags.bits.enable)
b6e881c947417e Dmytro Laktyushkin 2019-09-13 1444 hubp->funcs->set_blank(hubp,
false);
7ed4e6352c16fe Harry Wentland 2019-02-22 1445 }
7ed4e6352c16fe Harry Wentland 2019-02-22 1446
:::::: The code at line 1297 was first introduced by commit
:::::: cf27a6d15d950ed1beb3926469c9eaa6907bbf88 drm/amd/display: update chroma viewport
wa
:::::: TO: Eric Yang <Eric.Yang2(a)amd.com>
:::::: CC: Alex Deucher <alexander.deucher(a)amd.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org