[kbuild-all] [djwong-xfs:xfs-5.12-merge 2/6] arch/arc/include/asm/perf_event.h:126:23: error: 'arc_pmu_cache_map' defined but not used

tree: https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git xfs-5.12-merge head: 45d6842f11a30d152b849ca819a91331b5f94f56 commit: ff344abb1b45079f292cf90e039ce0c5f7ee9988 [2/6] xfs: don't crash with assfail config: arc-allyesconfig (attached as .config) compiler: arceb-elf-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/comm... git remote add djwong-xfs https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git git fetch --no-tags djwong-xfs xfs-5.12-merge git checkout ff344abb1b45079f292cf90e039ce0c5f7ee9988 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): In file included from include/linux/perf_event.h:25, from include/linux/trace_events.h:10, from include/trace/trace_events.h:21, from include/trace/define_trace.h:102, from fs/xfs/xfs_trace.h:3896, from fs/xfs/xfs_trace.c:38: 126 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ^~~~~~~~~~~~~~~~~ 91 | static const char * const arc_pmu_ev_hw_map[] = { | ^~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors -- fs/d_path.c:315:7: error: no previous prototype for 'simple_dname' [-Werror=missing-prototypes] 315 | char *simple_dname(struct dentry *dentry, char *buffer, int buflen) | ^~~~~~~~~~~~ In file included from include/linux/perf_event.h:25, from include/linux/trace_events.h:10, from include/trace/syscall.h:7, from include/linux/syscalls.h:84, from fs/d_path.c:2: 126 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ^~~~~~~~~~~~~~~~~ 91 | static const char * const arc_pmu_ev_hw_map[] = { | ^~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors -- fs/io_uring.c: In function 'io_prep_async_work': fs/io_uring.c:1523:22: warning: variable 'id' set but not used [-Wunused-but-set-variable] 1523 | struct io_identity *id; | ^~ In file included from include/linux/perf_event.h:25, from include/linux/trace_events.h:10, from include/trace/syscall.h:7, from include/linux/syscalls.h:84, from fs/io_uring.c:45: At top level: 126 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ^~~~~~~~~~~~~~~~~ 91 | static const char * const arc_pmu_ev_hw_map[] = { | ^~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors -- fs/dax.c: In function 'copy_cow_page_dax': fs/dax.c:719:2: error: implicit declaration of function 'copy_user_page'; did you mean 'copy_to_user_page'? [-Werror=implicit-function-declaration] 719 | copy_user_page(vto, (void __force *)kaddr, vaddr, to); | ^~~~~~~~~~~~~~ | copy_to_user_page In file included from include/linux/perf_event.h:25, from include/linux/trace_events.h:10, from include/trace/trace_events.h:21, from include/trace/define_trace.h:102, from include/trace/events/fs_dax.h:286, from fs/dax.c:31: At top level: 126 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ^~~~~~~~~~~~~~~~~ 91 | static const char * const arc_pmu_ev_hw_map[] = { | ^~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors vim +/arc_pmu_cache_map +126 arch/arc/include/asm/perf_event.h 0dd450fe13da4aea Mischa Jonker 2013-11-07 65 0dd450fe13da4aea Mischa Jonker 2013-11-07 66 /* bde80c237e49983e Vineet Gupta 2015-04-15 67 * Some ARC pct quirks: 0dd450fe13da4aea Mischa Jonker 2013-11-07 68 * 0dd450fe13da4aea Mischa Jonker 2013-11-07 69 * PERF_COUNT_HW_STALLED_CYCLES_BACKEND 0dd450fe13da4aea Mischa Jonker 2013-11-07 70 * PERF_COUNT_HW_STALLED_CYCLES_FRONTEND 0dd450fe13da4aea Mischa Jonker 2013-11-07 71 * The ARC 700 can either measure stalls per pipeline stage, or all stalls 0dd450fe13da4aea Mischa Jonker 2013-11-07 72 * combined; for now we assign all stalls to STALLED_CYCLES_BACKEND 0dd450fe13da4aea Mischa Jonker 2013-11-07 73 * and all pipeline flushes (e.g. caused by mispredicts, etc.) to 0dd450fe13da4aea Mischa Jonker 2013-11-07 74 * STALLED_CYCLES_FRONTEND. 0dd450fe13da4aea Mischa Jonker 2013-11-07 75 * 0dd450fe13da4aea Mischa Jonker 2013-11-07 76 * We could start multiple performance counters and combine everything 0dd450fe13da4aea Mischa Jonker 2013-11-07 77 * afterwards, but that makes it complicated. 0dd450fe13da4aea Mischa Jonker 2013-11-07 78 * 0dd450fe13da4aea Mischa Jonker 2013-11-07 79 * Note that I$ cache misses aren't counted by either of the two! 0dd450fe13da4aea Mischa Jonker 2013-11-07 80 */ 0dd450fe13da4aea Mischa Jonker 2013-11-07 81 bde80c237e49983e Vineet Gupta 2015-04-15 82 /* bde80c237e49983e Vineet Gupta 2015-04-15 83 * ARC PCT has hardware conditions with fixed "names" but variable "indexes" bde80c237e49983e Vineet Gupta 2015-04-15 84 * (based on a specific RTL build) bde80c237e49983e Vineet Gupta 2015-04-15 85 * Below is the static map between perf generic/arc specific event_id and bde80c237e49983e Vineet Gupta 2015-04-15 86 * h/w condition names. bde80c237e49983e Vineet Gupta 2015-04-15 87 * At the time of probe, we loop thru each index and find it's name to bde80c237e49983e Vineet Gupta 2015-04-15 88 * complete the mapping of perf event_id to h/w index as latter is needed bde80c237e49983e Vineet Gupta 2015-04-15 89 * to program the counter really bde80c237e49983e Vineet Gupta 2015-04-15 90 */ 0dd450fe13da4aea Mischa Jonker 2013-11-07 @91 static const char * const arc_pmu_ev_hw_map[] = { bde80c237e49983e Vineet Gupta 2015-04-15 92 /* count cycles */ 0dd450fe13da4aea Mischa Jonker 2013-11-07 93 [PERF_COUNT_HW_CPU_CYCLES] = "crun", 0dd450fe13da4aea Mischa Jonker 2013-11-07 94 [PERF_COUNT_HW_REF_CPU_CYCLES] = "crun", 0dd450fe13da4aea Mischa Jonker 2013-11-07 95 [PERF_COUNT_HW_BUS_CYCLES] = "crun", bde80c237e49983e Vineet Gupta 2015-04-15 96 0dd450fe13da4aea Mischa Jonker 2013-11-07 97 [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = "bflush", 0dd450fe13da4aea Mischa Jonker 2013-11-07 98 [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = "bstall", bde80c237e49983e Vineet Gupta 2015-04-15 99 bde80c237e49983e Vineet Gupta 2015-04-15 100 /* counts condition */ bde80c237e49983e Vineet Gupta 2015-04-15 101 [PERF_COUNT_HW_INSTRUCTIONS] = "iall", 3affbf0e154ee351 Eugeniy Paltsev 2018-12-17 102 /* All jump instructions that are taken */ 3affbf0e154ee351 Eugeniy Paltsev 2018-12-17 103 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmptak", 9b28829d6da391f6 Vineet Gupta 2014-11-18 104 #ifdef CONFIG_ISA_ARCV2 9b28829d6da391f6 Vineet Gupta 2014-11-18 105 [PERF_COUNT_HW_BRANCH_MISSES] = "bpmp", 9b28829d6da391f6 Vineet Gupta 2014-11-18 106 #else fbe025c3eaf5f520 Vineet Gupta 2019-02-22 107 [PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */ bde80c237e49983e Vineet Gupta 2015-04-15 108 [PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", /* NP-T, PT-NT, PNT-T */ 9b28829d6da391f6 Vineet Gupta 2014-11-18 109 #endif 0a8a47679351f001 Vineet Gupta 2015-01-07 110 [PERF_COUNT_ARC_LDC] = "imemrdc", /* Instr: mem read cached */ 0a8a47679351f001 Vineet Gupta 2015-01-07 111 [PERF_COUNT_ARC_STC] = "imemwrc", /* Instr: mem write cached */ 0a8a47679351f001 Vineet Gupta 2015-01-07 112 bde80c237e49983e Vineet Gupta 2015-04-15 113 [PERF_COUNT_ARC_DCLM] = "dclm", /* D-cache Load Miss */ bde80c237e49983e Vineet Gupta 2015-04-15 114 [PERF_COUNT_ARC_DCSM] = "dcsm", /* D-cache Store Miss */ bde80c237e49983e Vineet Gupta 2015-04-15 115 [PERF_COUNT_ARC_ICM] = "icm", /* I-cache Miss */ bde80c237e49983e Vineet Gupta 2015-04-15 116 [PERF_COUNT_ARC_EDTLB] = "edtlb", /* D-TLB Miss */ bde80c237e49983e Vineet Gupta 2015-04-15 117 [PERF_COUNT_ARC_EITLB] = "eitlb", /* I-TLB Miss */ e0d5321faca1133c Alexey Brodkin 2016-08-25 118 e0d5321faca1133c Alexey Brodkin 2016-08-25 119 [PERF_COUNT_HW_CACHE_REFERENCES] = "imemrdc", /* Instr: mem read cached */ e0d5321faca1133c Alexey Brodkin 2016-08-25 120 [PERF_COUNT_HW_CACHE_MISSES] = "dclm", /* D-cache Load Miss */ 0dd450fe13da4aea Mischa Jonker 2013-11-07 121 }; 0dd450fe13da4aea Mischa Jonker 2013-11-07 122 0dd450fe13da4aea Mischa Jonker 2013-11-07 123 #define C(_x) PERF_COUNT_HW_CACHE_##_x 0dd450fe13da4aea Mischa Jonker 2013-11-07 124 #define CACHE_OP_UNSUPPORTED 0xffff 0dd450fe13da4aea Mischa Jonker 2013-11-07 125 0dd450fe13da4aea Mischa Jonker 2013-11-07 @126 static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 127 [C(L1D)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 128 [C(OP_READ)] = { 0a8a47679351f001 Vineet Gupta 2015-01-07 129 [C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC, 0dd450fe13da4aea Mischa Jonker 2013-11-07 130 [C(RESULT_MISS)] = PERF_COUNT_ARC_DCLM, 0dd450fe13da4aea Mischa Jonker 2013-11-07 131 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 132 [C(OP_WRITE)] = { 0a8a47679351f001 Vineet Gupta 2015-01-07 133 [C(RESULT_ACCESS)] = PERF_COUNT_ARC_STC, 0dd450fe13da4aea Mischa Jonker 2013-11-07 134 [C(RESULT_MISS)] = PERF_COUNT_ARC_DCSM, 0dd450fe13da4aea Mischa Jonker 2013-11-07 135 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 136 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 137 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 138 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 139 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 140 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 141 [C(L1I)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 142 [C(OP_READ)] = { 0a8a47679351f001 Vineet Gupta 2015-01-07 143 [C(RESULT_ACCESS)] = PERF_COUNT_HW_INSTRUCTIONS, 0dd450fe13da4aea Mischa Jonker 2013-11-07 144 [C(RESULT_MISS)] = PERF_COUNT_ARC_ICM, 0dd450fe13da4aea Mischa Jonker 2013-11-07 145 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 146 [C(OP_WRITE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 147 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 148 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 149 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 150 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 151 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 152 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 153 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 154 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 155 [C(LL)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 156 [C(OP_READ)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 157 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 158 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 159 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 160 [C(OP_WRITE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 161 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 162 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 163 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 164 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 165 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 166 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 167 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 168 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 169 [C(DTLB)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 170 [C(OP_READ)] = { 0a8a47679351f001 Vineet Gupta 2015-01-07 171 [C(RESULT_ACCESS)] = PERF_COUNT_ARC_LDC, 0dd450fe13da4aea Mischa Jonker 2013-11-07 172 [C(RESULT_MISS)] = PERF_COUNT_ARC_EDTLB, 0dd450fe13da4aea Mischa Jonker 2013-11-07 173 }, 0a8a47679351f001 Vineet Gupta 2015-01-07 174 /* DTLB LD/ST Miss not segregated by h/w*/ 0dd450fe13da4aea Mischa Jonker 2013-11-07 175 [C(OP_WRITE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 176 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 177 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 178 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 179 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 180 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 181 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 182 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 183 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 184 [C(ITLB)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 185 [C(OP_READ)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 186 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 187 [C(RESULT_MISS)] = PERF_COUNT_ARC_EITLB, 0dd450fe13da4aea Mischa Jonker 2013-11-07 188 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 189 [C(OP_WRITE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 190 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 191 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 192 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 193 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 194 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 195 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 196 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 197 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 198 [C(BPU)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 199 [C(OP_READ)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 200 [C(RESULT_ACCESS)] = PERF_COUNT_HW_BRANCH_INSTRUCTIONS, 0dd450fe13da4aea Mischa Jonker 2013-11-07 201 [C(RESULT_MISS)] = PERF_COUNT_HW_BRANCH_MISSES, 0dd450fe13da4aea Mischa Jonker 2013-11-07 202 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 203 [C(OP_WRITE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 204 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 205 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 206 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 207 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 208 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 209 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 210 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 211 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 212 [C(NODE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 213 [C(OP_READ)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 214 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 215 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 216 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 217 [C(OP_WRITE)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 218 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 219 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 220 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 221 [C(OP_PREFETCH)] = { 0dd450fe13da4aea Mischa Jonker 2013-11-07 222 [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 223 [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, 0dd450fe13da4aea Mischa Jonker 2013-11-07 224 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 225 }, 0dd450fe13da4aea Mischa Jonker 2013-11-07 226 }; 0dd450fe13da4aea Mischa Jonker 2013-11-07 227 :::::: The code at line 126 was first introduced by commit :::::: 0dd450fe13da4aeacc69916ecfe39d3d0b531900 ARC: Add perf support for ARC700 cores :::::: TO: Mischa Jonker <mjonker(a)synopsys.com&gt; :::::: CC: Vineet Gupta <vgupta(a)synopsys.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org