[kbuild-all] [freescale-fslc:5.10-2.1.x-imx 8417/15264] drivers/pci/controller/dwc/pci-imx6.c:2938:29: warning: use of logical '&&' with constant operand

tree: https://github.com/Freescale/linux-fslc 5.10-2.1.x-imx head: cdf10f101ab7e0112a285ab86e1a62d80e7d2104 commit: 1713c6ce909c5b8b54df3e9daa12d0e36eda86b7 [8417/15264] MLK-25283-4 PCI: imx: adjust the l1ss support to proper place config: i386-randconfig-a015-20211115 (attached as .config) compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project fbe72e41b99dc7994daac300d208a955be3e4a0a) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/Freescale/linux-fslc/commit/1713c6ce909c5b8b54df3e9daa... git remote add freescale-fslc https://github.com/Freescale/linux-fslc git fetch --no-tags freescale-fslc 5.10-2.1.x-imx git checkout 1713c6ce909c5b8b54df3e9daa12d0e36eda86b7 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): drivers/pci/controller/dwc/pci-imx6.c:2370:6: warning: unused variable 'reg' [-Wunused-variable] u32 reg; ^ if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) { ^ ~~~~~~~~~~~~~~~~~~~~~ drivers/pci/controller/dwc/pci-imx6.c:2938:29: note: use '&' for a bitwise operation if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) { ^~ & drivers/pci/controller/dwc/pci-imx6.c:2938:29: note: remove constant to silence this warning if ((rc_l1sub && ep_l1sub) && PCI_L1SS_CAP_L1_PM_SS) { ~^~~~~~~~~~~~~~~~~~~~~~~~ int ttl, ret; ^ 3 warnings generated. vim +2938 drivers/pci/controller/dwc/pci-imx6.c 2867 2868 static void imx6_pcie_quirk(struct pci_dev *dev) 2869 { 2870 struct pci_bus *bus = dev->bus; 2871 struct pcie_port *pp = bus->sysdata; 2872 2873 /* Bus parent is the PCI bridge, its parent is this platform driver */ 2874 if (!bus->dev.parent || !bus->dev.parent->parent) 2875 return; 2876 2877 /* Make sure we only quirk devices associated with this driver */ 2878 if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver) 2879 return; 2880 2881 if (pci_is_root_bus(bus)) { 2882 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); 2883 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); 2884 2885 /* 2886 * Limit config length to avoid the kernel reading beyond 2887 * the register set and causing an abort on i.MX 6Quad 2888 */ 2889 if (imx6_pcie->drvdata->dbi_length) { 2890 dev->cfg_size = imx6_pcie->drvdata->dbi_length; 2891 dev_info(&dev->dev, "Limiting cfg_size to %d\n", 2892 dev->cfg_size); 2893 } 2894 } 2895 } 2896 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, 2897 PCI_CLASS_BRIDGE_PCI, 8, imx6_pcie_quirk); 2898 2899 static void imx6_pcie_l1ss_quirk(struct pci_dev *dev) 2900 { 2901 u32 reg, rc_l1sub, ep_l1sub, header; 2903 int pos = PCI_CFG_SPACE_SIZE; 2904 struct pci_bus *bus = dev->bus; 2905 struct pcie_port *pp = bus->sysdata; 2906 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); 2907 struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); 2908 2909 /* Return directly, if the L1SS is not supported by RC */ 2910 if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_L1SS)) 2911 return; 2912 2913 reg = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS); 2914 rc_l1sub = dw_pcie_readl_dbi(pci, reg + PCI_L1SS_CAP); 2915 2916 /* minimum 8 bytes per capability */ 2917 ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; 2918 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header); 2919 /* 2920 * If we have no capabilities, this is indicated by cap ID, 2921 * cap version and next pointer all being 0. 2922 */ 2923 if (header == 0) 2924 return; 2925 2926 while (ttl-- > 0) { 2927 if (PCI_EXT_CAP_ID(header) == PCI_EXT_CAP_ID_L1SS && pos != 0) 2928 break; 2929 2930 pos = PCI_EXT_CAP_NEXT(header); 2931 if (pos < PCI_CFG_SPACE_SIZE) 2932 break; 2933 2934 ret = dw_pcie_read(pp->va_cfg0_base + pos, 4, &header); 2935 } 2936 ret = dw_pcie_read(pp->va_cfg0_base + pos + PCI_L1SS_CAP, 4, &ep_l1sub); 2937 2939 imx6_pcie->l1ss_clkreq = 1; 2940 imx6_pcie_clkreq_enable(imx6_pcie); 2941 } else { 2942 imx6_pcie->l1ss_clkreq = 0; 2943 } 2944 } 2945 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_l1ss_quirk); 2946 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org