2:45 p.m.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git tmp
head: 13665f1f8b5d501b40b1bc8448b0a032c7f04cc2
commit: d2869589ac6546531c00cbcc4e907c5ba8c677fa [12071/12184] drm/meson: Add AFBCD module
driver
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git/c...
git remote add sashal-linux-stable
https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git
git fetch --no-tags sashal-linux-stable tmp
git checkout d2869589ac6546531c00cbcc4e907c5ba8c677fa
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
In file included from include/linux/swab.h:5,
from include/uapi/linux/byteorder/big_endian.h:13,
from include/linux/byteorder/big_endian.h:5,
from arch/arm64/include/uapi/asm/byteorder.h:21,
from include/linux/bitfield.h:11,
from drivers/gpu/drm/meson/meson_osd_afbcd.c:7:
drivers/gpu/drm/meson/meson_osd_afbcd.c: In function 'meson_gxm_afbcd_reset':
> drivers/gpu/drm/meson/meson_osd_afbcd.c:89:17: error:
'VIU_SW_RESET_OSD1_AFBCD' undeclared (first use in this function); did you mean
'VIU_SW_RESET_OSD1'?
89 | writel_relaxed(VIU_SW_RESET_OSD1_AFBCD,
| ^~~~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:89:2: note: in expansion of macro
'writel_relaxed'
89 | writel_relaxed(VIU_SW_RESET_OSD1_AFBCD,
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:89:17: note: each undeclared identifier is
reported only once for each function it appears in
89 | writel_relaxed(VIU_SW_RESET_OSD1_AFBCD,
| ^~~~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:89:2: note: in expansion of macro
'writel_relaxed'
89 | writel_relaxed(VIU_SW_RESET_OSD1_AFBCD,
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c: In function 'meson_gxm_afbcd_enable':
> drivers/gpu/drm/meson/meson_osd_afbcd.c:98:28: error:
'OSD1_AFBCD_ID_FIFO_THRD' undeclared (first use in this function)
98 |
writel_relaxed(FIELD_PREP(OSD1_AFBCD_ID_FIFO_THRD, 0x40) |
| ^~~~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:98:2: note: in expansion of macro
'writel_relaxed'
98 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_ID_FIFO_THRD, 0x40) |
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:98:17: note: in expansion of macro
'FIELD_PREP'
98 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_ID_FIFO_THRD, 0x40) |
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:99:10: error:
'OSD1_AFBCD_DEC_ENABLE' undeclared (first use in this function); did you mean
'OSD1_AFBCD_ENABLE'?
99 | OSD1_AFBCD_DEC_ENABLE,
| ^~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:98:2: note: in expansion of macro
'writel_relaxed'
98 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_ID_FIFO_THRD, 0x40) |
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c: In function
'meson_gxm_afbcd_disable':
drivers/gpu/drm/meson/meson_osd_afbcd.c:107:22: error: 'OSD1_AFBCD_DEC_ENABLE'
undeclared (first use in this function); did you mean 'OSD1_AFBCD_ENABLE'?
107 | writel_bits_relaxed(OSD1_AFBCD_DEC_ENABLE, 0,
| ^~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_registers.h:15:2: note: in expansion of macro
'writel_relaxed'
15 | writel_relaxed((readl_relaxed(addr) & ~(mask)) | ((val) & (mask)),
addr)
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:107:2: note: in expansion of macro
'writel_bits_relaxed'
107 | writel_bits_relaxed(OSD1_AFBCD_DEC_ENABLE, 0,
| ^~~~~~~~~~~~~~~~~~~
In file included from include/linux/build_bug.h:5,
from include/linux/bitfield.h:10,
from drivers/gpu/drm/meson/meson_osd_afbcd.c:7:
drivers/gpu/drm/meson/meson_osd_afbcd.c: In function 'meson_gxm_afbcd_setup':
> drivers/gpu/drm/meson/meson_osd_afbcd.c:116:24: error:
'OSD1_AFBCD_MIF_URGENT' undeclared (first use in this function)
116 |
u32 mode = FIELD_PREP(OSD1_AFBCD_MIF_URGENT, 3) |
| ^~~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:397:9: note: in definition of macro
'__compiletime_assert'
397 | if (!(condition)) \
| ^~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:116:13: note: in expansion of macro
'FIELD_PREP'
116 | u32 mode = FIELD_PREP(OSD1_AFBCD_MIF_URGENT, 3) |
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:117:17: error:
'OSD1_AFBCD_HOLD_LINE_NUM' undeclared (first use in this function)
117
| FIELD_PREP(OSD1_AFBCD_HOLD_LINE_NUM, 4) |
| ^~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:397:9: note: in definition of macro
'__compiletime_assert'
397 | if (!(condition)) \
| ^~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:117:6: note: in expansion of macro
'FIELD_PREP'
117 | FIELD_PREP(OSD1_AFBCD_HOLD_LINE_NUM, 4) |
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:118:17: error:
'OSD1_AFBCD_RGBA_EXCHAN_CTRL' undeclared (first use in this function)
118 | FIELD_PREP(OSD1_AFBCD_RGBA_EXCHAN_CTRL, 0x34) |
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:397:9: note: in definition of macro
'__compiletime_assert'
397 | if (!(condition)) \
| ^~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:118:6: note: in expansion of macro
'FIELD_PREP'
118 | FIELD_PREP(OSD1_AFBCD_RGBA_EXCHAN_CTRL, 0x34) |
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:123:11: error:
'OSD1_AFBCD_HREG_HALF_BLOCK' undeclared (first use in this function)
123 | mode |= OSD1_AFBCD_HREG_HALF_BLOCK;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:126:11: error:
'OSD1_AFBCD_HREG_BLOCK_SPLIT' undeclared (first use in this function)
126 | mode |= OSD1_AFBCD_HREG_BLOCK_SPLIT;
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from include/linux/swab.h:5,
from include/uapi/linux/byteorder/big_endian.h:13,
from include/linux/byteorder/big_endian.h:5,
from arch/arm64/include/uapi/asm/byteorder.h:21,
from include/linux/bitfield.h:11,
from drivers/gpu/drm/meson/meson_osd_afbcd.c:7:
> drivers/gpu/drm/meson/meson_osd_afbcd.c:130:28: error:
'OSD1_AFBCD_HREG_VSIZE_IN' undeclared (first use in this function); did you mean
'OSD1_AFBCD_SIZE_IN'?
130 |
writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:132:21: error:
'OSD1_AFBCD_HREG_HSIZE_IN' undeclared (first use in this function); did you mean
'OSD1_AFBCD_SIZE_IN'?
132 |
FIELD_PREP(OSD1_AFBCD_HREG_HSIZE_IN,
| ^~~~~~~~~~~~~~~~~~~~~~~~
include/uapi/linux/swab.h:118:32: note: in definition of macro '__swab32'
118 | (__builtin_constant_p((__u32)(x)) ? \
| ^
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:46:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
46 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:132:10: note: in expansion of macro
'FIELD_PREP'
132 | FIELD_PREP(OSD1_AFBCD_HREG_HSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:19:12: note: in definition of macro
'___constant_swab32'
19 | (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:19:12: note: in definition of macro
'___constant_swab32'
19 | (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:19:12: note: in definition of macro
'___constant_swab32'
19 | (((__u32)(x) & (__u32)0x000000ffUL) << 24) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:20:12: note: in definition of macro
'___constant_swab32'
20 | (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:20:12: note: in definition of macro
'___constant_swab32'
20 | (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:20:12: note: in definition of macro
'___constant_swab32'
20 | (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
> drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error:
'struct <anonymous>' has no member named 'osd1_width'
131
| priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:21:12: note: in definition of macro
'___constant_swab32'
21 | (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error: 'struct
<anonymous>' has no member named 'osd1_width'
131 | priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:21:12: note: in definition of macro
'___constant_swab32'
21 | (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
| ^~~~~~~~~~~~~~~~~~~~
include/linux/compiler.h:417:2: note: in expansion of macro
'_compiletime_assert'
417 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro
'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:49:3: note: in expansion of macro 'BUILD_BUG_ON_MSG'
49 | BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:81:3: note: in expansion of macro '__BF_FIELD_CHECK'
81 | __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
| ^~~~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error: 'struct
<anonymous>' has no member named 'osd1_width'
131 | priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:21:12: note: in definition of macro
'___constant_swab32'
21 | (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:17: note: in expansion of macro
'FIELD_PREP'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:131:16: error: 'struct
<anonymous>' has no member named 'osd1_width'
131 | priv->viu.osd1_width) |
| ^
include/uapi/linux/swab.h:22:12: note: in definition of macro
'___constant_swab32'
22 | (((__u32)(x) & (__u32)0xff000000UL) >> 24)))
| ^
include/uapi/linux/byteorder/big_endian.h:33:43: note: in expansion of macro
'__swab32'
33 | #define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
| ^~~~~~~~
include/linux/byteorder/generic.h:88:21: note: in expansion of macro
'__cpu_to_le32'
88 | #define cpu_to_le32 __cpu_to_le32
| ^~~~~~~~~~~~~
drivers/gpu/drm/meson/meson_osd_afbcd.c:130:2: note: in expansion of macro
'writel_relaxed'
130 | writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
| ^~~~~~~~~~~~~~
include/linux/compiler.h:405:2: note: in expansion of macro
'__compiletime_assert'
405 | __compiletime_assert(condition, msg, prefix, suffix)
vim +89 drivers/gpu/drm/meson/meson_osd_afbcd.c
86
87 static int meson_gxm_afbcd_reset(struct meson_drm *priv)
88 {
89 writel_relaxed(VIU_SW_RESET_OSD1_AFBCD,
90
priv->io_base + _REG(VIU_SW_RESET));
91 writel_relaxed(0, priv->io_base + _REG(VIU_SW_RESET));
92
93 return 0;
94 }
95
96 static int meson_gxm_afbcd_enable(struct meson_drm *priv)
97 {
98 writel_relaxed(FIELD_PREP(OSD1_AFBCD_ID_FIFO_THRD, 0x40) |
99 OSD1_AFBCD_DEC_ENABLE,
100 priv->io_base +
_REG(OSD1_AFBCD_ENABLE));
101
102 return 0;
103 }
104
105 static int meson_gxm_afbcd_disable(struct meson_drm *priv)
106 {
107 writel_bits_relaxed(OSD1_AFBCD_DEC_ENABLE, 0,
108 priv->io_base + _REG(OSD1_AFBCD_ENABLE));
109
110 return 0;
111 }
112
113 static int meson_gxm_afbcd_setup(struct meson_drm *priv)
114 {
115 u32 conv_lbuf_len;
116 u32 mode = FIELD_PREP(OSD1_AFBCD_MIF_URGENT, 3) |
117 FIELD_PREP(OSD1_AFBCD_HOLD_LINE_NUM, 4) |
118 FIELD_PREP(OSD1_AFBCD_RGBA_EXCHAN_CTRL, 0x34) |
119
meson_gxm_afbcd_pixel_fmt(priv->afbcd.modifier,
120 priv->afbcd.format);
121
122 if (priv->afbcd.modifier & AFBC_FORMAT_MOD_SPARSE)
123 mode |= OSD1_AFBCD_HREG_HALF_BLOCK;
124
125 if (priv->afbcd.modifier & AFBC_FORMAT_MOD_SPLIT)
126 mode |= OSD1_AFBCD_HREG_BLOCK_SPLIT;
127
128 writel_relaxed(mode, priv->io_base + _REG(OSD1_AFBCD_MODE));
129
130 writel_relaxed(FIELD_PREP(OSD1_AFBCD_HREG_VSIZE_IN,
131 priv->viu.osd1_width) |
132 FIELD_PREP(OSD1_AFBCD_HREG_HSIZE_IN,
133
priv->viu.osd1_height),
134 priv->io_base + _REG(OSD1_AFBCD_SIZE_IN));
135
136 writel_relaxed(priv->viu.osd1_addr >> 4,
137 priv->io_base + _REG(OSD1_AFBCD_HDR_PTR));
138 writel_relaxed(priv->viu.osd1_addr >> 4,
139 priv->io_base + _REG(OSD1_AFBCD_FRAME_PTR));
140 /* TOFIX: bits 31:24 are not documented, nor the meaning of 0xe4 */
141 writel_relaxed((0xe4 << 24) | (priv->viu.osd1_addr & 0xffffff),
142 priv->io_base + _REG(OSD1_AFBCD_CHROMA_PTR));
143
144 if (priv->viu.osd1_width <= 128)
145 conv_lbuf_len = 32;
146 else if (priv->viu.osd1_width <= 256)
147 conv_lbuf_len = 64;
148 else if (priv->viu.osd1_width <= 512)
149 conv_lbuf_len = 128;
150 else if (priv->viu.osd1_width <= 1024)
151 conv_lbuf_len = 256;
152 else if (priv->viu.osd1_width <= 2048)
153 conv_lbuf_len = 512;
154 else
155 conv_lbuf_len = 1024;
156
157 writel_relaxed(conv_lbuf_len,
158 priv->io_base + _REG(OSD1_AFBCD_CONV_CTRL));
159
160 writel_relaxed(FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_BGN_H, 0) |
161 FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_END_H,
162
priv->viu.osd1_width - 1),
163 priv->io_base + _REG(OSD1_AFBCD_PIXEL_HSCOPE));
164
165 writel_relaxed(FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_BGN_V, 0) |
166 FIELD_PREP(OSD1_AFBCD_DEC_PIXEL_END_V,
167
priv->viu.osd1_height - 1),
168 priv->io_base + _REG(OSD1_AFBCD_PIXEL_VSCOPE));
169
170 return 0;
171 }
172
173 struct meson_afbcd_ops meson_afbcd_gxm_ops = {
174 .init = meson_gxm_afbcd_init,
175 .reset = meson_gxm_afbcd_reset,
176 .enable = meson_gxm_afbcd_enable,
177 .disable = meson_gxm_afbcd_disable,
178 .setup = meson_gxm_afbcd_setup,
179 .supported_fmt = meson_gxm_afbcd_supported_fmt,
180 };
181
182 /* ARM AFBC Decoder for G12A Family */
183
184 /* Amlogic G12A Mali AFBC Decoder supported formats */
185 enum {
186 MAFBC_FMT_RGB565 = 0,
187 MAFBC_FMT_RGBA5551,
188 MAFBC_FMT_RGBA1010102,
189 MAFBC_FMT_YUV420_10B,
190 MAFBC_FMT_RGB888,
191 MAFBC_FMT_RGBA8888,
192 MAFBC_FMT_RGBA4444,
193 MAFBC_FMT_R8,
194 MAFBC_FMT_RG88,
195 MAFBC_FMT_YUV420_8B,
196 MAFBC_FMT_YUV422_8B = 11,
197 MAFBC_FMT_YUV422_10B = 14,
198 };
199
200 static int meson_g12a_afbcd_pixel_fmt(u64 modifier, uint32_t format)
201 {
202 switch (format) {
203 case DRM_FORMAT_XRGB8888:
204 case DRM_FORMAT_ARGB8888:
205 /* YTR is forbidden for non XBGR formats */
206 if (modifier & AFBC_FORMAT_MOD_YTR)
207 return -EINVAL;
208 /* fall through */
209 case DRM_FORMAT_XBGR8888:
210 case DRM_FORMAT_ABGR8888:
211 return MAFBC_FMT_RGBA8888;
212 case DRM_FORMAT_RGB888:
213 /* YTR is forbidden for non XBGR formats */
214 if (modifier & AFBC_FORMAT_MOD_YTR)
215 return -EINVAL;
216 return MAFBC_FMT_RGB888;
217 case DRM_FORMAT_RGB565:
218 /* YTR is forbidden for non XBGR formats */
219 if (modifier & AFBC_FORMAT_MOD_YTR)
220 return -EINVAL;
221 return MAFBC_FMT_RGB565;
222 /* TOFIX support mode formats */
223 default:
224 DRM_DEBUG("unsupported afbc format[%08x]\n", format);
225 return -EINVAL;
226 }
227 }
228
229 static int meson_g12a_afbcd_bpp(uint32_t format)
230 {
231 switch (format) {
232 case DRM_FORMAT_XRGB8888:
233 case DRM_FORMAT_ARGB8888:
234 case DRM_FORMAT_XBGR8888:
235 case DRM_FORMAT_ABGR8888:
236 return 32;
237 case DRM_FORMAT_RGB888:
238 return 24;
239 case DRM_FORMAT_RGB565:
240 return 16;
241 /* TOFIX support mode formats */
242 default:
243 DRM_ERROR("unsupported afbc format[%08x]\n", format);
244 return 0;
245 }
246 }
247
248 static int meson_g12a_afbcd_fmt_to_blk_mode(u64 modifier, uint32_t format)
249 {
250 switch (format) {
251 case DRM_FORMAT_XRGB8888:
252 case DRM_FORMAT_ARGB8888:
253 case DRM_FORMAT_XBGR8888:
254 case DRM_FORMAT_ABGR8888:
255 return OSD_MALI_COLOR_MODE_RGBA8888;
256 case
DRM_FORMAT_RGB888:
257 return OSD_MALI_COLOR_MODE_RGB888;
258 case
DRM_FORMAT_RGB565:
259 return OSD_MALI_COLOR_MODE_RGB565;
260 /* TOFIX
support mode formats */
261 default:
262 DRM_DEBUG("unsupported afbc format[%08x]\n", format);
263 return -EINVAL;
264 }
265 }
266
267 static bool meson_g12a_afbcd_supported_fmt(u64 modifier, uint32_t format)
268 {
269 return meson_g12a_afbcd_pixel_fmt(modifier, format) >= 0;
270 }
271
272 static int meson_g12a_afbcd_init(struct meson_drm *priv)
273 {
274 int ret;
275
276 ret = meson_rdma_init(priv);
277 if (ret)
278 return ret;
279
280 meson_rdma_setup(priv);
281
282 /* Handle AFBC Decoder reset manually */
283 writel_bits_relaxed(MALI_AFBCD_MANUAL_RESET,
MALI_AFBCD_MANUAL_RESET,
284 priv->io_base +
_REG(MALI_AFBCD_TOP_CTRL));
285
286 return 0;
287 }
288
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org