5:23 p.m.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git for-next
head: 4a3a37331248d85df9e05e9b1d8210dc5ec81f4e
commit: 4a3a37331248d85df9e05e9b1d8210dc5ec81f4e [13/13] riscv: Add support to determine
no. of L2 cache way enabled
config: riscv-allyesconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 4a3a37331248d85df9e05e9b1d8210dc5ec81f4e
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=riscv
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
drivers/soc/sifive/sifive_l2_cache.c: In function 'l2_write':
drivers/soc/sifive/sifive_l2_cache.c:54:11: warning: comparison of unsigned expression
>= 0 is always true [-Wtype-limits]
54 | if ((val >= 0 && val < 0xFF) || (val >= 0x10000 && val <
0x100FF))
| ^~
drivers/soc/sifive/sifive_l2_cache.c: At top level:
> drivers/soc/sifive/sifive_l2_cache.c:136:31: warning: no previous
prototype for 'l2_get_priv_group' [-Wmissing-prototypes]
136 | const struct
attribute_group *l2_get_priv_group(struct cacheinfo *this_leaf)
| ^~~~~~~~~~~~~~~~~
vim +/l2_get_priv_group +136 drivers/soc/sifive/sifive_l2_cache.c
46
47 static ssize_t l2_write(struct file *file, const char __user *data,
48 size_t count, loff_t *ppos)
49 {
50 unsigned int val;
51
52 if (kstrtouint_from_user(data, count, 0, &val))
53 return -EINVAL;
54 if ((val >= 0 && val < 0xFF) || (val >= 0x10000
&& val < 0x100FF))
55 writel(val, l2_base +
SIFIVE_L2_ECCINJECTERR);
56 else
57 return -EINVAL;
58 return count;
59 }
60
61 static const struct file_operations l2_fops = {
62 .owner = THIS_MODULE,
63 .open = simple_open,
64 .write = l2_write
65 };
66
67 static void setup_sifive_debug(void)
68 {
69 sifive_test = debugfs_create_dir("sifive_l2_cache", NULL);
70
71 debugfs_create_file("sifive_debug_inject_error", 0200,
72 sifive_test, NULL, &l2_fops);
73 }
74 #endif
75
76 static void l2_config_read(void)
77 {
78 u32 regval, val;
79
80 regval = readl(l2_base + SIFIVE_L2_CONFIG);
81 val = regval & 0xFF;
82 pr_info("L2CACHE: No. of Banks in the cache: %d\n", val);
83 val = (regval & 0xFF00) >> 8;
84 pr_info("L2CACHE: No. of ways per bank: %d\n", val);
85 val = (regval & 0xFF0000) >> 16;
86 pr_info("L2CACHE: Sets per bank: %llu\n", (uint64_t)1 << val);
87 val = (regval & 0xFF000000) >> 24;
88 pr_info("L2CACHE: Bytes per cache block: %llu\n", (uint64_t)1 <<
val);
89
90 regval = readl(l2_base + SIFIVE_L2_WAYENABLE);
91 pr_info("L2CACHE: Index of the largest way enabled: %d\n", regval);
92 }
93
94 static const struct of_device_id sifive_l2_ids[] = {
95 { .compatible = "sifive,fu540-c000-ccache" },
96 { /* end of table */ },
97 };
98
99 static ATOMIC_NOTIFIER_HEAD(l2_err_chain);
100
101 int register_sifive_l2_error_notifier(struct notifier_block *nb)
102 {
103 return atomic_notifier_chain_register(&l2_err_chain, nb);
104 }
105 EXPORT_SYMBOL_GPL(register_sifive_l2_error_notifier);
106
107 int unregister_sifive_l2_error_notifier(struct notifier_block *nb)
108 {
109 return atomic_notifier_chain_unregister(&l2_err_chain, nb);
110 }
111 EXPORT_SYMBOL_GPL(unregister_sifive_l2_error_notifier);
112
113 static int l2_largest_wayenabled(void)
114 {
115 return readl(l2_base + SIFIVE_L2_WAYENABLE) & 0xFF;
116 }
117
118 static ssize_t number_of_ways_enabled_show(struct device *dev,
119 struct device_attribute *attr,
120 char *buf)
121 {
122 return sprintf(buf, "%u\n", l2_largest_wayenabled());
123 }
124
125 static DEVICE_ATTR_RO(number_of_ways_enabled);
126
127 static struct attribute *priv_attrs[] = {
128 &dev_attr_number_of_ways_enabled.attr,
129 NULL,
130 };
131
132 static const struct attribute_group priv_attr_group = {
133 .attrs = priv_attrs,
134 };
135
136 const struct attribute_group *l2_get_priv_group(struct cacheinfo
*this_leaf)
137 {
138 /* We want to use private group for L2 cache only */
139 if (this_leaf->level == 2)
140 return &priv_attr_group;
141 else
142 return NULL;
143 }
144
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org