9:38 p.m.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: 9f24705effef8c3b9eca00d70594ef7e0364a6da
commit: 81927e2808be5adace93c2012d45d6938d3a7aa0 [1446/3829] drm/amd/display: Support for
DMUB AUX
config: arc-allyesconfig (attached as .config)
compiler: arceb-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi...
git remote add linux-next
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
git fetch --no-tags linux-next master
git checkout 81927e2808be5adace93c2012d45d6938d3a7aa0
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
Note: the linux-next/master HEAD 9f24705effef8c3b9eca00d70594ef7e0364a6da builds fine.
It may have been fixed somewhere.
All errors (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function
'amdgpu_dm_initialize_drm_device':
>
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:3728:7: error: implicit
declaration of function 'register_outbox_irq_handlers'; did you mean
'register_hpd_handlers'? [-Werror=implicit-function-declaration]
3728 |
if (register_outbox_irq_handlers(dm->adev)) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| register_hpd_handlers
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function
'validate_overlay':
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:9983:26: warning: variable
'old_plane_state' set but not used [-Wunused-but-set-variable]
9983 | struct drm_plane_state *old_plane_state, *new_plane_state;
| ^~~~~~~~~~~~~~~
At top level:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:633:13: warning:
'dm_dmub_outbox1_low_irq' defined but not used [-Wunused-function]
633 | static void dm_dmub_outbox1_low_irq(void *interrupt_params)
| ^~~~~~~~~~~~~~~~~~~~~~~
In file included from include/linux/perf_event.h:25,
from include/linux/trace_events.h:10,
from include/trace/trace_events.h:21,
from include/trace/define_trace.h:102,
from
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_trace.h:645,
from drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:39:
arch/arc/include/asm/perf_event.h:126:23: warning: 'arc_pmu_cache_map' defined
but not used [-Wunused-const-variable=]
126 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
| ^~~~~~~~~~~~~~~~~
arch/arc/include/asm/perf_event.h:91:27: warning: 'arc_pmu_ev_hw_map' defined
but not used [-Wunused-const-variable=]
91 | static const char * const arc_pmu_ev_hw_map[] = {
| ^~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
vim +3728 drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c
3634
3635
3636 /*
3637 * In this architecture, the association
3638 * connector -> encoder -> crtc
3639 * id not really requried. The crtc and connector will hold the
3640 * display_index as an abstraction to use with DAL component
3641 *
3642 * Returns 0 on success
3643 */
3644 static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
3645 {
3646 struct amdgpu_display_manager *dm = &adev->dm;
3647 int32_t i;
3648 struct amdgpu_dm_connector *aconnector = NULL;
3649 struct amdgpu_encoder *aencoder = NULL;
3650 struct amdgpu_mode_info *mode_info = &adev->mode_info;
3651 uint32_t link_cnt;
3652 int32_t primary_planes;
3653 enum dc_connection_type new_connection_type = dc_connection_none;
3654 const struct dc_plane_cap *plane;
3655
3656 dm->display_indexes_num = dm->dc->caps.max_streams;
3657 /* Update the actual used number of crtc */
3658 adev->mode_info.num_crtc = adev->dm.display_indexes_num;
3659
3660 link_cnt = dm->dc->caps.max_links;
3661 if (amdgpu_dm_mode_config_init(dm->adev)) {
3662 DRM_ERROR("DM: Failed to initialize mode config\n");
3663 return -EINVAL;
3664 }
3665
3666 /* There is one primary plane per CRTC */
3667 primary_planes = dm->dc->caps.max_streams;
3668 ASSERT(primary_planes <= AMDGPU_MAX_PLANES);
3669
3670 /*
3671 * Initialize primary planes, implicit planes for legacy IOCTLS.
3672 * Order is reversed to match iteration order in atomic check.
3673 */
3674 for (i = (primary_planes - 1); i >= 0; i--) {
3675 plane = &dm->dc->caps.planes[i];
3676
3677 if (initialize_plane(dm, mode_info, i,
3678 DRM_PLANE_TYPE_PRIMARY, plane)) {
3679 DRM_ERROR("KMS: Failed to initialize primary plane\n");
3680 goto fail;
3681 }
3682 }
3683
3684 /*
3685 * Initialize overlay planes, index starting after primary planes.
3686 * These planes have a higher DRM index than the primary planes since
3687 * they should be considered as having a higher z-order.
3688 * Order is reversed to match iteration order in atomic check.
3689 *
3690 * Only support DCN for now, and only expose one so we don't encourage
3691 * userspace to use up all the pipes.
3692 */
3693 for (i = 0; i < dm->dc->caps.max_planes; ++i) {
3694 struct dc_plane_cap *plane = &dm->dc->caps.planes[i];
3695
3696 if (plane->type != DC_PLANE_TYPE_DCN_UNIVERSAL)
3697 continue;
3698
3699 if (!plane->blends_with_above || !plane->blends_with_below)
3700 continue;
3701
3702 if (!plane->pixel_format_support.argb8888)
3703 continue;
3704
3705 if (initialize_plane(dm, NULL, primary_planes + i,
3706 DRM_PLANE_TYPE_OVERLAY, plane)) {
3707 DRM_ERROR("KMS: Failed to initialize overlay plane\n");
3708 goto fail;
3709 }
3710
3711 /* Only create one overlay plane. */
3712 break;
3713 }
3714
3715 for (i = 0; i < dm->dc->caps.max_streams; i++)
3716 if (amdgpu_dm_crtc_init(dm, mode_info->planes[i], i)) {
3717 DRM_ERROR("KMS: Failed to initialize crtc\n");
3718 goto fail;
3719 }
3720
3721 /* Use Outbox interrupt */
3722 switch (adev->asic_type) {
3723 #if defined(CONFIG_DRM_AMD_DC_DCN3_0)
3724 case CHIP_SIENNA_CICHLID:
3725 case CHIP_NAVY_FLOUNDER:
3726 #endif
3727 case CHIP_RENOIR:
3728 if (register_outbox_irq_handlers(dm->adev)) {
3729 DRM_ERROR("DM: Failed to initialize IRQ\n");
3730 goto fail;
3731 }
3732 break;
3733 default:
3734 DRM_DEBUG_KMS("Unsupported ASIC type for outbox: 0x%X\n",
adev->asic_type);
3735 }
3736
3737 /* loops over all connectors on the board */
3738 for (i = 0; i < link_cnt; i++) {
3739 struct dc_link *link = NULL;
3740
3741 if (i > AMDGPU_DM_MAX_DISPLAY_INDEX) {
3742 DRM_ERROR(
3743 "KMS: Cannot support more than %d display indexes\n",
3744 AMDGPU_DM_MAX_DISPLAY_INDEX);
3745 continue;
3746 }
3747
3748 aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
3749 if (!aconnector)
3750 goto fail;
3751
3752 aencoder = kzalloc(sizeof(*aencoder), GFP_KERNEL);
3753 if (!aencoder)
3754 goto fail;
3755
3756 if (amdgpu_dm_encoder_init(dm->ddev, aencoder, i)) {
3757 DRM_ERROR("KMS: Failed to initialize encoder\n");
3758 goto fail;
3759 }
3760
3761 if (amdgpu_dm_connector_init(dm, aconnector, i, aencoder)) {
3762 DRM_ERROR("KMS: Failed to initialize connector\n");
3763 goto fail;
3764 }
3765
3766 link = dc_get_link_at_index(dm->dc, i);
3767
3768 if (!dc_link_detect_sink(link, &new_connection_type))
3769 DRM_ERROR("KMS: Failed to detect connector\n");
3770
3771 if (aconnector->base.force && new_connection_type ==
dc_connection_none) {
3772 emulated_link_detect(link);
3773 amdgpu_dm_update_connector_after_detect(aconnector);
3774
3775 } else if (dc_link_detect(link, DETECT_REASON_BOOT)) {
3776 amdgpu_dm_update_connector_after_detect(aconnector);
3777 register_backlight_device(dm, link);
3778 if (amdgpu_dc_feature_mask & DC_PSR_MASK)
3779 amdgpu_dm_set_psr_caps(link);
3780 }
3781
3782
3783 }
3784
3785 /* Software is initialized. Now we can register interrupt handlers. */
3786 switch (adev->asic_type) {
3787 #if defined(CONFIG_DRM_AMD_DC_SI)
3788 case CHIP_TAHITI:
3789 case CHIP_PITCAIRN:
3790 case CHIP_VERDE:
3791 case CHIP_OLAND:
3792 if (dce60_register_irq_handlers(dm->adev)) {
3793 DRM_ERROR("DM: Failed to initialize IRQ\n");
3794 goto fail;
3795 }
3796 break;
3797 #endif
3798 case CHIP_BONAIRE:
3799 case CHIP_HAWAII:
3800 case CHIP_KAVERI:
3801 case CHIP_KABINI:
3802 case CHIP_MULLINS:
3803 case CHIP_TONGA:
3804 case CHIP_FIJI:
3805 case CHIP_CARRIZO:
3806 case CHIP_STONEY:
3807 case CHIP_POLARIS11:
3808 case CHIP_POLARIS10:
3809 case CHIP_POLARIS12:
3810 case CHIP_VEGAM:
3811 case CHIP_VEGA10:
3812 case CHIP_VEGA12:
3813 case CHIP_VEGA20:
3814 if (dce110_register_irq_handlers(dm->adev)) {
3815 DRM_ERROR("DM: Failed to initialize IRQ\n");
3816 goto fail;
3817 }
3818 break;
3819 #if defined(CONFIG_DRM_AMD_DC_DCN)
3820 case CHIP_RAVEN:
3821 case CHIP_NAVI12:
3822 case CHIP_NAVI10:
3823 case CHIP_NAVI14:
3824 case CHIP_RENOIR:
3825 case CHIP_SIENNA_CICHLID:
3826 case CHIP_NAVY_FLOUNDER:
3827 case CHIP_DIMGREY_CAVEFISH:
3828 case CHIP_VANGOGH:
3829 if (dcn10_register_irq_handlers(dm->adev)) {
3830 DRM_ERROR("DM: Failed to initialize IRQ\n");
3831 goto fail;
3832 }
3833 break;
3834 #endif
3835 default:
3836 DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type);
3837 goto fail;
3838 }
3839
3840 return 0;
3841 fail:
3842 kfree(aencoder);
3843 kfree(aconnector);
3844
3845 return -EINVAL;
3846 }
3847
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org