[kbuild-all] [linux-next:master 831/2089] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1093:52: sparse: sparse: incorrect type in assignment (different base types)

tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 5fcb9628fd1227a5f11d87171cb1b8b5c414d9d9 commit: b455159c053130d0658e9e7f8cb61e9bf6603f22 [831/2089] drm/amdgpu/powerplay: add initial swSMU support for sienna_cichlid (v2) config: i386-randconfig-s001-20200617 (attached as .config) compiler: gcc-9 (Debian 9.3.0-13) 9.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.2-rc1-6-g78f577f8-dirty git checkout b455159c053130d0658e9e7f8cb61e9bf6603f22 # save the attached .config to linux build tree make W=1 C=1 ARCH=i386 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; sparse warnings: (new ones prefixed by >>) drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1097:52: sparse: got restricted __le16 [usertype] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1101:51: sparse: got restricted __le16 [usertype] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1105:51: sparse: got restricted __le16 [usertype] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1114:52: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short [usertype] MinClock @@ got restricted __le16 [usertype] @@ drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1114:52: sparse: expected unsigned short [usertype] MinClock drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1114:52: sparse: got restricted __le16 [usertype] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1118:52: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short [usertype] MaxClock @@ got restricted __le16 [usertype] @@ drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1118:52: sparse: expected unsigned short [usertype] MaxClock drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1118:52: sparse: got restricted __le16 [usertype] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1122:51: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short [usertype] MinUclk @@ got restricted __le16 [usertype] @@ drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1122:51: sparse: expected unsigned short [usertype] MinUclk drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1122:51: sparse: got restricted __le16 [usertype] drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1126:51: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned short [usertype] MaxUclk @@ got restricted __le16 [usertype] @@ drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1126:51: sparse: expected unsigned short [usertype] MaxUclk drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c:1126:51: sparse: got restricted __le16 [usertype] vim +1093 drivers/gpu/drm/amd/amdgpu/../powerplay/sienna_cichlid_ppt.c 1076 1077 static int sienna_cichlid_set_watermarks_table(struct smu_context *smu, 1078 void *watermarks, struct 1079 dm_pp_wm_sets_with_clock_ranges_soc15 1080 *clock_ranges) 1081 { 1082 int i; 1083 Watermarks_t *table = watermarks; 1084 1085 if (!table || !clock_ranges) 1086 return -EINVAL; 1087 1088 if (clock_ranges->num_wm_dmif_sets > 4 || 1089 clock_ranges->num_wm_mcif_sets > 4) 1090 return -EINVAL; 1091 1092 for (i = 0; i < clock_ranges->num_wm_dmif_sets; i++) { 1094 cpu_to_le16((uint16_t) 1095 (clock_ranges->wm_dmif_clocks_ranges[i].wm_min_dcfclk_clk_in_khz / 1096 1000)); 1098 cpu_to_le16((uint16_t) 1099 (clock_ranges->wm_dmif_clocks_ranges[i].wm_max_dcfclk_clk_in_khz / 1100 1000)); 1102 cpu_to_le16((uint16_t) 1103 (clock_ranges->wm_dmif_clocks_ranges[i].wm_min_mem_clk_in_khz / 1104 1000)); 1106 cpu_to_le16((uint16_t) 1107 (clock_ranges->wm_dmif_clocks_ranges[i].wm_max_mem_clk_in_khz / 1108 1000)); 1109 table->WatermarkRow[1][i].WmSetting = (uint8_t) 1110 clock_ranges->wm_dmif_clocks_ranges[i].wm_set_id; 1111 } 1112 1113 for (i = 0; i < clock_ranges->num_wm_mcif_sets; i++) { 1114 table->WatermarkRow[0][i].MinClock = 1115 cpu_to_le16((uint16_t) 1116 (clock_ranges->wm_mcif_clocks_ranges[i].wm_min_socclk_clk_in_khz / 1117 1000)); 1118 table->WatermarkRow[0][i].MaxClock = 1119 cpu_to_le16((uint16_t) 1120 (clock_ranges->wm_mcif_clocks_ranges[i].wm_max_socclk_clk_in_khz / 1121 1000)); 1122 table->WatermarkRow[0][i].MinUclk = 1123 cpu_to_le16((uint16_t) 1124 (clock_ranges->wm_mcif_clocks_ranges[i].wm_min_mem_clk_in_khz / 1125 1000)); 1126 table->WatermarkRow[0][i].MaxUclk = 1127 cpu_to_le16((uint16_t) 1128 (clock_ranges->wm_mcif_clocks_ranges[i].wm_max_mem_clk_in_khz / 1129 1000)); 1130 table->WatermarkRow[0][i].WmSetting = (uint8_t) 1131 clock_ranges->wm_mcif_clocks_ranges[i].wm_set_id; 1132 } 1133 1134 return 0; 1135 } 1136 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org