[kbuild-all] [linux-chenxing:mstar_v5_14_rebase 126/352] drivers/spi/spi-msc313-isp.c:303:13: warning: assignment discards 'const' qualifier from pointer target type

tree: git://github.com/linux-chenxing/linux.git mstar_v5_14_rebase head: 651efd0e52f225e60faa8b30f9768021e2104d3c commit: 6d6f48bcd3ec1e7fdc903a8a093da960b7b328b8 [126/352] ARM: mstar: msc313 bdma driver config: arm-allyesconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 10.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/linux-chenxing/linux/commit/6d6f48bcd3ec1e7fdc903a8a09... git remote add linux-chenxing git://github.com/linux-chenxing/linux.git git fetch --no-tags linux-chenxing mstar_v5_14_rebase git checkout 6d6f48bcd3ec1e7fdc903a8a093da960b7b328b8 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): drivers/spi/spi-msc313-isp.c: In function 'msc313_isp_setup': drivers/spi/spi-msc313-isp.c:173:21: warning: unused variable 'isp' [-Wunused-variable] 173 | struct msc313_isp *isp = spi_controller_get_devdata(spi->controller); | ^~~ drivers/spi/spi-msc313-isp.c: In function 'msc313_isp_spi_mem_dirmap_create': 303 | desc->priv = readmode; | ^ vim +/const +303 drivers/spi/spi-msc313-isp.c bbf791fd03997b Daniel Palmer 2020-06-13 170 bbf791fd03997b Daniel Palmer 2020-06-13 171 static int msc313_isp_setup(struct spi_device *spi) bbf791fd03997b Daniel Palmer 2020-06-13 172 { bbf791fd03997b Daniel Palmer 2020-06-13 @173 struct msc313_isp *isp = spi_controller_get_devdata(spi->controller); bbf791fd03997b Daniel Palmer 2020-06-13 174 bbf791fd03997b Daniel Palmer 2020-06-13 175 //clk_set_rate(isp->spi_div_clk, spi->max_speed_hz); bbf791fd03997b Daniel Palmer 2020-06-13 176 //clk_set_rate(isp->spi_clk, spi->max_speed_hz); bbf791fd03997b Daniel Palmer 2020-06-13 177 bbf791fd03997b Daniel Palmer 2020-06-13 178 return 0; bbf791fd03997b Daniel Palmer 2020-06-13 179 } bbf791fd03997b Daniel Palmer 2020-06-13 180 bbf791fd03997b Daniel Palmer 2020-06-13 181 static int msc313_isp_transfer_one(struct spi_controller *ctlr, struct spi_device *spi, bbf791fd03997b Daniel Palmer 2020-06-13 182 struct spi_transfer *transfer) bbf791fd03997b Daniel Palmer 2020-06-13 183 { bbf791fd03997b Daniel Palmer 2020-06-13 184 struct msc313_isp *isp = spi_controller_get_devdata(ctlr); bbf791fd03997b Daniel Palmer 2020-06-13 185 const u8 *tx_buf = transfer->tx_buf; bbf791fd03997b Daniel Palmer 2020-06-13 186 u8 *rx_buf = transfer->rx_buf; bbf791fd03997b Daniel Palmer 2020-06-13 187 unsigned b = 0; bbf791fd03997b Daniel Palmer 2020-06-13 188 bbf791fd03997b Daniel Palmer 2020-06-13 189 /* bbf791fd03997b Daniel Palmer 2020-06-13 190 * this only really works for SPI NOR <cs low><write something><read something><cs high> bbf791fd03997b Daniel Palmer 2020-06-13 191 * transactions bbf791fd03997b Daniel Palmer 2020-06-13 192 */ bbf791fd03997b Daniel Palmer 2020-06-13 193 bbf791fd03997b Daniel Palmer 2020-06-13 194 for(b = 0; b < transfer->len; b++) { bbf791fd03997b Daniel Palmer 2020-06-13 195 if (tx_buf) { bbf791fd03997b Daniel Palmer 2020-06-13 196 msc313_isp_spi_writebyte(isp, *tx_buf++); bbf791fd03997b Daniel Palmer 2020-06-13 197 /* we don't do full duplex, there should be no rx buffer */ bbf791fd03997b Daniel Palmer 2020-06-13 198 if(rx_buf){ bbf791fd03997b Daniel Palmer 2020-06-13 199 } bbf791fd03997b Daniel Palmer 2020-06-13 200 } bbf791fd03997b Daniel Palmer 2020-06-13 201 else if(rx_buf){ bbf791fd03997b Daniel Palmer 2020-06-13 202 msc313_isp_spi_readbyte(isp, rx_buf++); bbf791fd03997b Daniel Palmer 2020-06-13 203 } bbf791fd03997b Daniel Palmer 2020-06-13 204 } bbf791fd03997b Daniel Palmer 2020-06-13 205 bbf791fd03997b Daniel Palmer 2020-06-13 206 return 0; bbf791fd03997b Daniel Palmer 2020-06-13 207 } bbf791fd03997b Daniel Palmer 2020-06-13 208 bbf791fd03997b Daniel Palmer 2020-06-13 209 static void msc313_isp_set_cs(struct spi_device *spi, bool enable) bbf791fd03997b Daniel Palmer 2020-06-13 210 { bbf791fd03997b Daniel Palmer 2020-06-13 211 /* cs is asserted by the controller, we can only deassert it */ bbf791fd03997b Daniel Palmer 2020-06-13 212 struct msc313_isp *isp = spi_master_get_devdata(spi->master); bbf791fd03997b Daniel Palmer 2020-06-13 213 if(!enable) bbf791fd03997b Daniel Palmer 2020-06-13 214 msc313_isp_spi_clearcs(isp); bbf791fd03997b Daniel Palmer 2020-06-13 215 } bbf791fd03997b Daniel Palmer 2020-06-13 216 bbf791fd03997b Daniel Palmer 2020-06-13 217 static const struct msc313_qspi_readmode* msc313_isp_spi_mem_op_to_readmode(const struct spi_mem_op *op) bbf791fd03997b Daniel Palmer 2020-06-13 218 { bbf791fd03997b Daniel Palmer 2020-06-13 219 int i; bbf791fd03997b Daniel Palmer 2020-06-13 220 bbf791fd03997b Daniel Palmer 2020-06-13 221 /* bbf791fd03997b Daniel Palmer 2020-06-13 222 * The opcodes that the controller can execute are limited. bbf791fd03997b Daniel Palmer 2020-06-13 223 * Check that the requested opcode is one we can use. bbf791fd03997b Daniel Palmer 2020-06-13 224 */ bbf791fd03997b Daniel Palmer 2020-06-13 225 for (i = 0; i < ARRAY_SIZE(opcode_mapping); i++){ bbf791fd03997b Daniel Palmer 2020-06-13 226 if (opcode_mapping[i].opcode == op->cmd.opcode) bbf791fd03997b Daniel Palmer 2020-06-13 227 return &opcode_mapping[i]; bbf791fd03997b Daniel Palmer 2020-06-13 228 } bbf791fd03997b Daniel Palmer 2020-06-13 229 bbf791fd03997b Daniel Palmer 2020-06-13 230 return NULL; bbf791fd03997b Daniel Palmer 2020-06-13 231 } bbf791fd03997b Daniel Palmer 2020-06-13 232 bbf791fd03997b Daniel Palmer 2020-06-13 233 static bool msc313_isp_spi_mem_supports_op(struct spi_mem *mem, bbf791fd03997b Daniel Palmer 2020-06-13 234 const struct spi_mem_op *op) bbf791fd03997b Daniel Palmer 2020-06-13 235 { bbf791fd03997b Daniel Palmer 2020-06-13 236 /* Maybe we should filter commands qspi can't handle here? */ bbf791fd03997b Daniel Palmer 2020-06-13 237 #if 0 bbf791fd03997b Daniel Palmer 2020-06-13 238 if (!msc313_isp_spi_mem_op_to_readmode(op)){ bbf791fd03997b Daniel Palmer 2020-06-13 239 return false; bbf791fd03997b Daniel Palmer 2020-06-13 240 } bbf791fd03997b Daniel Palmer 2020-06-13 241 #endif bbf791fd03997b Daniel Palmer 2020-06-13 242 bbf791fd03997b Daniel Palmer 2020-06-13 243 return spi_mem_default_supports_op(mem, op); bbf791fd03997b Daniel Palmer 2020-06-13 244 } bbf791fd03997b Daniel Palmer 2020-06-13 245 bbf791fd03997b Daniel Palmer 2020-06-13 246 static int msc313_isp_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) bbf791fd03997b Daniel Palmer 2020-06-13 247 { bbf791fd03997b Daniel Palmer 2020-06-13 248 struct msc313_isp *isp = spi_controller_get_devdata(mem->spi->controller); bbf791fd03997b Daniel Palmer 2020-06-13 249 int i, ret = 0; bbf791fd03997b Daniel Palmer 2020-06-13 250 bbf791fd03997b Daniel Palmer 2020-06-13 251 if(op->cmd.opcode) bbf791fd03997b Daniel Palmer 2020-06-13 252 msc313_isp_spi_writebyte(isp, op->cmd.opcode); bbf791fd03997b Daniel Palmer 2020-06-13 253 if(op->addr.nbytes != 0) bbf791fd03997b Daniel Palmer 2020-06-13 254 for(i = op->addr.nbytes; i > 0; i--) bbf791fd03997b Daniel Palmer 2020-06-13 255 msc313_isp_spi_writebyte(isp, (op->addr.val >> (8 * (i - 1))) & 0xff); bbf791fd03997b Daniel Palmer 2020-06-13 256 if(op->dummy.nbytes != 0) bbf791fd03997b Daniel Palmer 2020-06-13 257 for(i = 0; i < op->dummy.nbytes; i++) bbf791fd03997b Daniel Palmer 2020-06-13 258 msc313_isp_spi_writebyte(isp, 0xff); bbf791fd03997b Daniel Palmer 2020-06-13 259 switch(op->data.dir){ bbf791fd03997b Daniel Palmer 2020-06-13 260 case SPI_MEM_DATA_IN: bbf791fd03997b Daniel Palmer 2020-06-13 261 for(i = 0; i < op->data.nbytes; i++) bbf791fd03997b Daniel Palmer 2020-06-13 262 msc313_isp_spi_readbyte(isp, ((u8*)(op->data.buf.in + i))); bbf791fd03997b Daniel Palmer 2020-06-13 263 break; bbf791fd03997b Daniel Palmer 2020-06-13 264 case SPI_MEM_DATA_OUT: bbf791fd03997b Daniel Palmer 2020-06-13 265 for(i = 0; i < op->data.nbytes; i++) bbf791fd03997b Daniel Palmer 2020-06-13 266 msc313_isp_spi_writebyte(isp, *((u8*)(op->data.buf.out + i))); bbf791fd03997b Daniel Palmer 2020-06-13 267 break; bbf791fd03997b Daniel Palmer 2020-06-13 268 case SPI_MEM_NO_DATA: bbf791fd03997b Daniel Palmer 2020-06-13 269 break; bbf791fd03997b Daniel Palmer 2020-06-13 270 } bbf791fd03997b Daniel Palmer 2020-06-13 271 bbf791fd03997b Daniel Palmer 2020-06-13 272 msc313_isp_spi_clearcs(isp); bbf791fd03997b Daniel Palmer 2020-06-13 273 return ret; bbf791fd03997b Daniel Palmer 2020-06-13 274 } bbf791fd03997b Daniel Palmer 2020-06-13 275 bbf791fd03997b Daniel Palmer 2020-06-13 276 static int msc313_isp_spi_mem_dirmap_create(struct spi_mem_dirmap_desc *desc) bbf791fd03997b Daniel Palmer 2020-06-13 277 { bbf791fd03997b Daniel Palmer 2020-06-13 278 const struct msc313_qspi_readmode *readmode = NULL; bbf791fd03997b Daniel Palmer 2020-06-13 279 struct spi_mem_op *tmpl = &desc->info.op_tmpl; bbf791fd03997b Daniel Palmer 2020-06-13 280 bbf791fd03997b Daniel Palmer 2020-06-13 281 /* bbf791fd03997b Daniel Palmer 2020-06-13 282 * The QSPI controller only supports reads, the FSP seems bbf791fd03997b Daniel Palmer 2020-06-13 283 * to be for writing. bbf791fd03997b Daniel Palmer 2020-06-13 284 */ bbf791fd03997b Daniel Palmer 2020-06-13 285 if (tmpl->data.dir != SPI_MEM_DATA_IN) bbf791fd03997b Daniel Palmer 2020-06-13 286 return -ENOTSUPP; bbf791fd03997b Daniel Palmer 2020-06-13 287 bbf791fd03997b Daniel Palmer 2020-06-13 288 /* bbf791fd03997b Daniel Palmer 2020-06-13 289 * We can only do 2 or 3 address bytes bbf791fd03997b Daniel Palmer 2020-06-13 290 */ bbf791fd03997b Daniel Palmer 2020-06-13 291 if ((tmpl->addr.nbytes != 2) && bbf791fd03997b Daniel Palmer 2020-06-13 292 (tmpl->addr.nbytes != 3)) bbf791fd03997b Daniel Palmer 2020-06-13 293 return -ENOTSUPP; bbf791fd03997b Daniel Palmer 2020-06-13 294 bbf791fd03997b Daniel Palmer 2020-06-13 295 bbf791fd03997b Daniel Palmer 2020-06-13 296 readmode = msc313_isp_spi_mem_op_to_readmode(&desc->info.op_tmpl); bbf791fd03997b Daniel Palmer 2020-06-13 297 if (!readmode){ bbf791fd03997b Daniel Palmer 2020-06-13 298 pr_info("Opcode %x isn't supported by QSPI\n", bbf791fd03997b Daniel Palmer 2020-06-13 299 (unsigned) desc->info.op_tmpl.cmd.opcode); bbf791fd03997b Daniel Palmer 2020-06-13 300 return -ENOTSUPP; bbf791fd03997b Daniel Palmer 2020-06-13 301 } bbf791fd03997b Daniel Palmer 2020-06-13 302 bbf791fd03997b Daniel Palmer 2020-06-13 @303 desc->priv = readmode; bbf791fd03997b Daniel Palmer 2020-06-13 304 bbf791fd03997b Daniel Palmer 2020-06-13 305 pr_info("Opcode %x \n", bbf791fd03997b Daniel Palmer 2020-06-13 306 (unsigned) readmode->opcode); bbf791fd03997b Daniel Palmer 2020-06-13 307 bbf791fd03997b Daniel Palmer 2020-06-13 308 desc->nodirmap = 0; bbf791fd03997b Daniel Palmer 2020-06-13 309 bbf791fd03997b Daniel Palmer 2020-06-13 310 return 0; bbf791fd03997b Daniel Palmer 2020-06-13 311 } bbf791fd03997b Daniel Palmer 2020-06-13 312 :::::: The code at line 303 was first introduced by commit :::::: bbf791fd03997b4f5f9fb5af63cc60be07b7bf40 MSC313e: spinor driver :::::: TO: Daniel Palmer <daniel(a)0x0f.com&gt; :::::: CC: Daniel Palmer <daniel(a)0x0f.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org