[kbuild-all] Re: [PATCH 2/2] clk: qcom: Add Global Clock Controller driver for QCM2290

Hi Shawn, I love your patch! Perhaps something to improve: [auto build test WARNING on clk/clk-next] [also build test WARNING on robh/for-next v5.15-rc1 next-20210914] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Shawn-Guo/Add-QCM2290-Global-Clo... base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: arm64-buildonly-randconfig-r004-20210914 (attached as .config) compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 261cbe98c38f8c1ee1a482fe76511110e790f58a) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://github.com/0day-ci/linux/commit/b510487ae2d062b96312e0947f3ed37b5... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Shawn-Guo/Add-QCM2290-Global-Clock-Controller-driver/20210914-112253 git checkout b510487ae2d062b96312e0947f3ed37b5faa79fc # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): static const struct parent_map gcc_parent_map_11[] = { ^ static const struct clk_parent_data gcc_parents_11[] = { ^ static const struct parent_map gcc_parent_map_15[] = { ^ static const struct clk_parent_data gcc_parents_15[] = { ^ static const struct parent_map gcc_parent_map_16[] = { ^ static const struct clk_parent_data gcc_parents_16[] = { ^ 6 warnings generated. vim +/gcc_parent_map_11 +623 drivers/clk/qcom/gcc-qcm2290.c 622 624 { P_BI_TCXO, 0 }, 625 { P_GPLL0_OUT_EARLY, 1 }, 626 { P_GPLL0_OUT_AUX2, 2 }, 627 { P_GPLL5_OUT_MAIN, 3 }, 628 { P_GPLL6_OUT_MAIN, 4 }, 629 { P_GPLL6_OUT_EARLY, 5 }, 630 { P_GPLL3_OUT_EARLY, 6 }, 631 }; 632 634 { .fw_name = "bi_tcxo" }, 635 { .hw = &gpll0.clkr.hw }, 636 { .hw = &gpll0_out_aux2.clkr.hw }, 637 { .hw = &gpll5.clkr.hw }, 638 { .hw = &gpll6_out_main.clkr.hw }, 639 { .hw = &gpll6.clkr.hw }, 640 { .hw = &gpll3.clkr.hw }, 641 }; 642 643 static const struct parent_map gcc_parent_map_12[] = { 644 { P_BI_TCXO, 0 }, 645 { P_GPLL0_OUT_EARLY, 1 }, 646 { P_GPLL0_OUT_AUX2, 2 }, 647 { P_GPLL7_OUT_MAIN, 3 }, 648 { P_GPLL4_OUT_MAIN, 5 }, 649 }; 650 651 static const struct clk_parent_data gcc_parents_12[] = { 652 { .fw_name = "bi_tcxo" }, 653 { .hw = &gpll0.clkr.hw }, 654 { .hw = &gpll0_out_aux2.clkr.hw }, 655 { .hw = &gpll7.clkr.hw }, 656 { .hw = &gpll4.clkr.hw }, 657 }; 658 659 static const struct parent_map gcc_parent_map_13[] = { 660 { P_BI_TCXO, 0 }, 661 { P_SLEEP_CLK, 5 }, 662 }; 663 664 static const struct clk_parent_data gcc_parents_13[] = { 665 { .fw_name = "bi_tcxo" }, 666 { .fw_name = "sleep_clk" }, 667 }; 668 669 static const struct parent_map gcc_parent_map_14[] = { 670 { P_BI_TCXO, 0 }, 671 { P_GPLL11_OUT_MAIN, 1 }, 672 { P_GPLL11_OUT_AUX, 2 }, 673 { P_GPLL11_OUT_AUX2, 3 }, 674 }; 675 676 static const struct clk_parent_data gcc_parents_14[] = { 677 { .fw_name = "bi_tcxo" }, 678 { .hw = &gpll11.clkr.hw }, 679 { .hw = &gpll11.clkr.hw }, 680 { .hw = &gpll11.clkr.hw }, 681 }; 682 684 { P_BI_TCXO, 0 }, 685 { P_GPLL0_OUT_EARLY, 1 }, 686 }; 687 689 { .fw_name = "bi_tcxo" }, 690 { .hw = &gpll0.clkr.hw }, 691 }; 692 694 { P_BI_TCXO, 0 }, 695 { P_GPLL0_OUT_EARLY, 1 }, 696 { P_GPLL6_OUT_MAIN, 4 }, 697 }; 698 700 { .fw_name = "bi_tcxo" }, 701 { .hw = &gpll0.clkr.hw }, 702 { .hw = &gpll6_out_main.clkr.hw }, 703 }; 704 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org