[kbuild-all] [linux-review:UPDATE-20200715-200047/Leo-Yan/arm64-perf-Proper-cap_user_time-support/20200715-100926 2/6] arch/arm64/kernel/perf_event.c:1181:8: error: implicit declaration of function 'sched_clock_read_begin'; did you mean

tree: https://github.com/0day-ci/linux/commits/UPDATE-20200715-200047/Leo-Yan/a... head: a959bcdf86a1be629d8a1eb641f37d37b4b4838d commit: 11c8d85d0bddffd23a4ebf6456aa8368fba3fff0 [2/6] arm64: perf: Implement correct cap_user_time config: arm64-allyesconfig (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 11c8d85d0bddffd23a4ebf6456aa8368fba3fff0 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All error/warnings (new ones prefixed by >>): arch/arm64/kernel/perf_event.c:138:41: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD' 138 | [C(L1D)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:84:45: warning: initialized field overwritten [-Woverride-init] 84 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR 0x41 | ^~~~ arch/arm64/kernel/perf_event.c:139:44: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR' 139 | [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:84:45: note: (near initialization for 'armv8_vulcan_perf_cache_map[0][1][0]') 84 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR 0x41 | ^~~~ arch/arm64/kernel/perf_event.c:139:44: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR' 139 | [C(L1D)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:86:51: warning: initialized field overwritten [-Woverride-init] 86 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR 0x43 | ^~~~ arch/arm64/kernel/perf_event.c:140:42: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR' 140 | [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:86:51: note: (near initialization for 'armv8_vulcan_perf_cache_map[0][1][1]') 86 | #define ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR 0x43 | ^~~~ arch/arm64/kernel/perf_event.c:140:42: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR' 140 | [C(L1D)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_CACHE_REFILL_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:95:44: warning: initialized field overwritten [-Woverride-init] 95 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x4E | ^~~~ arch/arm64/kernel/perf_event.c:142:44: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD' 142 | [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:95:44: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][0][0]') 95 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD 0x4E | ^~~~ arch/arm64/kernel/perf_event.c:142:44: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD' 142 | [C(DTLB)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:96:44: warning: initialized field overwritten [-Woverride-init] 96 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x4F | ^~~~ arch/arm64/kernel/perf_event.c:143:45: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR' 143 | [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:96:44: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][1][0]') 96 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR 0x4F | ^~~~ arch/arm64/kernel/perf_event.c:143:45: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR' 143 | [C(DTLB)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:93:50: warning: initialized field overwritten [-Woverride-init] 93 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x4C | ^~~~ arch/arm64/kernel/perf_event.c:144:42: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD' 144 | [C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:93:50: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][0][1]') 93 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD 0x4C | ^~~~ arch/arm64/kernel/perf_event.c:144:42: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD' 144 | [C(DTLB)][C(OP_READ)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:94:50: warning: initialized field overwritten [-Woverride-init] 94 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x4D | ^~~~ arch/arm64/kernel/perf_event.c:145:43: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR' 145 | [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:94:50: note: (near initialization for 'armv8_vulcan_perf_cache_map[3][1][1]') 94 | #define ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR 0x4D | ^~~~ arch/arm64/kernel/perf_event.c:145:43: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR' 145 | [C(DTLB)][C(OP_WRITE)][C(RESULT_MISS)] = ARMV8_IMPDEF_PERFCTR_L1D_TLB_REFILL_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:110:46: warning: initialized field overwritten [-Woverride-init] 110 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x60 | ^~~~ arch/arm64/kernel/perf_event.c:147:44: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD' 147 | [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:110:46: note: (near initialization for 'armv8_vulcan_perf_cache_map[6][0][0]') 110 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD 0x60 | ^~~~ arch/arm64/kernel/perf_event.c:147:44: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD' 147 | [C(NODE)][C(OP_READ)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_RD, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:111:46: warning: initialized field overwritten [-Woverride-init] 111 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x61 | ^~~~ arch/arm64/kernel/perf_event.c:148:45: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR' 148 | [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/include/asm/perf_event.h:111:46: note: (near initialization for 'armv8_vulcan_perf_cache_map[6][1][0]') 111 | #define ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR 0x61 | ^~~~ arch/arm64/kernel/perf_event.c:148:45: note: in expansion of macro 'ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR' 148 | [C(NODE)][C(OP_WRITE)][C(RESULT_ACCESS)] = ARMV8_IMPDEF_PERFCTR_BUS_ACCESS_WR, | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm64/kernel/perf_event.c: In function 'arch_perf_update_userpage': 1181 | rd = sched_clock_read_begin(&seq); | ^~~~~~~~~~~~~~~~~~~~~~ | sched_clock_register 1181 | rd = sched_clock_read_begin(&seq); | ^ 1183 | userpg->time_mult = rd->mult; | ^~ 1199 | } while (sched_clock_read_retry(seq)); | ^~~~~~~~~~~~~~~~~~~~~~ | sched_clock_register cc1: some warnings being treated as errors vim +1181 arch/arm64/kernel/perf_event.c 1165 1166 void arch_perf_update_userpage(struct perf_event *event, 1167 struct perf_event_mmap_page *userpg, u64 now) 1168 { 1169 struct clock_read_data *rd; 1170 unsigned int seq; 1171 u64 quot, rem, ns; 1172 1173 /* 1174 * Internal timekeeping for enabled/running/stopped times 1175 * is always computed with the sched_clock. 1176 */ 1177 userpg->cap_user_time = 1; 1178 userpg->cap_user_time_zero = 1; 1179 1180 do { 1182 1184 userpg->time_shift = rd->shift; 1185 userpg->time_zero = rd->epoch_ns; 1186 1187 /* 1188 * This isn't strictly correct, the ARM64 counter can be 1189 * 'short' and then we get funnies when it wraps. The correct 1190 * thing would be to extend the perf ABI with a cycle and mask 1191 * value, but because wrapping on ARM64 is very rare in 1192 * practise this 'works'. 1193 */ 1194 quot = rd->epoch_cyc >> rd->shift; 1195 rem = rd->epoch_cyc & (((u64)1 << rd->shift) - 1); 1196 ns = quot * rd->mult + ((rem * rd->mult) >> rd->shift); 1197 userpg->time_zero -= ns; 1198 1200 1201 userpg->time_offset = userpg->time_zero - now; 1202 1203 /* 1204 * time_shift is not expected to be greater than 31 due to 1205 * the original published conversion algorithm shifting a 1206 * 32-bit value (now specifies a 64-bit value) - refer 1207 * perf_event_mmap_page documentation in perf_event.h. 1208 */ 1209 if (userpg->time_shift == 32) { 1210 userpg->time_shift = 31; 1211 userpg->time_mult >>= 1; 1212 } 1213 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org