[kbuild-all] Re: [arm-platforms:timers/tval-ectomy 2/17] drivers/clocksource/arm_arch_timer.c:156:3: warning: variable 'val' is used uninitialized whenever switch default is taken

tree: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git timers/tval-ectomy head: c815d60a6292c90ea228c635b4150f022322908b commit: 9c6e4aa680ebd5ad816fc8f97858ec6057362c9e [2/17] clocksource/arm_arch_timer: Drop CNT*_TVAL read accessors config: arm64-randconfig-r026-20211010 (attached as .config) compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 30caca39f401ae17927439c0a0bd6d1b1916dd6a) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/com... git remote add arm-platforms https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git git fetch --no-tags arm-platforms timers/tval-ectomy git checkout 9c6e4aa680ebd5ad816fc8f97858ec6057362c9e # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt;

All warnings (new ones prefixed by >>): >> drivers/clocksource/arm_arch_timer.c:156:3: warning: variable 'val' >> is used uninitialized whenever switch default is taken >> [-Wsometimes-uninitialized] default: ^~~~~~~ drivers/clocksource/arm_arch_timer.c:163:9: note: uninitialized use occurs here return val; ^~~ drivers/clocksource/arm_arch_timer.c:147:3: warning: variable 'val' is used uninitialized whenever switch default is taken [-Wsometimes-uninitialized] default: ^~~~~~~ drivers/clocksource/arm_arch_timer.c:163:9: note: uninitialized use occurs here return val; ^~~ drivers/clocksource/arm_arch_timer.c:139:9: note: initialize the variable 'val' to silence this warning u32 val; ^ = 0 2 warnings generated. vim +/val +156 drivers/clocksource/arm_arch_timer.c f4e00a1a55c7f9 Marc Zyngier 2017-01-20 134 f4e00a1a55c7f9 Marc Zyngier 2017-01-20 135 static __always_inline f4e00a1a55c7f9 Marc Zyngier 2017-01-20 136 u32 arch_timer_reg_read(int access, enum arch_timer_reg reg, f4e00a1a55c7f9 Marc Zyngier 2017-01-20 137 struct clock_event_device *clk) f4e00a1a55c7f9 Marc Zyngier 2017-01-20 138 { f4e00a1a55c7f9 Marc Zyngier 2017-01-20 139 u32 val; f4e00a1a55c7f9 Marc Zyngier 2017-01-20 140 f4e00a1a55c7f9 Marc Zyngier 2017-01-20 141 if (access == ARCH_TIMER_MEM_PHYS_ACCESS) { f4e00a1a55c7f9 Marc Zyngier 2017-01-20 142 struct arch_timer *timer = to_arch_timer(clk); f4e00a1a55c7f9 Marc Zyngier 2017-01-20 143 switch (reg) { f4e00a1a55c7f9 Marc Zyngier 2017-01-20 144 case ARCH_TIMER_REG_CTRL: f4e00a1a55c7f9 Marc Zyngier 2017-01-20 145 val = readl_relaxed(timer->base + CNTP_CTL); f4e00a1a55c7f9 Marc Zyngier 2017-01-20 146 break; 0bc2c9327c236c Marc Zyngier 2021-09-20 147 default: 0bc2c9327c236c Marc Zyngier 2021-09-20 148 BUILD_BUG(); f4e00a1a55c7f9 Marc Zyngier 2017-01-20 149 } f4e00a1a55c7f9 Marc Zyngier 2017-01-20 150 } else if (access == ARCH_TIMER_MEM_VIRT_ACCESS) { f4e00a1a55c7f9 Marc Zyngier 2017-01-20 151 struct arch_timer *timer = to_arch_timer(clk); f4e00a1a55c7f9 Marc Zyngier 2017-01-20 152 switch (reg) { f4e00a1a55c7f9 Marc Zyngier 2017-01-20 153 case ARCH_TIMER_REG_CTRL: f4e00a1a55c7f9 Marc Zyngier 2017-01-20 154 val = readl_relaxed(timer->base + CNTV_CTL); f4e00a1a55c7f9 Marc Zyngier 2017-01-20 155 break; 0bc2c9327c236c Marc Zyngier 2021-09-20 @156 default: 0bc2c9327c236c Marc Zyngier 2021-09-20 157 BUILD_BUG();

f4e00a1a55c7f9 Marc Zyngier 2017-01-20 158 } f4e00a1a55c7f9 Marc Zyngier 2017-01-20 159 } else { f4e00a1a55c7f9 Marc Zyngier 2017-01-20 160 val = arch_timer_reg_read_cp15(access, reg); f4e00a1a55c7f9 Marc Zyngier 2017-01-20 161 } f4e00a1a55c7f9 Marc Zyngier 2017-01-20 162 f4e00a1a55c7f9 Marc Zyngier 2017-01-20 163 return val;

f4e00a1a55c7f9 Marc Zyngier 2017-01-20 164 } f4e00a1a55c7f9 Marc Zyngier 2017-01-20 165