[kbuild-all] [soc:socfpga/drivers-2 10/16] drivers/clk/socfpga/clk-gate.c:102:7: warning: cast to smaller integer type 'int' from 'void *'

Hi Krzysztof, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git socfpga/drivers-2 head: 38ad957b04c5c2c9effc6336365187dae1301051 commit: 552418658acd6302e971c7137cb7d3108e464829 [10/16] clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test) config: arm64-randconfig-r016-20210408 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 56ea2e2fdd691136d5e6631fa0e447173694b82c) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git/commit/?id=55... git remote add soc https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git git fetch --no-tags soc socfpga/drivers-2 git checkout 552418658acd6302e971c7137cb7d3108e464829 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET) ^~~~~~~~~~~~~~~~~~~~~~~~~ 1 warning generated. vim +102 drivers/clk/socfpga/clk-gate.c 97259e99bdc914 Steffen Trumtrar 2014-01-06 89 97259e99bdc914 Steffen Trumtrar 2014-01-06 90 static unsigned long socfpga_clk_recalc_rate(struct clk_hw *hwclk, 97259e99bdc914 Steffen Trumtrar 2014-01-06 91 unsigned long parent_rate) 97259e99bdc914 Steffen Trumtrar 2014-01-06 92 { 97259e99bdc914 Steffen Trumtrar 2014-01-06 93 struct socfpga_gate_clk *socfpgaclk = to_socfpga_gate_clk(hwclk); 97259e99bdc914 Steffen Trumtrar 2014-01-06 94 u32 div = 1, val; 97259e99bdc914 Steffen Trumtrar 2014-01-06 95 97259e99bdc914 Steffen Trumtrar 2014-01-06 96 if (socfpgaclk->fixed_div) 97259e99bdc914 Steffen Trumtrar 2014-01-06 97 div = socfpgaclk->fixed_div; 97259e99bdc914 Steffen Trumtrar 2014-01-06 98 else if (socfpgaclk->div_reg) { 97259e99bdc914 Steffen Trumtrar 2014-01-06 99 val = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; 25d4d341d31b34 Andy Shevchenko 2015-07-13 100 val &= GENMASK(socfpgaclk->width - 1, 0); 97259e99bdc914 Steffen Trumtrar 2014-01-06 101 /* Check for GPIO_DB_CLK by its offset */ 97259e99bdc914 Steffen Trumtrar 2014-01-06 @102 if ((int) socfpgaclk->div_reg & SOCFPGA_GPIO_DB_CLK_OFFSET) 97259e99bdc914 Steffen Trumtrar 2014-01-06 103 div = val + 1; 97259e99bdc914 Steffen Trumtrar 2014-01-06 104 else 97259e99bdc914 Steffen Trumtrar 2014-01-06 105 div = (1 << val); 97259e99bdc914 Steffen Trumtrar 2014-01-06 106 } 97259e99bdc914 Steffen Trumtrar 2014-01-06 107 97259e99bdc914 Steffen Trumtrar 2014-01-06 108 return parent_rate / div; 97259e99bdc914 Steffen Trumtrar 2014-01-06 109 } 97259e99bdc914 Steffen Trumtrar 2014-01-06 110 :::::: The code at line 102 was first introduced by commit :::::: 97259e99bdc9144d071815536f1dbc2e41c6b5a8 clk: socfpga: split clk code :::::: TO: Steffen Trumtrar <s.trumtrar(a)pengutronix.de&gt; :::::: CC: Mike Turquette <mturquette(a)linaro.org&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org