1:53 a.m.
Hi Linus,
I love your patch! Yet something to improve:
[auto build test ERROR on gpio/for-next]
[also build test ERROR on v5.8-rc5 next-20200717]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Linus-Walleij/gpio-crystalcove-U...
base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio.git for-next
config: ia64-allyesconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=ia64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
drivers/gpio/gpio-crystalcove.c: In function 'crystalcove_gpio_probe':
> drivers/gpio/gpio-crystalcove.c:357:10: error: 'ch'
undeclared (first use in this function); did you mean 'cg'?
357 | girq
= &ch->chip.irq;
| ^~
| cg
drivers/gpio/gpio-crystalcove.c:357:10: note: each undeclared identifier is reported
only once for each function it appears in
vim +357 drivers/gpio/gpio-crystalcove.c
325
326 static int crystalcove_gpio_probe(struct platform_device *pdev)
327 {
328 int irq = platform_get_irq(pdev, 0);
329 struct crystalcove_gpio *cg;
330 int retval;
331 struct device *dev = pdev->dev.parent;
332 struct intel_soc_pmic *pmic = dev_get_drvdata(dev);
333 struct gpio_irq_chip *girq;
334
335 if (irq < 0)
336 return irq;
337
338 cg = devm_kzalloc(&pdev->dev, sizeof(*cg), GFP_KERNEL);
339 if (!cg)
340 return -ENOMEM;
341
342 platform_set_drvdata(pdev, cg);
343
344 mutex_init(&cg->buslock);
345 cg->chip.label = KBUILD_MODNAME;
346 cg->chip.direction_input = crystalcove_gpio_dir_in;
347 cg->chip.direction_output = crystalcove_gpio_dir_out;
348 cg->chip.get = crystalcove_gpio_get;
349 cg->chip.set = crystalcove_gpio_set;
350 cg->chip.base = -1;
351 cg->chip.ngpio = CRYSTALCOVE_VGPIO_NUM;
352 cg->chip.can_sleep = true;
353 cg->chip.parent = dev;
354 cg->chip.dbg_show = crystalcove_gpio_dbg_show;
355 cg->regmap = pmic->regmap;
356
357 girq = &ch->chip.irq;
358 girq->chip =
&crystalcove_irqchip;
359 /* This will let us handle the parent IRQ in the driver */
360 girq->parent_handler = NULL;
361 girq->num_parents = 0;
362 girq->parents = NULL;
363 girq->default_type = IRQ_TYPE_NONE;
364 girq->handler = handle_simple_irq;
365 girq->threaded = true;
366
367 retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler,
368 IRQF_ONESHOT, KBUILD_MODNAME, cg);
369
370 if (retval) {
371 dev_warn(&pdev->dev, "request irq failed: %d\n", retval);
372 return retval;
373 }
374
375 retval = devm_gpiochip_add_data(&pdev->dev, &cg->chip, cg);
376 if (retval) {
377 dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
378 return retval;
379 }
380
381 return 0;
382 }
383
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org