5:46 a.m.
Hi Pratyush,
FYI, the error/warning still remains.
tree: git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git ti-linux-5.4.y
head: ca222ae72ea37d74141ed53deaa0a07263ef34e8
commit: 6f9db649f76819bbe6b9ee1a7758717d0f2e01ee [9094/13425] HACK: mtd: spi-nor: Look for
PHY pattern partition
config: x86_64-randconfig-a013-20210323 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
78a65cd945d006ff02f9d24d9cc20a302ed93b08)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git remote add ti git://git.ti.com/ti-linux-kernel/ti-linux-kernel.git
git fetch --no-tags ti ti-linux-5.4.y
git checkout 6f9db649f76819bbe6b9ee1a7758717d0f2e01ee
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
> drivers/mtd/spi-nor/spi-nor.c:5721:18: error: implicit
declaration of function 'of_read_number' [-Werror,-Wimplicit-function-declaration]
op.addr.val = of_read_number(reg, a_cells);
^
1 error generated.
vim +/of_read_number +5721 drivers/mtd/spi-nor/spi-nor.c
5556
5557 int spi_nor_scan(struct spi_nor *nor, const char *name,
5558 const struct spi_nor_hwcaps *hwcaps)
5559 {
5560 const struct flash_info *info;
5561 struct device *dev = nor->dev;
5562 struct mtd_info *mtd = &nor->mtd;
5563 struct device_node *np = spi_nor_get_flash_node(nor);
5564 struct device_node *child;
5565 struct spi_nor_flash_parameter *params = &nor->params;
5566 struct spi_mem_op op;
5567 int ret;
5568 int i;
5569
5570 ret = spi_nor_check(nor);
5571 if (ret)
5572 return ret;
5573
5574 /* Reset SPI protocol for all commands. */
5575 nor->reg_proto = SNOR_PROTO_1_1_1;
5576 nor->read_proto = SNOR_PROTO_1_1_1;
5577 nor->write_proto = SNOR_PROTO_1_1_1;
5578
5579 /*
5580 * We need the bounce buffer early to read/write registers when going
5581 * through the spi-mem layer (buffers have to be DMA-able).
5582 * For spi-mem drivers, we'll reallocate a new buffer if
5583 * nor->page_size turns out to be greater than PAGE_SIZE (which
5584 * shouldn't happen before long since NOR pages are usually less
5585 * than 1KB) after spi_nor_scan() returns.
5586 */
5587 nor->bouncebuf_size = PAGE_SIZE;
5588 nor->bouncebuf = devm_kmalloc(dev, nor->bouncebuf_size,
5589 GFP_KERNEL);
5590 if (!nor->bouncebuf)
5591 return -ENOMEM;
5592
5593 info = spi_nor_get_flash_info(nor, name);
5594 if (IS_ERR(info))
5595 return PTR_ERR(info);
5596
5597 nor->info = info;
5598
5599 spi_nor_debugfs_init(nor, info);
5600
5601 mutex_init(&nor->lock);
5602
5603 /*
5604 * Make sure the XSR_RDY flag is set before calling
5605 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
5606 * with Atmel spi-nor
5607 */
5608 if (info->flags & SPI_NOR_XSR_RDY)
5609 nor->flags |= SNOR_F_READY_XSR_RDY;
5610
5611 if (info->flags & SPI_NOR_HAS_LOCK)
5612 nor->flags |= SNOR_F_HAS_LOCK;
5613
5614 /*
5615 * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
5616 * with the software protection bits set.
5617 */
5618 if (JEDEC_MFR(nor->info) == SNOR_MFR_ATMEL ||
5619 JEDEC_MFR(nor->info) == SNOR_MFR_INTEL ||
5620 JEDEC_MFR(nor->info) == SNOR_MFR_SST ||
5621 nor->info->flags & SPI_NOR_HAS_LOCK)
5622 nor->clear_sr_bp = spi_nor_clear_sr_bp;
5623
5624 /* Init flash parameters based on flash_info struct and SFDP */
5625 spi_nor_init_params(nor);
5626
5627 if (!mtd->name)
5628 mtd->name = dev_name(dev);
5629 mtd->priv = nor;
5630 mtd->type = MTD_NORFLASH;
5631 mtd->writesize = 1;
5632 mtd->flags = MTD_CAP_NORFLASH;
5633 mtd->size = params->size;
5634 mtd->_erase = spi_nor_erase;
5635 mtd->_read = spi_nor_read;
5636 mtd->_suspend = spi_nor_suspend;
5637 mtd->_resume = spi_nor_resume;
5638
5639 if (nor->params.locking_ops) {
5640 mtd->_lock = spi_nor_lock;
5641 mtd->_unlock = spi_nor_unlock;
5642 mtd->_is_locked = spi_nor_is_locked;
5643 }
5644
5645 /* sst nor chips use AAI word program */
5646 if (info->flags & SST_WRITE)
5647 mtd->_write = sst_write;
5648 else
5649 mtd->_write = spi_nor_write;
5650
5651 if (info->flags & USE_FSR)
5652 nor->flags |= SNOR_F_USE_FSR;
5653 if (info->flags & SPI_NOR_HAS_TB)
5654 nor->flags |= SNOR_F_HAS_SR_TB;
5655 if (info->flags & NO_CHIP_ERASE)
5656 nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
5657 if (info->flags & USE_CLSR)
5658 nor->flags |= SNOR_F_USE_CLSR;
5659
5660 if (info->flags & SPI_NOR_NO_ERASE)
5661 mtd->flags |= MTD_NO_ERASE;
5662
5663 mtd->dev.parent = dev;
5664 nor->page_size = params->page_size;
5665 mtd->writebufsize = nor->page_size;
5666
5667 if (of_property_read_bool(np, "broken-flash-reset"))
5668 nor->flags |= SNOR_F_BROKEN_RESET;
5669
5670 /*
5671 * Configure the SPI memory:
5672 * - select op codes for (Fast) Read, Page Program and Sector Erase.
5673 * - set the number of dummy cycles (mode cycles + wait states).
5674 * - set the SPI protocols for register and memory accesses.
5675 */
5676 ret = spi_nor_setup(nor, hwcaps);
5677 if (ret)
5678 return ret;
5679
5680 if (info->flags & SPI_NOR_4B_OPCODES)
5681 nor->flags |= SNOR_F_4B_OPCODES;
5682
5683 ret = spi_nor_set_addr_width(nor);
5684 if (ret)
5685 return ret;
5686
5687 /* Send all the required SPI flash commands to initialize device */
5688 ret = spi_nor_init(nor);
5689 if (ret)
5690 return ret;
5691
5692 /*
5693 * Find out if a PHY pattern partition is present.
5694 *
5695 * TODO: Teach the mtd core to find the partition for us so we don't
5696 * have to repeat the parsing logic here that mtd already has.
5697 */
5698 child = NULL;
5699 do {
5700 int len;
5701 char *label = NULL;
5702
5703 child = of_get_next_child(np, child);
5704 if (child)
5705 label = (char *)of_get_property(child, "label", &len);
5706
5707 if (label && !strcmp(label, "ospi.phypattern")) {
5708 const __be32 *reg;
5709 int a_cells, s_cells;
5710
5711 reg = of_get_property(child, "reg", &len);
5712 if (!reg)
5713 continue;
5714
5715 a_cells = of_n_addr_cells(child);
5716 s_cells = of_n_size_cells(child);
5717 if (len / 4 != a_cells + s_cells)
5718 continue;
5719
5720 op = spi_nor_spimem_read_op(nor);
5721 op.addr.val = of_read_number(reg, a_cells);
5722 spi_mem_set_calibration_read_op(nor->spimem, &op);
5723 break;
5724 }
5725 } while (child);
5726
5727 dev_info(dev, "%s (%lld Kbytes)\n", info->name,
5728 (long long)mtd->size >> 10);
5729
5730 dev_dbg(dev,
5731 "mtd .name = %s, .size = 0x%llx (%lldMiB), "
5732 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
5733 mtd->name, (long long)mtd->size, (long long)(mtd->size >> 20),
5734 mtd->erasesize, mtd->erasesize / 1024, mtd->numeraseregions);
5735
5736 if (mtd->numeraseregions)
5737 for (i = 0; i < mtd->numeraseregions; i++)
5738 dev_dbg(dev,
5739 "mtd.eraseregions[%d] = { .offset = 0x%llx, "
5740 ".erasesize = 0x%.8x (%uKiB), "
5741 ".numblocks = %d }\n",
5742 i, (long long)mtd->eraseregions[i].offset,
5743 mtd->eraseregions[i].erasesize,
5744 mtd->eraseregions[i].erasesize / 1024,
5745 mtd->eraseregions[i].numblocks);
5746 return 0;
5747 }
5748 EXPORT_SYMBOL_GPL(spi_nor_scan);
5749
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org