[kbuild-all] drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:64:3: error: implicit declaration of function 'enable_kernel_vsx'; did you mean

tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 42f82040ee66db13525dc6f14b8559890b2f4c1c commit: 16a9dea110a67d62401ffeac4828cabdedec7548 amdgpu: Enable initial DCN support on POWER date: 7 months ago config: powerpc64-randconfig-r016-20200710 (attached as .config) compiler: powerpc64le-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 16a9dea110a67d62401ffeac4828cabdedec7548 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=powerpc64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, from drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:27: drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c: In function 'dcn_bw_apply_registry_override': 64 | enable_kernel_vsx(); \ | ^~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:626:2: note: in expansion of macro 'DC_FP_START' 626 | DC_FP_START(); | ^~~~~~~~~~~ 67 | enable_kernel_altivec(); \ | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:626:2: note: in expansion of macro 'DC_FP_START' 626 | DC_FP_START(); | ^~~~~~~~~~~ 75 | disable_kernel_vsx(); \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:662:2: note: in expansion of macro 'DC_FP_END' 662 | DC_FP_END(); | ^~~~~~~~~ 78 | disable_kernel_altivec(); \ | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:662:2: note: in expansion of macro 'DC_FP_END' 662 | DC_FP_END(); | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c: At top level: drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:706:14: warning: no previous prototype for 'get_highest_allowed_voltage_level' [-Wmissing-prototypes] 706 | unsigned int get_highest_allowed_voltage_level(uint32_t hw_internal_rev) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:32: drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=] 124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa"; | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=] 122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=] 120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, from drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:27: drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=] 76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL }; | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=] 75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL }; | ^~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=] 74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL }; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=] 73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL }; | ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=] 72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL }; | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=] 67 | static const struct fixed31_32 dc_fixpt_zero = { 0 }; | ^~~~~~~~~~~~~ cc1: some warnings being treated as errors -- 852 | DSC_REG_LIST_SH_MASK_DCN20(__SHIFT) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:50949:111: warning: initialized field overwritten [-Woverride-init] 50949 | #define DSCCIF0_DSCCIF_CONFIG1__PIC_WIDTH_MASK 0x0000FFFFL | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:88:16: note: in expansion of macro 'DSCCIF0_DSCCIF_CONFIG1__PIC_WIDTH_MASK' 88 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:262:2: note: in expansion of macro 'DSC_SF' 262 | DSC_SF(DSCCIF0_DSCCIF_CONFIG1, PIC_WIDTH, mask_sh), \ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:856:2: note: in expansion of macro 'DSC_REG_LIST_SH_MASK_DCN20' 856 | DSC_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:50949:111: note: (near initialization for 'dsc_mask.PIC_WIDTH') 50949 | #define DSCCIF0_DSCCIF_CONFIG1__PIC_WIDTH_MASK 0x0000FFFFL | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:88:16: note: in expansion of macro 'DSCCIF0_DSCCIF_CONFIG1__PIC_WIDTH_MASK' 88 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:262:2: note: in expansion of macro 'DSC_SF' 262 | DSC_SF(DSCCIF0_DSCCIF_CONFIG1, PIC_WIDTH, mask_sh), \ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:856:2: note: in expansion of macro 'DSC_REG_LIST_SH_MASK_DCN20' 856 | DSC_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:50950:111: warning: initialized field overwritten [-Woverride-init] 50950 | #define DSCCIF0_DSCCIF_CONFIG1__PIC_HEIGHT_MASK 0xFFFF0000L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:88:16: note: in expansion of macro 'DSCCIF0_DSCCIF_CONFIG1__PIC_HEIGHT_MASK' 88 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:263:2: note: in expansion of macro 'DSC_SF' 263 | DSC_SF(DSCCIF0_DSCCIF_CONFIG1, PIC_HEIGHT, mask_sh), \ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:856:2: note: in expansion of macro 'DSC_REG_LIST_SH_MASK_DCN20' 856 | DSC_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_0_0_sh_mask.h:50950:111: note: (near initialization for 'dsc_mask.PIC_HEIGHT') 50950 | #define DSCCIF0_DSCCIF_CONFIG1__PIC_HEIGHT_MASK 0xFFFF0000L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:88:16: note: in expansion of macro 'DSCCIF0_DSCCIF_CONFIG1__PIC_HEIGHT_MASK' 88 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dsc.h:263:2: note: in expansion of macro 'DSC_SF' 263 | DSC_SF(DSCCIF0_DSCCIF_CONFIG1, PIC_HEIGHT, mask_sh), \ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:856:2: note: in expansion of macro 'DSC_REG_LIST_SH_MASK_DCN20' 856 | DSC_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1168:22: warning: no previous prototype for 'dcn20_clock_source_create' [-Wmissing-prototypes] 1168 | struct clock_source *dcn20_clock_source_create( | ^~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:65: drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: warning: initialized field overwritten [-Woverride-init] 269 | #define DCN_BASE__INST0_SEG2 0x000034C0 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:372:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2' 372 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:374:19: note: in expansion of macro 'BASE_INNER' 374 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:377:15: note: in expansion of macro 'BASE' 377 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:157:2: note: in expansion of macro 'SR' 157 | SR(DCFCLK_CNTL), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:214:2: note: in expansion of macro 'HWSEQ_DCN_REG_LIST' 214 | HWSEQ_DCN_REG_LIST(), \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1230:3: note: in expansion of macro 'HWSEQ_DCN2_REG_LIST' 1230 | HWSEQ_DCN2_REG_LIST() | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:269:52: note: (near initialization for 'hwseq_reg.DCFCLK_CNTL') 269 | #define DCN_BASE__INST0_SEG2 0x000034C0 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:372:25: note: in expansion of macro 'DCN_BASE__INST0_SEG2' 372 | #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:374:19: note: in expansion of macro 'BASE_INNER' 374 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:377:15: note: in expansion of macro 'BASE' 377 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:157:2: note: in expansion of macro 'SR' 157 | SR(DCFCLK_CNTL), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:214:2: note: in expansion of macro 'HWSEQ_DCN_REG_LIST' 214 | HWSEQ_DCN_REG_LIST(), \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1230:3: note: in expansion of macro 'HWSEQ_DCN2_REG_LIST' 1230 | HWSEQ_DCN2_REG_LIST() | ^~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:29: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c: In function 'dcn20_patch_bounding_box': 64 | enable_kernel_vsx(); \ | ^~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:3215:2: note: in expansion of macro 'DC_FP_START' 3215 | DC_FP_START(); | ^~~~~~~~~~~ 67 | enable_kernel_altivec(); \ | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:3215:2: note: in expansion of macro 'DC_FP_START' 3215 | DC_FP_START(); | ^~~~~~~~~~~ 75 | disable_kernel_vsx(); \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:3239:2: note: in expansion of macro 'DC_FP_END' 3239 | DC_FP_END(); | ^~~~~~~~~ 78 | disable_kernel_altivec(); \ | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:3239:2: note: in expansion of macro 'DC_FP_END' 3239 | DC_FP_END(); | ^~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:80: At top level: drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_dmcu.h:283:23: warning: 'abm_gain_stepsize' defined but not used [-Wunused-const-variable=] 283 | static const uint32_t abm_gain_stepsize = 0x0060; | ^~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:65: drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:133:29: warning: 'VCN_BASE' defined but not used [-Wunused-const-variable=] 133 | static const struct IP_BASE VCN_BASE ={ { { { 0x00007800, 0x00007E00, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:127:29: warning: 'UMC_BASE' defined but not used [-Wunused-const-variable=] 127 | static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:121:29: warning: 'THM_BASE' defined but not used [-Wunused-const-variable=] 121 | static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:115:29: warning: 'SMUIO_BASE' defined but not used [-Wunused-const-variable=] 115 | static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } }, | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:109:29: warning: 'RSMU_BASE' defined but not used [-Wunused-const-variable=] 109 | static const struct IP_BASE RSMU_BASE = { { { { 0x00012000, 0, 0, 0, 0, 0 } }, | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:103:29: warning: 'OSSSYS_BASE' defined but not used [-Wunused-const-variable=] 103 | static const struct IP_BASE OSSSYS_BASE ={ { { { 0x000010A0, 0, 0, 0, 0, 0 } }, | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:97:29: warning: 'NBIO_BASE' defined but not used [-Wunused-const-variable=] 97 | static const struct IP_BASE NBIO_BASE ={ { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0, 0 } }, | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:91:29: warning: 'MP1_BASE' defined but not used [-Wunused-const-variable=] 91 | static const struct IP_BASE MP1_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:85:29: warning: 'MP0_BASE' defined but not used [-Wunused-const-variable=] 85 | static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:79:29: warning: 'MMHUB_BASE' defined but not used [-Wunused-const-variable=] 79 | static const struct IP_BASE MMHUB_BASE ={ { { { 0x0001A000, 0, 0, 0, 0, 0 } }, | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:73:29: warning: 'HDP_BASE' defined but not used [-Wunused-const-variable=] 73 | static const struct IP_BASE HDP_BASE ={ { { { 0x00000F20, 0, 0, 0, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:67:29: warning: 'GC_BASE' defined but not used [-Wunused-const-variable=] 67 | static const struct IP_BASE GC_BASE ={ { { { 0x00001260, 0x0000A000, 0, 0, 0, 0 } }, | ^~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:61:29: warning: 'FUSE_BASE' defined but not used [-Wunused-const-variable=] 61 | static const struct IP_BASE FUSE_BASE ={ { { { 0x00017400, 0, 0, 0, 0, 0 } }, | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:55:29: warning: 'DCN_BASE' defined but not used [-Wunused-const-variable=] 55 | static const struct IP_BASE DCN_BASE ={ { { { 0x00000012, 0x000000C0, 0x000034C0, 0x00009000, 0, 0 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:49:29: warning: 'DF_BASE' defined but not used [-Wunused-const-variable=] 49 | static const struct IP_BASE DF_BASE ={ { { { 0x00007000, 0, 0, 0, 0, 0 } }, | ^~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:65: drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:43:29: warning: 'CLK_BASE' defined but not used [-Wunused-const-variable=] 43 | static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x00017200, 0x00017E00, 0x0001B000 } }, | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/navi10_ip_offset.h:37:29: warning: 'ATHUB_BASE' defined but not used [-Wunused-const-variable=] 37 | static const struct IP_BASE ATHUB_BASE ={ { { { 0x00000C00, 0, 0, 0, 0, 0 } }, | ^~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/core_types.h:32, from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/resource.h:28, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:34: drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:124:22: warning: 'DP_DVI_CONVERTER_ID_4' defined but not used [-Wunused-const-variable=] 124 | static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa"; | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:122:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_3' defined but not used [-Wunused-const-variable=] 122 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/ddc_service_types.h:120:22: warning: 'DP_VGA_LVDS_CONVERTER_ID_2' defined but not used [-Wunused-const-variable=] 120 | static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT"; | ^~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:29: drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=] 76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL }; | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=] 75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL }; | ^~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=] 74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL }; | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=] 73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL }; | ^~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=] 72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL }; | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=] 67 | static const struct fixed31_32 dc_fixpt_zero = { 0 }; | ^~~~~~~~~~~~~ cc1: some warnings being treated as errors -- drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:14403:111: note: (near initialization for 'tf_mask.CM_3DLUT_MODE') 14403 | #define CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK 0x00000003L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_3DLUT_MODE__CM_3DLUT_MODE_MASK' 38 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:358:2: note: in expansion of macro 'TF_SF' 358 | TF_SF(CM0_CM_3DLUT_MODE, CM_3DLUT_MODE, mask_sh), \ | ^~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:537:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_COMMON' 537 | TF_REG_LIST_SH_MASK_DCN20_COMMON(mask_sh), \ | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:623:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20' 623 | TF_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:13989:111: warning: initialized field overwritten [-Woverride-init] 13989 | #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK 0x00000003L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK' 38 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:196:2: note: in expansion of macro 'TF_SF' 196 | TF_SF(CM0_CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, mask_sh) | ^~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:538:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_UPDATED' 538 | TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh), \ | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:623:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20' 623 | TF_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:13989:111: note: (near initialization for 'tf_mask.CM_SHAPER_LUT_MODE') 13989 | #define CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK 0x00000003L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_dpp.h:38:16: note: in expansion of macro 'CM0_CM_SHAPER_CONTROL__CM_SHAPER_LUT_MODE_MASK' 38 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:196:2: note: in expansion of macro 'TF_SF' 196 | TF_SF(CM0_CM_SHAPER_CONTROL, CM_SHAPER_LUT_MODE, mask_sh) | ^~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.h:538:2: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20_UPDATED' 538 | TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh), \ | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:623:3: note: in expansion of macro 'TF_REG_LIST_SH_MASK_DCN20' 623 | TF_REG_LIST_SH_MASK_DCN20(_MASK) | ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:33815:111: warning: initialized field overwritten [-Woverride-init] 33815 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT 0x1f | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT' 214 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF' 204 | AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:640:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST' 640 | DCN_AUX_MASK_SH_LIST(__SHIFT) | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:33815:111: note: (near initialization for 'aux_shift.AUX_SW_AUTOINCREMENT_DISABLE') 33815 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT 0x1f | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT' 214 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF' 204 | AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:640:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST' 640 | DCN_AUX_MASK_SH_LIST(__SHIFT) | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:33819:111: warning: initialized field overwritten [-Woverride-init] 33819 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK 0x80000000L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK' 214 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF' 204 | AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:644:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST' 644 | DCN_AUX_MASK_SH_LIST(_MASK) | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:33819:111: note: (near initialization for 'aux_mask.AUX_SW_AUTOINCREMENT_DISABLE') 33819 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK 0x80000000L | ^~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:214:16: note: in expansion of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK' 214 | .field_name = reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.h:204:2: note: in expansion of macro 'AUX_SF' 204 | AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:644:2: note: in expansion of macro 'DCN_AUX_MASK_SH_LIST' 644 | DCN_AUX_MASK_SH_LIST(_MASK) | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:733:20: warning: no previous prototype for 'dcn21_i2c_hw_create' [-Wmissing-prototypes] 733 | struct dce_i2c_hw *dcn21_i2c_hw_create( | ^~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29, from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:29: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c: In function 'patch_bounding_box': 64 | enable_kernel_vsx(); \ | ^~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:997:2: note: in expansion of macro 'DC_FP_START' 997 | DC_FP_START(); | ^~~~~~~~~~~ 67 | enable_kernel_altivec(); \ | ^~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:997:2: note: in expansion of macro 'DC_FP_START' 997 | DC_FP_START(); | ^~~~~~~~~~~ 75 | disable_kernel_vsx(); \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1024:2: note: in expansion of macro 'DC_FP_END' 1024 | DC_FP_END(); | ^~~~~~~~~ 78 | disable_kernel_altivec(); \ | ^~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1024:2: note: in expansion of macro 'DC_FP_END' 1024 | DC_FP_END(); | ^~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c: At top level: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1027:6: warning: no previous prototype for 'dcn21_calculate_wm' [-Wmissing-prototypes] 1027 | void dcn21_calculate_wm( | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1112:6: warning: no previous prototype for 'dcn21_validate_bandwidth' [-Wmissing-prototypes] 1112 | bool dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context, | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1242:32: warning: no previous prototype for 'dcn21_opp_create' [-Wmissing-prototypes] 1242 | struct output_pixel_processor *dcn21_opp_create( | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1258:26: warning: no previous prototype for 'dcn21_timing_generator_create' [-Wmissing-prototypes] 1258 | struct timing_generator *dcn21_timing_generator_create( | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1280:13: warning: no previous prototype for 'dcn21_mpc_create' [-Wmissing-prototypes] 1280 | struct mpc *dcn21_mpc_create(struct dc_context *ctx) | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1307:35: warning: no previous prototype for 'dcn21_dsc_create' [-Wmissing-prototypes] 1307 | struct display_stream_compressor *dcn21_dsc_create( | ^~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1430:24: warning: no previous prototype for 'dcn21_stream_encoder_create' [-Wmissing-prototypes] 1430 | struct stream_encoder *dcn21_stream_encoder_create( | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:67: drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:489:52: warning: initialized field overwritten [-Woverride-init] 489 | #define DMU_BASE__INST0_SEG2 0x000034C0 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:281:25: note: in expansion of macro 'DMU_BASE__INST0_SEG2' 281 | #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:283:19: note: in expansion of macro 'BASE_INNER' 283 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:286:15: note: in expansion of macro 'BASE' 286 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:157:2: note: in expansion of macro 'SR' 157 | SR(DCFCLK_CNTL), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:280:2: note: in expansion of macro 'HWSEQ_DCN_REG_LIST' 280 | HWSEQ_DCN_REG_LIST(), \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1448:3: note: in expansion of macro 'HWSEQ_DCN21_REG_LIST' 1448 | HWSEQ_DCN21_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/renoir_ip_offset.h:489:52: note: (near initialization for 'hwseq_reg.DCFCLK_CNTL') 489 | #define DMU_BASE__INST0_SEG2 0x000034C0 | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:281:25: note: in expansion of macro 'DMU_BASE__INST0_SEG2' 281 | #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg | ^~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:283:19: note: in expansion of macro 'BASE_INNER' 283 | #define BASE(seg) BASE_INNER(seg) | ^~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:286:15: note: in expansion of macro 'BASE' 286 | .reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \ | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:157:2: note: in expansion of macro 'SR' 157 | SR(DCFCLK_CNTL), \ | ^~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:280:2: note: in expansion of macro 'HWSEQ_DCN_REG_LIST' 280 | HWSEQ_DCN_REG_LIST(), \ | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1448:3: note: in expansion of macro 'HWSEQ_DCN21_REG_LIST' 1448 | HWSEQ_DCN21_REG_LIST() | ^~~~~~~~~~~~~~~~~~~~ In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:69: drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:43237:111: warning: initialized field overwritten [-Woverride-init] 43237 | #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON__SHIFT 0x18 | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:439:28: note: in expansion of macro 'LVTMA_PWRSEQ_CNTL__LVTMA_BLON__SHIFT' 439 | .field_name = blk_name ## reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:676:2: note: in expansion of macro 'HWS_SF' 676 | HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1452:3: note: in expansion of macro 'HWSEQ_DCN21_MASK_SH_LIST' 1452 | HWSEQ_DCN21_MASK_SH_LIST(__SHIFT) | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:43237:111: note: (near initialization for 'hwseq_shift.LVTMA_BLON') 43237 | #define LVTMA_PWRSEQ_CNTL__LVTMA_BLON__SHIFT 0x18 | ^~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:439:28: note: in expansion of macro 'LVTMA_PWRSEQ_CNTL__LVTMA_BLON__SHIFT' 439 | .field_name = blk_name ## reg_name ## __ ## field_name ## post_fix | ^~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:676:2: note: in expansion of macro 'HWS_SF' 676 | HWS_SF(, LVTMA_PWRSEQ_CNTL, LVTMA_BLON, mask_sh), \ | ^~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn21/dcn21_resource.c:1452:3: note: in expansion of macro 'HWSEQ_DCN21_MASK_SH_LIST' 1452 | HWSEQ_DCN21_MASK_SH_LIST(__SHIFT) | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dcn/dcn_2_1_0_sh_mask.h:43253:111: warning: initialized field overwritten [-Woverride-init] 43253 | #define LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_TARGET_STATE_R__SHIFT 0x0 | ^~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.h:439:28: note: in expansion of macro 'LVTMA_PWRSEQ_STATE__LVTMA_PWRSEQ_TARGET_STATE_R__SHIFT' 439 | .field_name = blk_name ## reg_name ## __ ## field_name ## post_fix vim +64 drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h 52 53 #if defined(CONFIG_DRM_AMD_DC_DCN) 54 #if defined(CONFIG_X86) 55 #include <asm/fpu/api.h> 56 #define DC_FP_START() kernel_fpu_begin() 57 #define DC_FP_END() kernel_fpu_end() 58 #elif defined(CONFIG_PPC64) 59 #include <asm/switch_to.h> 60 #include <asm/cputable.h> 61 #define DC_FP_START() { \ 62 if (cpu_has_feature(CPU_FTR_VSX_COMP)) { \ 63 preempt_disable(); \ 65 } else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) { \ 66 preempt_disable(); \ 68 } else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) { \ 69 preempt_disable(); \ 70 enable_kernel_fp(); \ 71 } \ 72 } 73 #define DC_FP_END() { \ 74 if (cpu_has_feature(CPU_FTR_VSX_COMP)) { \ 76 preempt_enable(); \ 77 } else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) { \ 79 preempt_enable(); \ 80 } else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) { \ 81 disable_kernel_fp(); \ 82 preempt_enable(); \ 83 } \ 84 } 85 #endif 86 #endif 87 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org