12:54 a.m.
tree: https://github.com/intel/linux-intel-lts.git 5.4/yocto
head: eeb611e5394c56d45c5cc8f7dc484c9f19e93143
commit: 5dd63f642613babcc3b8eea1bc8212dc15f10558 [44/1142] drm/kmb: Set correct values in
the LAYERn_CFG register
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/intel/linux-intel-lts/commit/5dd63f642613babcc3b8eea1b...
git remote add intel-linux-intel-lts https://github.com/intel/linux-intel-lts.git
git fetch --no-tags intel-linux-intel-lts 5.4/yocto
git checkout 5dd63f642613babcc3b8eea1bc8212dc15f10558
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
> drivers/gpu/drm/kmb/kmb_plane.c:57:14: warning: no previous
prototype for 'set_pixel_format' [-Wmissing-prototypes]
57 | unsigned
int set_pixel_format(u32 format)
| ^~~~~~~~~~~~~~~~
> drivers/gpu/drm/kmb/kmb_plane.c:144:14: warning: no previous
prototype for 'set_bits_per_pixel' [-Wmissing-prototypes]
144 |
unsigned int set_bits_per_pixel(const struct drm_format_info *format)
| ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/kmb/kmb_plane.c:275:25: warning: no previous prototype for
'kmb_plane_duplicate_state' [-Wmissing-prototypes]
275 | struct drm_plane_state *kmb_plane_duplicate_state(struct drm_plane *plane)
| ^~~~~~~~~~~~~~~~~~~~~~~~~
vim +/set_pixel_format +57 drivers/gpu/drm/kmb/kmb_plane.c
56
57 unsigned int set_pixel_format(u32 format)
58 {
59 unsigned int val = 0;
60
61 switch (format) {
62 /*planar formats */
63 case DRM_FORMAT_YUV444:
64 val = LCD_LAYER_FORMAT_YCBCR444PLAN | LCD_LAYER_PLANAR_STORAGE;
65 break;
66 case DRM_FORMAT_YVU444:
67 val = LCD_LAYER_FORMAT_YCBCR444PLAN | LCD_LAYER_PLANAR_STORAGE
68 | LCD_LAYER_CRCB_ORDER;
69 break;
70 case DRM_FORMAT_YUV422:
71 val = LCD_LAYER_FORMAT_YCBCR422PLAN | LCD_LAYER_PLANAR_STORAGE;
72 break;
73 case DRM_FORMAT_YVU422:
74 val = LCD_LAYER_FORMAT_YCBCR422PLAN | LCD_LAYER_PLANAR_STORAGE
75 | LCD_LAYER_CRCB_ORDER;
76 break;
77 case DRM_FORMAT_YUV420:
78 val = LCD_LAYER_FORMAT_YCBCR420PLAN | LCD_LAYER_PLANAR_STORAGE;
79 break;
80 case DRM_FORMAT_YVU420:
81 val = LCD_LAYER_FORMAT_YCBCR420PLAN | LCD_LAYER_PLANAR_STORAGE
82 | LCD_LAYER_CRCB_ORDER;
83 break;
84 case DRM_FORMAT_NV12:
85 val = LCD_LAYER_FORMAT_NV12 | LCD_LAYER_PLANAR_STORAGE;
86 break;
87 case DRM_FORMAT_NV21:
88 val = LCD_LAYER_FORMAT_NV12 | LCD_LAYER_PLANAR_STORAGE
89 | LCD_LAYER_CRCB_ORDER;
90 break;
91 /* packed formats */
92 case DRM_FORMAT_RGB332:
93 val = LCD_LAYER_FORMAT_RGB332;
94 break;
95 case DRM_FORMAT_XBGR4444:
96 val = LCD_LAYER_FORMAT_RGBX4444 | LCD_LAYER_BGR_ORDER;
97 break;
98 case DRM_FORMAT_ARGB4444:
99 val = LCD_LAYER_FORMAT_RGBA4444;
100 break;
101 case DRM_FORMAT_ABGR4444:
102 val = LCD_LAYER_FORMAT_RGBA4444 | LCD_LAYER_BGR_ORDER;
103 break;
104 case DRM_FORMAT_XRGB1555:
105 val = LCD_LAYER_FORMAT_XRGB1555;
106 break;
107 case DRM_FORMAT_XBGR1555:
108 val = LCD_LAYER_FORMAT_XRGB1555 | LCD_LAYER_BGR_ORDER;
109 break;
110 case DRM_FORMAT_ARGB1555:
111 val = LCD_LAYER_FORMAT_RGBA1555;
112 break;
113 case DRM_FORMAT_ABGR1555:
114 val = LCD_LAYER_FORMAT_RGBA1555 | LCD_LAYER_BGR_ORDER;
115 break;
116 case DRM_FORMAT_RGB565:
117 val = LCD_LAYER_FORMAT_RGB565;
118 break;
119 case DRM_FORMAT_BGR565:
120 val = LCD_LAYER_FORMAT_RGB565 | LCD_LAYER_BGR_ORDER;
121 break;
122 case DRM_FORMAT_RGB888:
123 val = LCD_LAYER_FORMAT_RGB888;
124 break;
125 case DRM_FORMAT_BGR888:
126 val = LCD_LAYER_FORMAT_RGB888 | LCD_LAYER_BGR_ORDER;
127 break;
128 case DRM_FORMAT_XRGB8888:
129 val = LCD_LAYER_FORMAT_RGBX8888;
130 break;
131 case DRM_FORMAT_XBGR8888:
132 val = LCD_LAYER_FORMAT_RGBX8888 | LCD_LAYER_BGR_ORDER;
133 break;
134 case DRM_FORMAT_ARGB8888:
135 val = LCD_LAYER_FORMAT_RGBA8888;
136 break;
137 case DRM_FORMAT_ABGR8888:
138 val = LCD_LAYER_FORMAT_RGBA8888 | LCD_LAYER_BGR_ORDER;
139 break;
140 }
141 return val;
142 }
143
144 unsigned int set_bits_per_pixel(const struct drm_format_info
*format)
145 {
146 int i;
147 u32 bpp = 0;
148 unsigned int val = 0;
149
150 for (i = 0; i < format->num_planes; i++)
151 bpp += 8*format->cpp[i];
152
153 switch (bpp) {
154 case 8:
155 val = LCD_LAYER_8BPP;
156 break;
157 case 16:
158 val = LCD_LAYER_16BPP;
159 break;
160 case 24:
161 val = LCD_LAYER_24BPP;
162 break;
163 case 32:
164 val = LCD_LAYER_32BPP;
165 break;
166 }
167 return val;
168 }
169
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org