[kbuild-all] [frank-w-bpi-r2-4.14:5.16-r2pro 5/35] drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/mtk_wcn_consys_hw.c:191:6: error: no previous prototype for 'mtk_wcn_consys_power_on'

tree: https://github.com/frank-w/BPI-R2-4.14 5.16-r2pro head: 4308d050a46a2ee47866d2c6f0200462dfd84d18 commit: 8f3e42b3d0855dda8a76965487facfb915a4dd33 [5/35] mt6625l: add changes outside driver dir config: arm-randconfig-r005-20211213 (https://download.01.org/0day-ci/archive/20211214/202112140833.joFdyNAx-lk...) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/frank-w/BPI-R2-4.14/commit/8f3e42b3d0855dda8a76965487f... git remote add frank-w-bpi-r2-4.14 https://github.com/frank-w/BPI-R2-4.14 git fetch --no-tags frank-w-bpi-r2-4.14 5.16-r2pro git checkout 8f3e42b3d0855dda8a76965487facfb915a4dd33 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm SHELL=/bin/bash drivers/hwtracing/coresight/ drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/ drivers/misc/mediatek/connectivity/wlan/gen2/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): 191 | VOID mtk_wcn_consys_power_on(VOID) | ^~~~~~~~~~~~~~~~~~~~~~~ 207 | VOID mtk_wcn_consys_power_off(VOID) | ^~~~~~~~~~~~~~~~~~~~~~~~ 224 | INT32 mtk_wcn_consys_hw_reg_ctrl(UINT32 on, UINT32 co_clock_type) | ^~~~~~~~~~~~~~~~~~~~~~~~~~ 335 | INT32 mtk_wcn_consys_hw_gpio_ctrl(UINT32 on) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ 539 | INT32 mtk_wcn_consys_hw_restore(struct device *device) | ^~~~~~~~~~~~~~~~~~~~~~~~~ 592 | int reserve_memory_consys_fn(struct reserved_mem *rmem) | ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/mtk_wcn_consys_hw.c: In function 'mtk_wcn_consys_get_pinctrl': 713 | struct pinctrl *mtk_wcn_consys_get_pinctrl() | ^~~~~~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors Kconfig warnings: (for reference only) WARNING: unmet direct dependencies detected for MTK_GPS Depends on ARM && GPS Selected by - MTK_GPS_SUPPORT && ARM vim +/mtk_wcn_consys_power_on +191 drivers/misc/mediatek/connectivity/common/conn_soc/mt7623/mtk_wcn_consys_hw.c d03a149ef0a8e6 Frank Wunderlich 2021-08-29 190 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 @191 VOID mtk_wcn_consys_power_on(VOID) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 192 { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 193 INT32 iRet = -1; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 194 iRet = pm_runtime_get_sync(&my_pdev->dev); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 195 if (iRet) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 196 WMT_PLAT_ERR_FUNC("pm_runtime_get_sync() fail(%d)\n", iRet); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 197 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 198 WMT_PLAT_INFO_FUNC("pm_runtime_get_sync() CONSYS ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 199 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 200 iRet = device_init_wakeup(&my_pdev->dev, true); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 201 if (iRet) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 202 WMT_PLAT_ERR_FUNC("device_init_wakeup(true) fail.\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 203 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 204 WMT_PLAT_INFO_FUNC("device_init_wakeup(true) CONSYS ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 205 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 206 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 @207 VOID mtk_wcn_consys_power_off(VOID) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 208 { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 209 INT32 iRet = -1; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 210 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 211 iRet = pm_runtime_put_sync(&my_pdev->dev); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 212 if (iRet) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 213 WMT_PLAT_ERR_FUNC("pm_runtime_put_sync() fail.\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 214 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 215 WMT_PLAT_INFO_FUNC("pm_runtime_put_sync() CONSYS ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 216 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 217 iRet = device_init_wakeup(&my_pdev->dev, false); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 218 if (iRet) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 219 WMT_PLAT_ERR_FUNC("device_init_wakeup(false) fail.\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 220 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 221 WMT_PLAT_INFO_FUNC("device_init_wakeup(false) CONSYS ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 222 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 223 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 @224 INT32 mtk_wcn_consys_hw_reg_ctrl(UINT32 on, UINT32 co_clock_type) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 225 { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 226 UINT32 retry = 10; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 227 UINT32 consysHwChipId = 0; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 228 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 229 WMT_PLAT_DBG_FUNC("CONSYS-HW-REG-CTRL(0x%08x),start\n", on); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 230 if (on) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 231 WMT_PLAT_DBG_FUNC("++\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 232 /*need PMIC driver provide new API protocol */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 233 /*1.AP power on VCN_1V8 LDO (with PMIC_WRAP API) VCN_1V8 */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 234 regulator_set_mode(reg_VCN18, REGULATOR_MODE_STANDBY); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 235 /* VOL_DEFAULT, VOL_1200, VOL_1300, VOL_1500, VOL_1800... */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 236 if (reg_VCN18) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 237 regulator_set_voltage(reg_VCN18, 1800000, 1800000); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 238 if (regulator_enable(reg_VCN18)) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 239 WMT_PLAT_ERR_FUNC("enable VCN18 fail\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 240 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 241 WMT_PLAT_DBG_FUNC("enable VCN18 ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 242 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 243 udelay(150); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 244 if (co_clock_type) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 245 /*step0,clk buf ctrl */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 246 WMT_PLAT_INFO_FUNC("co clock type(%d),turn on clk buf\n", co_clock_type); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 247 #if CONSYS_CLOCK_BUF_CTRL d03a149ef0a8e6 Frank Wunderlich 2021-08-29 248 clk_buf_ctrl(CLK_BUF_CONN, 1); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 249 #endif d03a149ef0a8e6 Frank Wunderlich 2021-08-29 250 /*if co-clock mode: */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 251 /*2.set VCN28 to SW control mode (with PMIC_WRAP API) */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 252 /*turn on VCN28 LDO only when FMSYS is activated" */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 253 regmap_update_bits(pmic_regmap, 0x41C, 0x1 << 14, 0x0 << 14);/*V28*/ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 254 } else { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 255 /*if NOT co-clock: */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 256 /*2.1.switch VCN28 to HW control mode (with PMIC_WRAP API) */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 257 regmap_update_bits(pmic_regmap, 0x41C, 0x1 << 14, 0x1 << 14);/*V28*/ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 258 /*2.2.turn on VCN28 LDO (with PMIC_WRAP API)" */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 259 /*fix vcn28 not balance warning */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 260 if (reg_VCN28) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 261 regulator_set_voltage(reg_VCN28, 2800000, 2800000); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 262 if (regulator_enable(reg_VCN28)) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 263 WMT_PLAT_ERR_FUNC("enable VCN_2V8 fail!\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 264 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 265 WMT_PLAT_DBG_FUNC("enable VCN_2V8 ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 266 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 267 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 268 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 269 /*3.assert CONNSYS CPU SW reset 0x10007018 "[12]=1'b1 [31:24]=8'h88 (key)" */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 270 reset_control_reset(rstc); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 271 mtk_wcn_consys_power_on(); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 272 /*11.26M is ready now, delay 10us for mem_pd de-assert */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 273 udelay(10); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 274 /*enable AP bus clock : connmcu_bus_pd API: enable_clock() ++?? */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 275 clk_prepare_enable(clk_infra_conn_main); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 276 WMT_PLAT_DBG_FUNC("[CCF]enable clk_infra_conn_main\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 277 /*12.poll CONNSYS CHIP ID until chipid is returned 0x18070008 */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 278 while (retry-- > 0) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 279 consysHwChipId = CONSYS_REG_READ(conn_reg.mcu_base + CONSYS_CHIP_ID_OFFSET) - 0xf6d; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 280 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 281 if ((consysHwChipId == 0x0321) || (consysHwChipId == 0x0335) || (consysHwChipId == 0x0337)) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 282 WMT_PLAT_INFO_FUNC("retry(%d)consys chipId(0x%08x)\n", retry, consysHwChipId); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 283 break; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 284 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 285 if ((consysHwChipId == 0x8163) || (consysHwChipId == 0x8127) || (consysHwChipId == 0x7623)) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 286 WMT_PLAT_INFO_FUNC("retry(%d)consys chipId(0x%08x)\n", retry, consysHwChipId); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 287 break; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 288 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 289 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 290 WMT_PLAT_ERR_FUNC("Read CONSYS chipId(0x%08x)", consysHwChipId); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 291 msleep(20); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 292 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 293 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 294 if ((0 == retry) || (0 == consysHwChipId)) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 295 WMT_PLAT_ERR_FUNC("Maybe has a consys power on issue,(0x%08x)\n", consysHwChipId); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 296 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 297 msleep(40); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 298 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 299 } else { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 300 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 301 clk_disable_unprepare(clk_infra_conn_main); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 302 WMT_PLAT_DBG_FUNC("[CCF] clk_disable_unprepare(clk_infra_conn_main) calling\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 303 mtk_wcn_consys_power_off(); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 304 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 305 if (co_clock_type) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 306 /*VCN28 has been turned off by GPS OR FM */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 307 #if CONSYS_CLOCK_BUF_CTRL d03a149ef0a8e6 Frank Wunderlich 2021-08-29 308 clk_buf_ctrl(CLK_BUF_CONN, 0); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 309 #endif d03a149ef0a8e6 Frank Wunderlich 2021-08-29 310 } else { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 311 regmap_update_bits(pmic_regmap, 0x41C, 0x1 << 14, 0x0 << 14);/*V28*/ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 312 /*turn off VCN28 LDO (with PMIC_WRAP API)" */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 313 if (reg_VCN28) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 314 if (regulator_disable(reg_VCN28)) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 315 WMT_PLAT_ERR_FUNC("disable VCN_2V8 fail!\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 316 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 317 WMT_PLAT_DBG_FUNC("disable VCN_2V8 ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 318 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 319 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 320 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 321 /*AP power off MT6625L VCN_1V8 LDO */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 322 regulator_set_mode(reg_VCN18, REGULATOR_MODE_STANDBY); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 323 if (reg_VCN18) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 324 if (regulator_disable(reg_VCN18)) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 325 WMT_PLAT_ERR_FUNC("disable VCN_1V8 fail!\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 326 else d03a149ef0a8e6 Frank Wunderlich 2021-08-29 327 WMT_PLAT_DBG_FUNC("disable VCN_1V8 ok\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 328 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 329 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 330 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 331 WMT_PLAT_DBG_FUNC("CONSYS-HW-REG-CTRL(0x%08x),finish\n", on); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 332 return 0; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 333 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 334 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 @335 INT32 mtk_wcn_consys_hw_gpio_ctrl(UINT32 on) d03a149ef0a8e6 Frank Wunderlich 2021-08-29 336 { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 337 INT32 iRet = 0; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 338 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 339 WMT_PLAT_DBG_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), start\n", on); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 340 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 341 if (on) { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 342 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 343 /* TODO: [FixMe][GeorgeKuo] double check if BGF_INT is implemented ok */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 344 /* iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_MUX); */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 345 iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_INIT); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 346 iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 347 WMT_PLAT_DBG_FUNC("CONSYS-HW, BGF IRQ registered and disabled\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 348 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 349 } else { d03a149ef0a8e6 Frank Wunderlich 2021-08-29 350 d03a149ef0a8e6 Frank Wunderlich 2021-08-29 351 /* set bgf eint/all eint to deinit state, namely input low state */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 352 iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_EINT_DIS); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 353 iRet += wmt_plat_eirq_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 354 WMT_PLAT_DBG_FUNC("CONSYS-HW, BGF IRQ unregistered and disabled\n"); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 355 /* iRet += wmt_plat_gpio_ctrl(PIN_BGF_EINT, PIN_STA_DEINIT); */ d03a149ef0a8e6 Frank Wunderlich 2021-08-29 356 } d03a149ef0a8e6 Frank Wunderlich 2021-08-29 357 WMT_PLAT_DBG_FUNC("CONSYS-HW-GPIO-CTRL(0x%08x), finish\n", on); d03a149ef0a8e6 Frank Wunderlich 2021-08-29 358 return iRet; d03a149ef0a8e6 Frank Wunderlich 2021-08-29 359 :::::: The code at line 191 was first introduced by commit :::::: d03a149ef0a8e6180c7c086fc189dedb7ecb8af5 mt6625l: add driver folder from 5.14 :::::: TO: Frank Wunderlich <frank-w(a)public-files.de&gt; :::::: CC: Frank Wunderlich <frank-w(a)public-files.de&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org