12:22 a.m.
tree: git://github.com/linux-chenxing/linux.git mstar_v5_14_rebase
head: 651efd0e52f225e60faa8b30f9768021e2104d3c
commit: f3a4f3d81314124e8a3b3a38ba8cb49dc711383c [138/352] MStar MSC313: MIU DDR
controller driver
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https://github.com/linux-chenxing/linux/commit/f3a4f3d81314124e8a3b3a38ba...
git remote add linux-chenxing git://github.com/linux-chenxing/linux.git
git fetch --no-tags linux-chenxing mstar_v5_14_rebase
git checkout f3a4f3d81314124e8a3b3a38ba8cb49dc711383c
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
drivers/memory/mstar-msc313_miu.c: In function 'msc313_miu_probe':
drivers/memory/mstar-msc313_miu.c:297:6: warning: unused variable 'dtval'
[-Wunused-variable]
297 | u32 dtval;
| ^~~~~
> drivers/memory/mstar-msc313_miu.c:334:2: warning: ignoring return
value of 'regulator_enable' declared with attribute 'warn_unused_result'
[-Wunused-result]
334 | regulator_enable(miu->ddrreg);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
At top level:
drivers/memory/mstar-msc313_miu.c:276:20: warning: 'msc313_miu_irq' defined but
not used [-Wunused-function]
276 | static irqreturn_t msc313_miu_irq(int irq, void *data)
| ^~~~~~~~~~~~~~
drivers/memory/mstar-msc313_miu.c:179:13: warning: 'msc313_miu_write_trp'
defined but not used [-Wunused-function]
179 | static void msc313_miu_write_trp(struct msc313_miu *miu, unsigned val){
| ^~~~~~~~~~~~~~~~~~~~
drivers/memory/mstar-msc313_miu.c:164:13: warning: 'msc313_miu_write_trcd'
defined but not used [-Wunused-function]
164 | static void msc313_miu_write_trcd(struct msc313_miu *miu, unsigned val){
| ^~~~~~~~~~~~~~~~~~~~~
vim +334 drivers/memory/mstar-msc313_miu.c
286
287 static int msc313_miu_probe(struct platform_device *pdev)
288 {
289 struct msc313_miu *miu;
290 __iomem void *base;
291 unsigned int config1;
292
293 int banks, cols, buswidth;
294 int trcd, trp, tras, trrd, trtp, trc;
295 int irq;
296
297 u32 dtval;
298
299 miu = devm_kzalloc(&pdev->dev, sizeof(*miu), GFP_KERNEL);
300 if (!miu)
301 return -ENOMEM;
302
303 miu->dev = &pdev->dev;
304
305 base = devm_platform_ioremap_resource(pdev, 0);
306 if (IS_ERR(base))
307 return PTR_ERR(base);
308
309 miu->analog = devm_regmap_init_mmio(&pdev->dev, base,
310 &msc313_miu_analog_regmap_config);
311 if(IS_ERR(miu->analog)){
312 return PTR_ERR(miu->analog);
313 }
314
315 base = devm_platform_ioremap_resource(pdev, 1);
316 if (IS_ERR(base))
317 return PTR_ERR(base);
318
319 miu->digital = devm_regmap_init_mmio(&pdev->dev, base,
320 &msc313_miu_digital_regmap_config);
321 if(IS_ERR(miu->digital)){
322 return PTR_ERR(miu->digital);
323 }
324
325 miu->miuclk = devm_clk_get(&pdev->dev, "miu");
326 if (IS_ERR(miu->miuclk)) {
327 return PTR_ERR(miu->miuclk);
328 }
329
330 miu->ddrreg = devm_regulator_get_optional(&pdev->dev, "ddr");
331 if (IS_ERR(miu->ddrreg)){
332 return PTR_ERR(miu->ddrreg);
333 }
334 regulator_enable(miu->ddrreg);
335
336 irq = of_irq_get(pdev->dev.of_node, 0);
337 if (!irq)
338 return -EINVAL;
339
340 /* clear any pending interrupt we might have been left */
341 regmap_write(miu->digital, MIU_DIG_PROTECTION_STATUS, ~0);
342
343 //devm_request_irq(&pdev->dev, irq, msc313_miu_irq, IRQF_SHARED,
344 // dev_name(&pdev->dev), miu);
345
346 clk_prepare_enable(miu->miuclk);
347
348 regmap_read(miu->digital, REG_CONFIG1, &config1);
349
350 banks = 2 << ((config1 & REG_CONFIG1_BANKS) >>
REG_CONFIG1_BANKS_SHIFT);
351 cols = 8 + ((config1 & REG_CONFIG1_COLS) >> REG_CONFIG1_COLS_SHIFT);
352 buswidth = (((config1 & REG_CONFIG1_BUSWIDTH) >>
REG_CONFIG1_BUSWIDTH_SHIFT) + 1) * 16;
353
354
355 dev_info(&pdev->dev, "Memory type is %s, %d banks and %d columns, %d
bit bus", types[config1 & REG_CONFIG1_TYPE],
356 banks, cols, buswidth);
357
358 trcd = msc313_miu_read_trcd(miu);
359 trp = msc313_miu_read_trp(miu);
360 tras = msc313_miu_read_tras(miu);
361 trrd = msc313_miu_read_trrd(miu);
362 trtp = msc313_miu_read_trtp(miu);
363 trc = msc313_miu_read_trc(miu);
364
365 dev_info(miu->dev, "trcd: %d, trp: %d, tras: %d, trrd: %d, trtp: %d, trc:
%d",
366 trcd, trp, tras, trrd, trtp, trc);
367
368 //if(!of_property_read_u32(pdev->dev.of_node, "mstar,rd-timing",
&dtval)) {
369 // dev_info(&pdev->dev, "Setting read back data delay to %d",
(int) dtval);
370 //regmap_update_bits(miu->digital, REG_CONFIG2, REG_CONFIG2_RD_TIMING,
rd_timing);
371 //}
372
373 //if(!of_property_read_u32(pdev->dev.of_node, "mstar,trcd",
&dtval)) {
374 // dev_info(&pdev->dev, "setting trcd to %d", (int) dtval);
375 // msc313_miu_write_trcd(miu, dtval);
376 //}
377
378 //if(!of_property_read_u32(pdev->dev.of_node, "mstar,trp",
&dtval)) {
379 // dev_info(&pdev->dev, "setting trp to %d", (int) dtval);
380 // msc313_miu_write_trp(miu, dtval);
381 //}
382
383 return msc313_miu_ddrpll_probe(pdev, miu);
384 }
385
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org