1:45 p.m.
tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.10
head: bf98c1493fb23bfd7e2678498b7e337ce2cd1d53
commit: 81494997bdd4943edc98a4d7689dd28db2960307 [1018/1760] clocking-wizard: Add versal
clocking wizard support
config: i386-randconfig-r013-20210812 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
#
https://github.com/Xilinx/linux-xlnx/commit/81494997bdd4943edc98a4d7689dd...
git remote add xlnx https://github.com/Xilinx/linux-xlnx
git fetch --no-tags xlnx xlnx_rebase_v5.10
git checkout 81494997bdd4943edc98a4d7689dd28db2960307
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
drivers/clk/clk-xlnx-clock-wizard-v.c: In function 'clk_wzrd_recalc_rate':
> drivers/clk/clk-xlnx-clock-wizard-v.c:119:21: warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]
119 | (void
__iomem *)((u64)divider->base + divider->offset);
| ^
> drivers/clk/clk-xlnx-clock-wizard-v.c:119:4: warning: cast to
pointer from integer of different size [-Wint-to-pointer-cast]
119 | (void
__iomem *)((u64)divider->base + divider->offset);
| ^
drivers/clk/clk-xlnx-clock-wizard-v.c: In function
'clk_wzrd_dynamic_reconfig':
drivers/clk/clk-xlnx-clock-wizard-v.c:149:21: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
149 | (void __iomem *)((u64)divider->base + divider->offset);
| ^
drivers/clk/clk-xlnx-clock-wizard-v.c:149:4: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
149 | (void __iomem *)((u64)divider->base + divider->offset);
| ^
vim +119 drivers/clk/clk-xlnx-clock-wizard-v.c
113
114 static unsigned long clk_wzrd_recalc_rate(struct clk_hw *hw,
115 unsigned long parent_rate)
116 {
117 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw);
118 void __iomem *div_addr =
119 (void __iomem *)((u64)divider->base + divider->offset);
120 unsigned int vall, valh;
121 u32 div;
122 u32 p5en, edge, prediv2;
123 u32 all;
124
125 edge = !!(readl(div_addr) & BIT(8));
126 p5en = !!(readl(div_addr) & BIT(13));
127 prediv2 = !!(readl(div_addr) & BIT(11));
128 vall = readl(div_addr + 4) & 0xff;
129 valh = readl(div_addr + 4) >> 8;
130 all = valh + vall + edge;
131 if (!all)
132 all = 1;
133 div = (prediv2 + 1) * (all + (prediv2 * p5en) / 2);
134 return DIV_ROUND_UP_ULL((u64)parent_rate, div);
135 }
136
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0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org