-----Original Message-----
From: Lorenzo Pieralisi <lorenzo.pieralisi(a)arm.com>
Sent: 2020年3月16日 18:25
To: kbuild test robot <lkp(a)intel.com>
Cc: Z.q. Hou <zhiqiang.hou(a)nxp.com>; kbuild-all(a)lists.01.org; Bjorn Helgaas
<helgaas(a)kernel.org>; Andrew Murray <andrew.murray(a)arm.com>
Subject: Re: [lpieralisi-pci:pci/mobiveil 4/11]
drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49: sparse: sparse:
incorrect type in return expression (different address spaces)
On Wed, Mar 11, 2020 at 09:25:47AM +0800, kbuild test robot wrote:
> tree:
https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.ker
nel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Flpieralisi%2Fpci.git&
;data=02%7C01%7CZhiqiang.Hou%40nxp.com%7Cbad5744a0847492188570
8d7c9943e55%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6371
99510855129240&sdata=0QYLuMqqM0HzYZUOvKnpUpH1vtcPg92Bu1%
2FxMtXsKtk%3D&reserved=0 pci/mobiveil
> head: d29ad70a813b0daa424b70950d432c34a1a95865
> commit: 03bdc3884019fb6463ac8163cc0e890920515f8b [4/11] PCI:
mobiveil:
> Modularize the Mobiveil PCIe Host Bridge IP driver
> reproduce:
> # apt-get install sparse
> # sparse version: v0.6.1-174-g094d5a94-dirty
> git checkout 03bdc3884019fb6463ac8163cc0e890920515f8b
> make ARCH=x86_64 allmodconfig
> make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
>
> If you fix the issue, kindly add following tag
> Reported-by: kbuild test robot <lkp(a)intel.com>
>
>
> sparse warnings: (new ones prefixed by >>)
Hou,
these are longstanding sparse warnings, I can fix them for you but I would
appreciate if you could send me a patch please.
It is not cause by current merge window material but we must fix it
nonetheless and promptly.
Thanks,
Lorenzo
> >> drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49: sparse: sparse:
incorrect type in return expression (different address spaces) @@
expected void * @@ got void [noderef] <asvoid * @@
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49: sparse:
expected void *
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:44:49: sparse: got
void [noderef] <asn:2> *
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:48:41: sparse: sparse:
incorrect type in return expression (different address spaces) @@
expected void * @@ got void [noderef] <asvoid * @@
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:48:41: sparse:
expected void *
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:48:41: sparse: got
void [noderef] <asn:2> *
> >> drivers/pci/controller/mobiveil/pcie-mobiveil.c:106:34: sparse: sparse:
incorrect type in argument 1 (different address spaces) @@ expected
void [noderef] <asn:2> *addr @@ got oderef] <asn:2> *addr @@
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:106:34: sparse:
expected void [noderef] <asn:2> *addr
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:106:34: sparse: got
void *[assigned] addr
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:121:35: sparse: sparse:
incorrect type in argument 1 (different address spaces) @@ expected
void [noderef] <asn:2> *addr @@ got oderef] <asn:2> *addr @@
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:121:35: sparse:
expected void [noderef] <asn:2> *addr
> drivers/pci/controller/mobiveil/pcie-mobiveil.c:121:35: sparse: got
void *[assigned] addr
>
> vim +44 drivers/pci/controller/mobiveil/pcie-mobiveil.c
>
> 38
> 39 static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie
*pcie, u32 off)
> 40 {
> 41 if (off < PAGED_ADDR_BNDRY) {
> 42 /* For directly accessed registers, clear the pg_sel
field */
> 43 mobiveil_pcie_sel_page(pcie, 0);
> > 44 return pcie->csr_axi_slave_base + off;
> 45 }
> 46
> 47 mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off));
> 48 return pcie->csr_axi_slave_base +
OFFSET_TO_PAGE_ADDR(off);
> 49 }
> 50
> 51 static int mobiveil_pcie_read(void __iomem *addr, int size, u32
*val)
> 52 {
> 53 if ((uintptr_t)addr & (size - 1)) {
> 54 *val = 0;
> 55 return PCIBIOS_BAD_REGISTER_NUMBER;
> 56 }
> 57
> 58 switch (size) {
> 59 case 4:
> 60 *val = readl(addr);
> 61 break;
> 62 case 2:
> 63 *val = readw(addr);
> 64 break;
> 65 case 1:
> 66 *val = readb(addr);
> 67 break;
> 68 default:
> 69 *val = 0;
> 70 return PCIBIOS_BAD_REGISTER_NUMBER;
> 71 }
> 72
> 73 return PCIBIOS_SUCCESSFUL;
> 74 }
> 75
> 76 static int mobiveil_pcie_write(void __iomem *addr, int size,
u32 val)
> 77 {
> 78 if ((uintptr_t)addr & (size - 1))
> 79 return PCIBIOS_BAD_REGISTER_NUMBER;
> 80
> 81 switch (size) {
> 82 case 4:
> 83 writel(val, addr);
> 84 break;
> 85 case 2:
> 86 writew(val, addr);
> 87 break;
> 88 case 1:
> 89 writeb(val, addr);
> 90 break;
> 91 default:
> 92 return PCIBIOS_BAD_REGISTER_NUMBER;
> 93 }
> 94
> 95 return PCIBIOS_SUCCESSFUL;
> 96 }
> 97
> 98 u32 mobiveil_csr_read(struct mobiveil_pcie *pcie, u32 off,
size_t size)
> 99 {
> 100 void *addr;
> 101 u32 val;
> 102 int ret;
> 103
> 104 addr = mobiveil_pcie_comp_addr(pcie, off);
> 105
> > 106 ret = mobiveil_pcie_read(addr, size, &val);
> 107 if (ret)
> 108 dev_err(&pcie->pdev->dev, "read CSR address
failed\n");
> 109
> 110 return val;
> 111 }
> 112
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
>
https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.01.org%2Fhyperkitty%2Flist%2Fkbuild-all%40lists.01.org&data=02%7
>
C01%7CZhiqiang.Hou%40nxp.com%7Cbad5744a08474921885708d7c9943e5
5%7C686e
>
a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637199510855139236&am
p;sdata=3s
> myLkc9JOt1UxJz8yn0u5fUxlb8pTdBpDsiuHzvnyQ%3D&reserved=0