12:27 p.m.
Hi Andrey,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on cryptodev/master]
[also build test ERROR on next-20200316]
[cannot apply to crypto/master v5.6-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Andrey-Smirnov/enable-CAAM-s-HWR...
base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.2.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=9.2.0 make.cross ARCH=arm64
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp(a)intel.com>
All error/warnings (new ones prefixed by >>):
> drivers/crypto/caam/ctrl.c:583:34: warning: 'struct
fsl_mc_version' declared inside parameter list will not be visible outside of this
definition or declaration
583 | static bool check_version(struct fsl_mc_version
*mc_version, u32 major,
| ^~~~~~~~~~~~~~
drivers/crypto/caam/ctrl.c: In function 'check_version':
> drivers/crypto/caam/ctrl.c:586:16: error: dereferencing pointer
to incomplete type 'struct fsl_mc_version'
586 | if
(mc_version->major > major)
| ^~
drivers/crypto/caam/ctrl.c: In function 'caam_probe':
> drivers/crypto/caam/ctrl.c:714:16: error: implicit declaration of
function 'fsl_mc_get_version'; did you mean 'fsl_mc_get_endpoint'?
[-Werror=implicit-function-declaration]
714 | mc_version =
fsl_mc_get_version();
| ^~~~~~~~~~~~~~~~~~
| fsl_mc_get_endpoint
> drivers/crypto/caam/ctrl.c:714:14: warning: assignment to
'struct fsl_mc_version *' from 'int' makes pointer from integer without a
cast [-Wint-conversion]
714 | mc_version = fsl_mc_get_version();
| ^
> drivers/crypto/caam/ctrl.c:716:31: error: passing argument 1 of
'check_version' from incompatible pointer type
[-Werror=incompatible-pointer-types]
716 | pr_support =
check_version(mc_version, 10, 20, 0);
| ^~~~~~~~~~
| |
| struct fsl_mc_version *
drivers/crypto/caam/ctrl.c:583:50: note: expected 'struct fsl_mc_version *' but
argument is of type 'struct fsl_mc_version *'
583 | static bool check_version(struct fsl_mc_version *mc_version, u32 major,
| ~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~
cc1: some warnings being treated as errors
vim +586 drivers/crypto/caam/ctrl.c
581
582 #ifdef CONFIG_FSL_MC_BUS
583 static bool check_version(struct fsl_mc_version *mc_version, u32
major,
584 u32 minor, u32 revision)
585 {
586 if (mc_version->major > major)
587 return
true;
588
589 if (mc_version->major == major) {
590 if (mc_version->minor > minor)
591 return true;
592
593 if (mc_version->minor == minor && mc_version->revision > 0)
594 return true;
595 }
596
597 return false;
598 }
599 #endif
600
601
602 /* Probe routine for CAAM top (controller) level */
603 static int caam_probe(struct platform_device *pdev)
604 {
605 int ret, ring, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
606 u64 caam_id;
607 const struct soc_device_attribute *imx_soc_match;
608 struct device *dev;
609 struct device_node *nprop, *np;
610 struct caam_ctrl __iomem *ctrl;
611 struct caam_drv_private *ctrlpriv;
612 #ifdef CONFIG_DEBUG_FS
613 struct caam_perfmon *perfmon;
614 struct dentry *dfs_root;
615 #endif
616 u32 scfgr, comp_params;
617 u8 rng_vid;
618 int pg_size;
619 int BLOCK_OFFSET = 0;
620 bool pr_support = false;
621
622 ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL);
623 if (!ctrlpriv)
624 return -ENOMEM;
625
626 dev = &pdev->dev;
627 dev_set_drvdata(dev, ctrlpriv);
628 nprop = pdev->dev.of_node;
629
630 imx_soc_match = soc_device_match(caam_imx_soc_table);
631 caam_imx = (bool)imx_soc_match;
632
633 if (imx_soc_match) {
634 if (!imx_soc_match->data) {
635 dev_err(dev, "No clock data provided for i.MX SoC");
636 return -EINVAL;
637 }
638
639 ret = init_clocks(dev, imx_soc_match->data);
640 if (ret)
641 return ret;
642 }
643
644
645 /* Get configuration properties from device tree */
646 /* First, get register page */
647 ctrl = devm_of_iomap(dev, nprop, 0, NULL);
648 ret = PTR_ERR_OR_ZERO(ctrl);
649 if (ret) {
650 dev_err(dev, "caam: of_iomap() failed\n");
651 return ret;
652 }
653
654 caam_little_end = !(bool)(rd_reg32(&ctrl->perfmon.status) &
655 (CSTA_PLEND | CSTA_ALT_PLEND));
656 comp_params = rd_reg32(&ctrl->perfmon.comp_parms_ms);
657 if (comp_params & CTPR_MS_PS && rd_reg32(&ctrl->mcr) &
MCFGR_LONG_PTR)
658 caam_ptr_sz = sizeof(u64);
659 else
660 caam_ptr_sz = sizeof(u32);
661 caam_dpaa2 = !!(comp_params & CTPR_MS_DPAA2);
662 ctrlpriv->qi_present = !!(comp_params & CTPR_MS_QI_MASK);
663
664 #ifdef CONFIG_CAAM_QI
665 /* If (DPAA 1.x) QI present, check whether dependencies are available */
666 if (ctrlpriv->qi_present && !caam_dpaa2) {
667 ret = qman_is_probed();
668 if (!ret) {
669 return -EPROBE_DEFER;
670 } else if (ret < 0) {
671 dev_err(dev, "failing probe due to qman probe error\n");
672 return -ENODEV;
673 }
674
675 ret = qman_portals_probed();
676 if (!ret) {
677 return -EPROBE_DEFER;
678 } else if (ret < 0) {
679 dev_err(dev, "failing probe due to qman portals probe error\n");
680 return -ENODEV;
681 }
682 }
683 #endif
684
685 /* Allocating the BLOCK_OFFSET based on the supported page size on
686 * the platform
687 */
688 pg_size = (comp_params & CTPR_MS_PG_SZ_MASK) >> CTPR_MS_PG_SZ_SHIFT;
689 if (pg_size == 0)
690 BLOCK_OFFSET = PG_SIZE_4K;
691 else
692 BLOCK_OFFSET = PG_SIZE_64K;
693
694 ctrlpriv->ctrl = (struct caam_ctrl __iomem __force *)ctrl;
695 ctrlpriv->assure = (struct caam_assurance __iomem __force *)
696 ((__force uint8_t *)ctrl +
697 BLOCK_OFFSET * ASSURE_BLOCK_NUMBER
698 );
699 ctrlpriv->deco = (struct caam_deco __iomem __force *)
700 ((__force uint8_t *)ctrl +
701 BLOCK_OFFSET * DECO_BLOCK_NUMBER
702 );
703
704 /* Get the IRQ of the controller (for security violations only) */
705 ctrlpriv->secvio_irq = irq_of_parse_and_map(nprop, 0);
706 np = of_find_compatible_node(NULL, NULL, "fsl,qoriq-mc");
707 ctrlpriv->mc_en = !!np;
708 of_node_put(np);
709
710 #ifdef CONFIG_FSL_MC_BUS
711 if (ctrlpriv->mc_en) {
712 struct fsl_mc_version *mc_version;
713
714 mc_version = fsl_mc_get_version();
715 if
(mc_version)
716 pr_support = check_version(mc_version, 10, 20, 0);
717 else
718 return -EPROBE_DEFER;
719 }
720 #endif
721
722 /*
723 * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
724 * long pointers in master configuration register.
725 * In case of SoCs with Management Complex, MC f/w performs
726 * the configuration.
727 */
728 if (!ctrlpriv->mc_en)
729 clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK,
730 MCFGR_AWCACHE_CACH | MCFGR_AWCACHE_BUFF |
731 MCFGR_WDENABLE | MCFGR_LARGE_BURST);
732
733 handle_imx6_err005766(&ctrl->mcr);
734
735 /*
736 * Read the Compile Time paramters and SCFGR to determine
737 * if Virtualization is enabled for this platform
738 */
739 scfgr = rd_reg32(&ctrl->scfgr);
740
741 ctrlpriv->virt_en = 0;
742 if (comp_params & CTPR_MS_VIRT_EN_INCL) {
743 /* VIRT_EN_INCL = 1 & VIRT_EN_POR = 1 or
744 * VIRT_EN_INCL = 1 & VIRT_EN_POR = 0 & SCFGR_VIRT_EN = 1
745 */
746 if ((comp_params & CTPR_MS_VIRT_EN_POR) ||
747 (!(comp_params & CTPR_MS_VIRT_EN_POR) &&
748 (scfgr & SCFGR_VIRT_EN)))
749 ctrlpriv->virt_en = 1;
750 } else {
751 /* VIRT_EN_INCL = 0 && VIRT_EN_POR_VALUE = 1 */
752 if (comp_params & CTPR_MS_VIRT_EN_POR)
753 ctrlpriv->virt_en = 1;
754 }
755
756 if (ctrlpriv->virt_en == 1)
757 clrsetbits_32(&ctrl->jrstart, 0, JRSTART_JR0_START |
758 JRSTART_JR1_START | JRSTART_JR2_START |
759 JRSTART_JR3_START);
760
761 ret = dma_set_mask_and_coherent(dev, caam_get_dma_mask(dev));
762 if (ret) {
763 dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret);
764 return ret;
765 }
766
767 ctrlpriv->era = caam_get_era(ctrl);
768 ctrlpriv->domain = iommu_get_domain_for_dev(dev);
769
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org