[kbuild-all] [nbdd0121:riscv 1/4] arch/riscv/kernel/head.S:232: Error: unrecognized opcode `csrw, CSR_MCOUNTEREN,2'

tree: https://github.com/nbdd0121/linux riscv head: 696be59be32488c7c2417cd633008c2162f89fa8 commit: 4481ee1b02354fde9960268a3fd8d638124aba1a [1/4] riscv: enable TIME CSR in U mode config: riscv-nommu_k210_defconfig (https://download.01.org/0day-ci/archive/20211218/202112181138.GXFKRI6J-lk...) compiler: riscv64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/nbdd0121/linux/commit/4481ee1b02354fde9960268a3fd8d638... git remote add nbdd0121 https://github.com/nbdd0121/linux git fetch --no-tags nbdd0121 riscv git checkout 4481ee1b02354fde9960268a3fd8d638124aba1a # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash arch/riscv/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): arch/riscv/kernel/head.S: Assembler messages: vim +232 arch/riscv/kernel/head.S 203 204 ENTRY(_start_kernel) 205 /* Mask all interrupts */ 206 csrw CSR_IE, zero 207 csrw CSR_IP, zero 208 209 #ifdef CONFIG_RISCV_M_MODE 210 /* flush the instruction cache */ 211 fence.i 212 213 /* Reset all registers except ra, a0, a1 */ 214 call reset_regs 215 216 /* 217 * Setup a PMP to permit access to all of memory. Some machines may 218 * not implement PMPs, so we set up a quick trap handler to just skip 219 * touching the PMPs on any trap. 220 */ 221 la a0, pmp_done 222 csrw CSR_TVEC, a0 223 224 li a0, -1 225 csrw CSR_PMPADDR0, a0 226 li a0, (PMP_A_NAPOT | PMP_R | PMP_W | PMP_X) 227 csrw CSR_PMPCFG0, a0 228 .align 2 229 pmp_done: 230 231 /* Allow user-mode to access time CSR */ 233 234 /* 235 * The hartid in a0 is expected later on, and we have no firmware 236 * to hand it to us. 237 */ 238 csrr a0, CSR_MHARTID 239 #endif /* CONFIG_RISCV_M_MODE */ 240 241 /* Allow user-mode to access time CSR */ 242 csrw CSR_SCOUNTEREN, 2 243 244 /* Load the global pointer */ 245 .option push 246 .option norelax 247 la gp, __global_pointer$ 248 .option pop 249 250 /* 251 * Disable FPU to detect illegal usage of 252 * floating point in kernel space 253 */ 254 li t0, SR_FS 255 csrc CSR_STATUS, t0 256 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org