tree: https://github.com/atishp04/linux sbi_pmu_v1 head: d82bc37d5a962b33af712da468a82d2ced9eb194 commit: 5009c84a60b998b44c7c8481984b5553bfc0986c [11/14] RISC-V: Add a perf platform driver config: riscv-randconfig-r001-20210318 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project fcc1ce00931751ac02498986feb37744e9ace8de) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install riscv cross compiling tool for clang build # apt-get install binutils-riscv64-linux-gnu # https://github.com/atishp04/linux/commit/5009c84a60b998b44c7c8481984b5553... git remote add atishp04 https://github.com/atishp04/linux git fetch --no-tags atishp04 sbi_pmu_v1 git checkout 5009c84a60b998b44c7c8481984b5553bfc0986c # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=riscv If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): unsigned long csr_read_num(int csr_num) ^ drivers/perf/riscv_pmu.c:36:1: note: declare 'static' if the function is not intended to be used outside of this translation unit unsigned long csr_read_num(int csr_num) ^ static 1 warning generated. vim +/csr_read_num +36 drivers/perf/riscv_pmu.c 35 37 { 38 #define switchcase_csr_read(__csr_num, __val) {\ 39 case __csr_num: \ 40 __val = csr_read(__csr_num); \ 41 break; } 42 #define switchcase_csr_read_2(__csr_num, __val) {\ 43 switchcase_csr_read(__csr_num + 0, __val) \ 44 switchcase_csr_read(__csr_num + 1, __val)} 45 #define switchcase_csr_read_4(__csr_num, __val) {\ 46 switchcase_csr_read_2(__csr_num + 0, __val) \ 47 switchcase_csr_read_2(__csr_num + 2, __val)} 48 #define switchcase_csr_read_8(__csr_num, __val) {\ 49 switchcase_csr_read_4(__csr_num + 0, __val) \ 50 switchcase_csr_read_4(__csr_num + 4, __val)} 51 #define switchcase_csr_read_16(__csr_num, __val) {\ 52 switchcase_csr_read_8(__csr_num + 0, __val) \ 53 switchcase_csr_read_8(__csr_num + 8, __val)} 54 #define switchcase_csr_read_32(__csr_num, __val) {\ 55 switchcase_csr_read_16(__csr_num + 0, __val) \ 56 switchcase_csr_read_16(__csr_num + 16, __val)} 57 58 unsigned long ret = 0; 59 60 switch (csr_num) { 61 switchcase_csr_read_32(CSR_CYCLE, ret) 62 switchcase_csr_read_32(CSR_CYCLEH, ret) 63 default : 64 break; 65 }; 66 67 return ret; 68 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org