tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: 7d9c6b8147bdd76d7eb2cf6f74f84c6918ae0939 commit: e34645f45805d8308866de7b69f117f554605bb6 [8612/10875] ARM: imx: add smp support for imx7d config: arm-randconfig-r011-20210617 (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi... git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout e34645f45805d8308866de7b69f117f554605bb6 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): 103 | void imx_gpcv2_set_core1_pdn_pup_by_software(bool pdn) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ vim +/imx_gpcv2_set_core1_pdn_pup_by_software +103 arch/arm/mach-imx/src.c 93 94 /* 95 * The motivation for bringing up the second i.MX7D core inside the kernel 96 * is that legacy vendor bootloaders usually do not implement PSCI support. 97 * This is a significant blocker for systems in the field that are running old 98 * bootloader versions to upgrade to a modern mainline kernel version, as only 99 * one CPU of the i.MX7D would be brought up. 100 * Bring up the second i.MX7D core inside the kernel to make the migration 101 * path to mainline kernel easier for the existing iMX7D users. 102 */ 104 { 105 u32 reg = pdn ? GPC_CPU_PGC_SW_PDN_REQ : GPC_CPU_PGC_SW_PUP_REQ; 106 u32 val, pup; 107 int ret; 108 109 imx_gpcv2_set_m_core_pgc(true, GPC_PGC_C1); 110 val = readl_relaxed(gpc_base + reg); 111 val |= BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7; 112 writel_relaxed(val, gpc_base + reg); 113 114 ret = readl_relaxed_poll_timeout_atomic(gpc_base + reg, pup, 115 !(pup & BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7), 116 5, 1000000); 117 if (ret < 0) { 118 pr_err("i.MX7D: CORE1_A7 power up timeout\n"); 119 val &= ~BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7; 120 writel_relaxed(val, gpc_base + reg); 121 } 122 123 imx_gpcv2_set_m_core_pgc(false, GPC_PGC_C1); 124 } 125 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org