5:30 a.m.
Hi Joerg,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 2cc3c4b3c2e9c99e90aaf19cd801ff2c160f283c
commit: ad8694bac410e5d72ad610dfb146f58bf2fe0365 iommu/amd: Move AMD IOMMU driver into
subdirectory
date: 10 weeks ago
config: x86_64-randconfig-r034-20200817 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
git checkout ad8694bac410e5d72ad610dfb146f58bf2fe0365
# save the attached .config to linux build tree
make W=1 ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>):
> drivers/iommu/amd/init.c:3073:19: warning: no previous prototype
for 'get_amd_iommu' [-Wmissing-prototypes]
3073 | struct amd_iommu
*get_amd_iommu(unsigned int idx)
| ^~~~~~~~~~~~~
> drivers/iommu/amd/init.c:3092:4: warning: no previous prototype
for 'amd_iommu_pc_get_max_banks' [-Wmissing-prototypes]
3092 | u8
amd_iommu_pc_get_max_banks(unsigned int idx)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/iommu/amd/init.c:3103:6: warning: no previous prototype
for 'amd_iommu_pc_supported' [-Wmissing-prototypes]
3103 | bool
amd_iommu_pc_supported(void)
| ^~~~~~~~~~~~~~~~~~~~~~
> drivers/iommu/amd/init.c:3109:4: warning: no previous prototype
for 'amd_iommu_pc_get_max_counters' [-Wmissing-prototypes]
3109 | u8
amd_iommu_pc_get_max_counters(unsigned int idx)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/iommu/amd/init.c:3158:5: warning: no previous prototype
for 'amd_iommu_pc_get_reg' [-Wmissing-prototypes]
3158 | int
amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value)
| ^~~~~~~~~~~~~~~~~~~~
> drivers/iommu/amd/init.c:3167:5: warning: no previous prototype
for 'amd_iommu_pc_set_reg' [-Wmissing-prototypes]
3167 | int
amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value)
| ^~~~~~~~~~~~~~~~~~~~
#
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit...
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout ad8694bac410e5d72ad610dfb146f58bf2fe0365
vim +/get_amd_iommu +3073 drivers/iommu/amd/init.c
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3072
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 @3073
struct amd_iommu *get_amd_iommu(unsigned int idx)
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3074 {
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3075
unsigned int i = 0;
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3076
struct amd_iommu *iommu;
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3077
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3078
for_each_iommu(iommu)
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3079
if (i++ == idx)
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3080
return iommu;
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3081
return NULL;
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3082 }
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3083
EXPORT_SYMBOL(get_amd_iommu);
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3084
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3085
/****************************************************************************
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3086 *
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3087 *
IOMMU EFR Performance Counter support functionality. This code allows
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3088 *
access to the IOMMU PC functionality.
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3089 *
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3090
****************************************************************************/
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3091
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 @3092 u8
amd_iommu_pc_get_max_banks(unsigned int idx)
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3093 {
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3094
struct amd_iommu *iommu = get_amd_iommu(idx);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3095
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3096 if
(iommu)
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3097
return iommu->max_banks;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3098
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3099
return 0;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3100 }
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3101
EXPORT_SYMBOL(amd_iommu_pc_get_max_banks);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3102
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 @3103
bool amd_iommu_pc_supported(void)
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3104 {
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3105
return amd_iommu_pc_present;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3106 }
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3107
EXPORT_SYMBOL(amd_iommu_pc_supported);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3108
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 @3109 u8
amd_iommu_pc_get_max_counters(unsigned int idx)
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3110 {
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3111
struct amd_iommu *iommu = get_amd_iommu(idx);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3112
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3113 if
(iommu)
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3114
return iommu->max_counters;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3115
f5863a00e73c432 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3116
return 0;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3117 }
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3118
EXPORT_SYMBOL(amd_iommu_pc_get_max_counters);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3119
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3120
static int iommu_pc_get_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr,
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3121
u8 fxn, u64 *value, bool is_write)
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3122 {
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3123
u32 offset;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3124
u32 max_offset_lim;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3125
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3126 /*
Make sure the IOMMU PC resource is available */
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3127 if
(!amd_iommu_pc_present)
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3128
return -ENODEV;
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3129
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3130 /*
Check for valid iommu and pc register indexing */
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3131 if
(WARN_ON(!iommu || (fxn > 0x28) || (fxn & 7)))
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3132
return -ENODEV;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3133
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3134
offset = (u32)(((0x40 | bank) << 12) | (cntr << 8) | fxn);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3135
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3136 /*
Limit the offset to the hw defined mmio region aperture */
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3137
max_offset_lim = (u32)(((0x40 | iommu->max_banks) << 12) |
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3138
(iommu->max_counters << 8) | 0x28);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3139 if
((offset < MMIO_CNTR_REG_OFFSET) ||
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3140
(offset > max_offset_lim))
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3141
return -EINVAL;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3142
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3143 if
(is_write) {
0a6d80c70b9150d drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3144
u64 val = *value & GENMASK_ULL(47, 0);
0a6d80c70b9150d drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3145
0a6d80c70b9150d drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3146
writel((u32)val, iommu->mmio_base + offset);
0a6d80c70b9150d drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3147
writel((val >> 32), iommu->mmio_base + offset + 4);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3148 }
else {
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3149
*value = readl(iommu->mmio_base + offset + 4);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3150
*value <<= 32;
0a6d80c70b9150d drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3151
*value |= readl(iommu->mmio_base + offset);
0a6d80c70b9150d drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3152
*value &= GENMASK_ULL(47, 0);
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3153 }
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3154
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3155
return 0;
30861ddc9cca479 drivers/iommu/amd_iommu_init.c Steven L Kinney 2013-06-05 3156 }
38e45d02ea9f194 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2016-02-23 3157
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 @3158 int
amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value)
38e45d02ea9f194 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2016-02-23 3159 {
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3160 if
(!iommu)
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3161
return -EINVAL;
38e45d02ea9f194 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2016-02-23 3162
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3163
return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, false);
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3164 }
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3165
EXPORT_SYMBOL(amd_iommu_pc_get_reg);
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 3166
1650dfd1a9bcde8 drivers/iommu/amd_iommu_init.c Suravee Suthikulpanit 2017-02-24 @3167 int
amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value)
:::::: The code at line 3073 was first introduced by commit
:::::: f5863a00e73c432b91e4efe1d68778b4ace6a892 x86/events/amd/iommu.c: Modify functions
to query max banks and counters
:::::: TO: Suravee Suthikulpanit <Suravee.Suthikulpanit(a)amd.com>
:::::: CC: Ingo Molnar <mingo(a)kernel.org>
---
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