Hi Srinivas, I love your patch! Perhaps something to improve: [auto build test WARNING on asoc/for-next] [also build test WARNING on v5.11-rc6 next-20210125] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Srinivas-Kandagatla/ASoC-codecs-... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next config: arm64-randconfig-r013-20210209 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project c9439ca36342fb6013187d0a69aef92736951476) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://github.com/0day-ci/linux/commit/bac854a0c3da12f3b44c7b2f3e89843ad... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Srinivas-Kandagatla/ASoC-codecs-add-support-for-LPASS-Codec-TX-and-RX-macros/20210209-084643 git checkout bac854a0c3da12f3b44c7b2f3e89843adb6e585e # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): default: ^~~~~~~ sound/soc/codecs/lpass-rx-macro.c:2443:6: note: uninitialized use occurs here if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_ON(event)) { ^~~~~~~~~~~~~~~~~~ sound/soc/codecs/lpass-rx-macro.c:2427:24: note: initialize the variable 'hph_lut_bypass_reg' to silence this warning u16 hph_lut_bypass_reg; ^ = 0 1 warning generated. vim +/hph_lut_bypass_reg +2439 sound/soc/codecs/lpass-rx-macro.c 2422 2423 static void rx_macro_hphdelay_lutbypass(struct snd_soc_component *component, 2424 struct rx_macro *rx, 2425 u16 interp_idx, int event) 2426 { 2427 u16 hph_lut_bypass_reg; 2428 u16 hph_comp_ctrl7; 2429 2430 switch (interp_idx) { 2431 case INTERP_HPHL: 2432 hph_lut_bypass_reg = CDC_RX_TOP_HPHL_COMP_LUT; 2433 hph_comp_ctrl7 = CDC_RX_COMPANDER0_CTL7; 2434 break; 2435 case INTERP_HPHR: 2436 hph_lut_bypass_reg = CDC_RX_TOP_HPHR_COMP_LUT; 2437 hph_comp_ctrl7 = CDC_RX_COMPANDER1_CTL7; 2438 break; 2440 break; 2441 } 2442 2443 if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_ON(event)) { 2444 if (interp_idx == INTERP_HPHL) { 2445 if (rx->is_ear_mode_on) 2446 snd_soc_component_write_field(component, 2447 CDC_RX_RX0_RX_PATH_CFG1, 2448 CDC_RX_RX0_HPH_L_EAR_SEL_MASK, 0x1); 2449 else 2450 snd_soc_component_write_field(component, 2451 hph_lut_bypass_reg, 2452 CDC_RX_TOP_HPH_LUT_BYPASS_MASK, 1); 2453 } else { 2454 snd_soc_component_write_field(component, hph_lut_bypass_reg, 2455 CDC_RX_TOP_HPH_LUT_BYPASS_MASK, 1); 2456 } 2457 if (rx->hph_pwr_mode) 2458 snd_soc_component_write_field(component, hph_comp_ctrl7, 2459 CDC_RX_COMPANDER1_HPH_LOW_PWR_MODE_MASK, 0x0); 2460 } 2461 2462 if (hph_lut_bypass_reg && SND_SOC_DAPM_EVENT_OFF(event)) { 2463 snd_soc_component_write_field(component, 2464 CDC_RX_RX0_RX_PATH_CFG1, 2465 CDC_RX_RX0_HPH_L_EAR_SEL_MASK, 0x0); 2466 snd_soc_component_update_bits(component, hph_lut_bypass_reg, 2467 CDC_RX_TOP_HPH_LUT_BYPASS_MASK, 0); 2468 snd_soc_component_write_field(component, hph_comp_ctrl7, 2469 CDC_RX_COMPANDER1_HPH_LOW_PWR_MODE_MASK, 0x1); 2470 } 2471 } 2472 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org