tree:
https://github.com/alibaba/cloud-kernel.git linux-next
head: e07b931e8ed58352ad4839243454571b6ce59222
commit: a56df460c3ef27d27cbce7f78829ed479e9491aa [293/644] HYGON: x86/cpu: Get cache info
and setup cache cpumap for Hygon Dhyana
config: x86_64-defconfig (attached as .config)
compiler: clang version 11.0.0 (
https://github.com/llvm/llvm-project
bc2b70982be8f5250cd0082a7190f8b417bd4dfe)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git checkout a56df460c3ef27d27cbce7f78829ed479e9491aa
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
arch/x86/kernel/cpu/cacheinfo.c:647:6: warning: no previous prototype for function
'cacheinfo_amd_init_llc_id' [-Wmissing-prototypes]
void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
^
arch/x86/kernel/cpu/cacheinfo.c:647:1: note: declare 'static' if the function is
not intended to be used outside of this translation unit
void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
^
static
> arch/x86/kernel/cpu/cacheinfo.c:685:6: warning: no previous
prototype for function 'cacheinfo_hygon_init_llc_id' [-Wmissing-prototypes]
void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
^
arch/x86/kernel/cpu/cacheinfo.c:685:1: note: declare 'static' if the function is
not intended to be used outside of this translation unit
void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id)
^
static
2 warnings generated.
vim +/cacheinfo_hygon_init_llc_id +685 arch/x86/kernel/cpu/cacheinfo.c
684
685 void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu,
u8 node_id)
686 {
687 /*
688 * We may have multiple LLCs if L3 caches exist, so check if we
689 * have an L3 cache by looking at the L3 cache CPUID leaf.
690 */
691 if (!cpuid_edx(0x80000006))
692 return;
693
694 /*
695 * LLC is at the core complex level.
696 * Core complex ID is ApicId[3] for these processors.
697 */
698 per_cpu(cpu_llc_id, cpu) = c->apicid >> 3;
699 }
700
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org