tree: https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git queue-5.4 head: b84a107dec4aa6399034076be0ce458238b783a6 commit: 66fe450f41911c42744942e0556ba774c3c28989 [89/95] i2c: designware: Adjust bus_freq_hz when refuse high speed mode set config: x86_64-randconfig-r035-20210412 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project 9829f5e6b1bca9b61efc629770d28bb9014dec45) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git/c... git remote add sashal-linux-stable https://git.kernel.org/pub/scm/linux/kernel/git/sashal/linux-stable.git git fetch --no-tags sashal-linux-stable queue-5.4 git checkout 66fe450f41911c42744942e0556ba774c3c28989 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; ^ 1 error generated. vim +/I2C_MAX_FAST_MODE_FREQ +115 drivers/i2c/busses/i2c-designware-master.c 34 35 static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) 36 { 37 const char *mode_str, *fp_str = ""; 38 u32 comp_param1; 39 u32 sda_falling_time, scl_falling_time; 40 struct i2c_timings *t = &dev->timings; 41 u32 ic_clk; 42 int ret; 43 44 ret = i2c_dw_acquire_lock(dev); 45 if (ret) 46 return ret; 47 comp_param1 = dw_readl(dev, DW_IC_COMP_PARAM_1); 48 i2c_dw_release_lock(dev); 49 50 /* Set standard and fast speed dividers for high/low periods */ 51 sda_falling_time = t->sda_fall_ns ?: 300; /* ns */ 52 scl_falling_time = t->scl_fall_ns ?: 300; /* ns */ 53 54 /* Calculate SCL timing parameters for standard mode if not set */ 55 if (!dev->ss_hcnt || !dev->ss_lcnt) { 56 ic_clk = i2c_dw_clk_rate(dev); 57 dev->ss_hcnt = 58 i2c_dw_scl_hcnt(ic_clk, 59 4000, /* tHD;STA = tHIGH = 4.0 us */ 60 sda_falling_time, 61 0, /* 0: DW default, 1: Ideal */ 62 0); /* No offset */ 63 dev->ss_lcnt = 64 i2c_dw_scl_lcnt(ic_clk, 65 4700, /* tLOW = 4.7 us */ 66 scl_falling_time, 67 0); /* No offset */ 68 } 69 dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n", 70 dev->ss_hcnt, dev->ss_lcnt); 71 72 /* 73 * Set SCL timing parameters for fast mode or fast mode plus. Only 74 * difference is the timing parameter values since the registers are 75 * the same. 76 */ 77 if (t->bus_freq_hz == 1000000) { 78 /* 79 * Check are fast mode plus parameters available and use 80 * fast mode if not. 81 */ 82 if (dev->fp_hcnt && dev->fp_lcnt) { 83 dev->fs_hcnt = dev->fp_hcnt; 84 dev->fs_lcnt = dev->fp_lcnt; 85 fp_str = " Plus"; 86 } 87 } 88 /* 89 * Calculate SCL timing parameters for fast mode if not set. They are 90 * needed also in high speed mode. 91 */ 92 if (!dev->fs_hcnt || !dev->fs_lcnt) { 93 ic_clk = i2c_dw_clk_rate(dev); 94 dev->fs_hcnt = 95 i2c_dw_scl_hcnt(ic_clk, 96 600, /* tHD;STA = tHIGH = 0.6 us */ 97 sda_falling_time, 98 0, /* 0: DW default, 1: Ideal */ 99 0); /* No offset */ 100 dev->fs_lcnt = 101 i2c_dw_scl_lcnt(ic_clk, 102 1300, /* tLOW = 1.3 us */ 103 scl_falling_time, 104 0); /* No offset */ 105 } 106 dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n", 107 fp_str, dev->fs_hcnt, dev->fs_lcnt); 108 109 /* Check is high speed possible and fall back to fast mode if not */ 110 if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) == 111 DW_IC_CON_SPEED_HIGH) { 112 if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK) 113 != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) { 114 dev_err(dev->dev, "High Speed not supported!\n"); 116 dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; 117 dev->master_cfg |= DW_IC_CON_SPEED_FAST; 118 dev->hs_hcnt = 0; 119 dev->hs_lcnt = 0; 120 } else if (dev->hs_hcnt && dev->hs_lcnt) { 121 dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n", 122 dev->hs_hcnt, dev->hs_lcnt); 123 } 124 } 125 126 ret = i2c_dw_set_sda_hold(dev); 127 if (ret) 128 goto out; 129 130 switch (dev->master_cfg & DW_IC_CON_SPEED_MASK) { 131 case DW_IC_CON_SPEED_STD: 132 mode_str = "Standard Mode"; 133 break; 134 case DW_IC_CON_SPEED_HIGH: 135 mode_str = "High Speed Mode"; 136 break; 137 default: 138 mode_str = "Fast Mode"; 139 } 140 dev_dbg(dev->dev, "Bus speed: %s%s\n", mode_str, fp_str); 141 142 out: 143 return ret; 144 } 145 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org