Hi Akhil,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on linux/master linus/master v5.8-rc5]
[cannot apply to next-20200717]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Akhil-P-Oommen/Add-support-for-G...
base:
https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-randconfig-r026-20200717 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp(a)intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/msm/adreno/a6xx_gmu.c: In function 'a6xx_gmu_set_freq':
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c:136:3: error: implicit
declaration of function 'dev_pm_opp_set_bw'; did you mean
'dev_pm_opp_set_rate'? [-Werror=implicit-function-declaration]
136 |
dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
| ^~~~~~~~~~~~~~~~~
| dev_pm_opp_set_rate
cc1: some warnings being treated as errors
vim +136 drivers/gpu/drm/msm/adreno/a6xx_gmu.c
105
106 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
107 {
108 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
109 struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);
110 struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
111 u32 perf_index;
112 unsigned long gpu_freq;
113 int ret = 0;
114
115 gpu_freq = dev_pm_opp_get_freq(opp);
116
117 if (gpu_freq == gmu->freq)
118 return;
119
120 for (perf_index = 0; perf_index < gmu->nr_gpu_freqs - 1; perf_index++)
121 if (gpu_freq == gmu->gpu_freqs[perf_index])
122 break;
123
124 gmu->current_perf_index = perf_index;
125 gmu->freq = gmu->gpu_freqs[perf_index];
126
127 /*
128 * This can get called from devfreq while the hardware is idle. Don't
129 * bring up the power if it isn't already active
130 */
131 if (pm_runtime_get_if_in_use(gmu->dev) == 0)
132 return;
133
134 if (!gmu->legacy) {
135 a6xx_hfi_set_freq(gmu, perf_index);
136 dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
137 pm_runtime_put(gmu->dev);
138 return;
139 }
140
141 gmu_write(gmu, REG_A6XX_GMU_DCVS_ACK_OPTION, 0);
142
143 gmu_write(gmu, REG_A6XX_GMU_DCVS_PERF_SETTING,
144 ((3 & 0xf) << 28) | perf_index);
145
146 /*
147 * Send an invalid index as a vote for the bus bandwidth and let the
148 * firmware decide on the right vote
149 */
150 gmu_write(gmu, REG_A6XX_GMU_DCVS_BW_SETTING, 0xff);
151
152 /* Set and clear the OOB for DCVS to trigger the GMU */
153 a6xx_gmu_set_oob(gmu, GMU_OOB_DCVS_SET);
154 a6xx_gmu_clear_oob(gmu, GMU_OOB_DCVS_SET);
155
156 ret = gmu_read(gmu, REG_A6XX_GMU_DCVS_RETURN);
157 if (ret)
158 dev_err(gmu->dev, "GMU set GPU frequency error: %d\n", ret);
159
160 dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
161 pm_runtime_put(gmu->dev);
162 }
163
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0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org