Hi Nicholas, First bad commit (maybe != root cause): tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: b0795f0f47d7425836ff90b96aea3bd5b73505b2 commit: 38ddc4babe032e67a554ef46e398aac1af5f724e [6924/8476] drm/amd/display: Add DC DCN3.1 support to Kconfig config: powerpc-randconfig-r006-20210610 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project d2012d965d60c3258b3a69d024491698f8aec386) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc cross compiling tool for clang build # apt-get install binutils-powerpc-linux-gnu # https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commi... git remote add linux-next https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git git fetch --no-tags linux-next master git checkout 38ddc4babe032e67a554ef46e398aac1af5f724e # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c:26: In file included from include/linux/delay.h:22: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:32: In file included from arch/powerpc/include/asm/bitops.h:62: arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined] #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") ^ <built-in>:310:9: note: previous definition is here #define __lwsync __builtin_ppc_lwsync ^ int dcn31_smu_send_msg_with_param( ^ drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c:98:1: note: declare 'static' if the function is not intended to be used outside of this translation unit int dcn31_smu_send_msg_with_param( ^ static 2 warnings generated. -- In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:28: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/inc/hw/dccg.h:29: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:32: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:30: In file included from include/linux/kgdb.h:18: In file included from include/linux/atomic.h:7: In file included from arch/powerpc/include/asm/atomic.h:11: In file included from arch/powerpc/include/asm/cmpxchg.h:8: In file included from include/linux/bug.h:5: In file included from arch/powerpc/include/asm/bug.h:109: In file included from include/asm-generic/bug.h:20: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:32: In file included from arch/powerpc/include/asm/bitops.h:62: arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined] #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") ^ <built-in>:310:9: note: previous definition is here #define __lwsync __builtin_ppc_lwsync ^ int dcn31_get_active_display_cnt_wa( ^ drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:54:1: note: declare 'static' if the function is not intended to be used outside of this translation unit int dcn31_get_active_display_cnt_wa( ^ static void dcn31_clk_mgr_helper_populate_bw_params( ^ drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:491:1: note: declare 'static' if the function is not intended to be used outside of this translation unit void dcn31_clk_mgr_helper_populate_bw_params( ^ static 3 warnings generated. -- In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn31/irq_service_dcn31.c:26: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:35: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:30: In file included from include/linux/kgdb.h:18: In file included from include/linux/atomic.h:7: In file included from arch/powerpc/include/asm/atomic.h:11: In file included from arch/powerpc/include/asm/cmpxchg.h:8: In file included from include/linux/bug.h:5: In file included from arch/powerpc/include/asm/bug.h:109: In file included from include/asm-generic/bug.h:20: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:32: In file included from arch/powerpc/include/asm/bitops.h:62: arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined] #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") ^ <built-in>:310:9: note: previous definition is here #define __lwsync __builtin_ppc_lwsync ^ enum dc_irq_source to_dal_irq_source_dcn31( ^ drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn31/irq_service_dcn31.c:39:1: note: declare 'static' if the function is not intended to be used outside of this translation unit enum dc_irq_source to_dal_irq_source_dcn31( ^ static 2 warnings generated. -- In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:27: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc.h:29: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:32: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:30: In file included from include/linux/kgdb.h:18: In file included from include/linux/atomic.h:7: In file included from arch/powerpc/include/asm/atomic.h:11: In file included from arch/powerpc/include/asm/cmpxchg.h:8: In file included from include/linux/bug.h:5: In file included from arch/powerpc/include/asm/bug.h:109: In file included from include/asm-generic/bug.h:20: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:32: In file included from arch/powerpc/include/asm/bitops.h:62: arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined] #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") ^ <built-in>:310:9: note: previous definition is here #define __lwsync __builtin_ppc_lwsync ^ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(struct display_mode_lib *mode_lib) ^ void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib) ^ 3 warnings generated. -- In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.c:28: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/../display_mode_lib.h:28: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:35: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:30: In file included from include/linux/kgdb.h:18: In file included from include/linux/atomic.h:7: In file included from arch/powerpc/include/asm/atomic.h:11: In file included from arch/powerpc/include/asm/cmpxchg.h:8: In file included from include/linux/bug.h:5: In file included from arch/powerpc/include/asm/bug.h:109: In file included from include/asm-generic/bug.h:20: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:32: In file included from arch/powerpc/include/asm/bitops.h:62: arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined] #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") ^ <built-in>:310:9: note: previous definition is here #define __lwsync __builtin_ppc_lwsync ^ unsigned int dispclk_delay_subtotal; ^ unsigned int dppclk_delay_subtotal; ^ void dml31_rq_dlg_get_dlg_reg( ^ 4 warnings generated. -- In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:27: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:35: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29: In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:30: In file included from include/linux/kgdb.h:18: In file included from include/linux/atomic.h:7: In file included from arch/powerpc/include/asm/atomic.h:11: In file included from arch/powerpc/include/asm/cmpxchg.h:8: In file included from include/linux/bug.h:5: In file included from arch/powerpc/include/asm/bug.h:109: In file included from include/asm-generic/bug.h:20: In file included from include/linux/kernel.h:12: In file included from include/linux/bitops.h:32: In file included from arch/powerpc/include/asm/bitops.h:62: arch/powerpc/include/asm/barrier.h:49:9: warning: '__lwsync' macro redefined [-Wmacro-redefined] #define __lwsync() __asm__ __volatile__ (stringify_in_c(LWSYNC) : : :"memory") ^ <built-in>:310:9: note: previous definition is here #define __lwsync __builtin_ppc_lwsync ^ stream_enc_regs(0), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:83:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:465:2: note: previous initialization is here stream_enc_regs(0), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:101:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:33:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ stream_enc_regs(0), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:107:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:93:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:465:2: note: previous initialization is here stream_enc_regs(0), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:102:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:43:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ stream_enc_regs(0), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:108:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(DIG_FE_CNTL, DIG, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:103:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:465:2: note: previous initialization is here stream_enc_regs(0), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:50:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(DIG_FE_CNTL, DIG, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:14:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:466:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] stream_enc_regs(1), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:106:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:219:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:466:2: note: previous initialization is here stream_enc_regs(1), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:101:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(DP_SEC_METADATA_TRANSMISSION, DP, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:263:25: note: expanded from macro 'BASE_INNER' #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg ^ <scratch space>:169:1: note: expanded from here DCN_BASE__INST0_SEG2 ^ drivers/gpu/drm/amd/amdgpu/../include/yellow_carp_offset.h:388:52: note: expanded from macro 'DCN_BASE__INST0_SEG2' #define DCN_BASE__INST0_SEG2 0x000034C0 ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:466:2: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides] stream_enc_regs(1), ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:461:2: note: expanded from macro 'stream_enc_regs' SE_DCN3_REG_LIST(id)\ ^~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.h:107:2: note: expanded from macro 'SE_DCN3_REG_LIST' SRI(HDMI_METADATA_PACKET_CONTROL, DIG, id), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.c:272:14: note: expanded from macro 'SRI' .reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ note: (skipping 1 expansions in backtrace; use -fmacro-backtrace-limit=0 to see all) .. vim +/dcn31_smu_send_msg_with_param +98 drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c 118a331516581c Nicholas Kazlauskas 2021-05-19 97 118a331516581c Nicholas Kazlauskas 2021-05-19 @98 int dcn31_smu_send_msg_with_param( 118a331516581c Nicholas Kazlauskas 2021-05-19 99 struct clk_mgr_internal *clk_mgr, 118a331516581c Nicholas Kazlauskas 2021-05-19 100 unsigned int msg_id, unsigned int param) 118a331516581c Nicholas Kazlauskas 2021-05-19 101 { 118a331516581c Nicholas Kazlauskas 2021-05-19 102 uint32_t result; 118a331516581c Nicholas Kazlauskas 2021-05-19 103 118a331516581c Nicholas Kazlauskas 2021-05-19 104 result = dcn31_smu_wait_for_response(clk_mgr, 10, 200000); 118a331516581c Nicholas Kazlauskas 2021-05-19 105 ASSERT(result == VBIOSSMC_Result_OK); 118a331516581c Nicholas Kazlauskas 2021-05-19 106 118a331516581c Nicholas Kazlauskas 2021-05-19 107 if (result == VBIOSSMC_Status_BUSY) { 118a331516581c Nicholas Kazlauskas 2021-05-19 108 return -1; 118a331516581c Nicholas Kazlauskas 2021-05-19 109 } 118a331516581c Nicholas Kazlauskas 2021-05-19 110 118a331516581c Nicholas Kazlauskas 2021-05-19 111 /* First clear response register */ 118a331516581c Nicholas Kazlauskas 2021-05-19 112 REG_WRITE(MP1_SMN_C2PMSG_91, VBIOSSMC_Status_BUSY); 118a331516581c Nicholas Kazlauskas 2021-05-19 113 118a331516581c Nicholas Kazlauskas 2021-05-19 114 /* Set the parameter register for the SMU message, unit is Mhz */ 118a331516581c Nicholas Kazlauskas 2021-05-19 115 REG_WRITE(MP1_SMN_C2PMSG_83, param); 118a331516581c Nicholas Kazlauskas 2021-05-19 116 118a331516581c Nicholas Kazlauskas 2021-05-19 117 /* Trigger the message transaction by writing the message ID */ 118a331516581c Nicholas Kazlauskas 2021-05-19 118 REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); 118a331516581c Nicholas Kazlauskas 2021-05-19 119 118a331516581c Nicholas Kazlauskas 2021-05-19 120 result = dcn31_smu_wait_for_response(clk_mgr, 10, 200000); 118a331516581c Nicholas Kazlauskas 2021-05-19 121 118a331516581c Nicholas Kazlauskas 2021-05-19 122 if (IS_SMU_TIMEOUT(result)) { 118a331516581c Nicholas Kazlauskas 2021-05-19 123 ASSERT(0); 118a331516581c Nicholas Kazlauskas 2021-05-19 124 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); 118a331516581c Nicholas Kazlauskas 2021-05-19 125 } 118a331516581c Nicholas Kazlauskas 2021-05-19 126 118a331516581c Nicholas Kazlauskas 2021-05-19 127 return REG_READ(MP1_SMN_C2PMSG_83); 118a331516581c Nicholas Kazlauskas 2021-05-19 128 } 118a331516581c Nicholas Kazlauskas 2021-05-19 129 :::::: The code at line 98 was first introduced by commit :::::: 118a331516581c3acf1279857b0f663a54b7f31b drm/amd/display: Add DCN3.1 clock manager support :::::: TO: Nicholas Kazlauskas <nicholas.kazlauskas(a)amd.com&gt; :::::: CC: Alex Deucher <alexander.deucher(a)amd.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org