tree: https://github.com/miquelraynal/linux-0day.git perso/nand-next/flags head: c5212e24213cba25bcc57e3bbe0781f3e9d83611 commit: ff9915e8d4d5cb9992ed7b6eb907856c593193ab [89/102] migrate nand_uses_dma to nand controller options config: h8300-randconfig-r003-20200512 (attached as .config) compiler: h8300-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout ff9915e8d4d5cb9992ed7b6eb907856c593193ab # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=h8300 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): drivers/mtd/nand/raw/stm32_fmc2_nand.c: In function 'stm32_fmc2_probe': 1952 | chip->controller->flags |= NAND_USES_DMA; | ^~~~~~~~~~~~~ drivers/mtd/nand/raw/stm32_fmc2_nand.c:1952:29: note: each undeclared identifier is reported only once for each function it appears in vim +/NAND_USES_DMA +1952 drivers/mtd/nand/raw/stm32_fmc2_nand.c 1851 1852 static int stm32_fmc2_probe(struct platform_device *pdev) 1853 { 1854 struct device *dev = &pdev->dev; 1855 struct reset_control *rstc; 1856 struct stm32_fmc2_nfc *fmc2; 1857 struct stm32_fmc2_nand *nand; 1858 struct resource *res; 1859 struct mtd_info *mtd; 1860 struct nand_chip *chip; 1861 int chip_cs, mem_region, ret, irq; 1862 1863 fmc2 = devm_kzalloc(dev, sizeof(*fmc2), GFP_KERNEL); 1864 if (!fmc2) 1865 return -ENOMEM; 1866 1867 fmc2->dev = dev; 1868 nand_controller_init(&fmc2->base); 1869 fmc2->base.ops = &stm32_fmc2_nand_controller_ops; 1870 1871 ret = stm32_fmc2_parse_dt(fmc2); 1872 if (ret) 1873 return ret; 1874 1875 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1876 fmc2->io_base = devm_ioremap_resource(dev, res); 1877 if (IS_ERR(fmc2->io_base)) 1878 return PTR_ERR(fmc2->io_base); 1879 1880 fmc2->io_phys_addr = res->start; 1881 1882 for (chip_cs = 0, mem_region = 1; chip_cs < FMC2_MAX_CE; 1883 chip_cs++, mem_region += 3) { 1884 if (!(fmc2->cs_assigned & BIT(chip_cs))) 1885 continue; 1886 1887 res = platform_get_resource(pdev, IORESOURCE_MEM, mem_region); 1888 fmc2->data_base[chip_cs] = devm_ioremap_resource(dev, res); 1889 if (IS_ERR(fmc2->data_base[chip_cs])) 1890 return PTR_ERR(fmc2->data_base[chip_cs]); 1891 1892 fmc2->data_phys_addr[chip_cs] = res->start; 1893 1894 res = platform_get_resource(pdev, IORESOURCE_MEM, 1895 mem_region + 1); 1896 fmc2->cmd_base[chip_cs] = devm_ioremap_resource(dev, res); 1897 if (IS_ERR(fmc2->cmd_base[chip_cs])) 1898 return PTR_ERR(fmc2->cmd_base[chip_cs]); 1899 1900 res = platform_get_resource(pdev, IORESOURCE_MEM, 1901 mem_region + 2); 1902 fmc2->addr_base[chip_cs] = devm_ioremap_resource(dev, res); 1903 if (IS_ERR(fmc2->addr_base[chip_cs])) 1904 return PTR_ERR(fmc2->addr_base[chip_cs]); 1905 } 1906 1907 irq = platform_get_irq(pdev, 0); 1908 if (irq < 0) 1909 return irq; 1910 1911 ret = devm_request_irq(dev, irq, stm32_fmc2_irq, 0, 1912 dev_name(dev), fmc2); 1913 if (ret) { 1914 dev_err(dev, "failed to request irq\n"); 1915 return ret; 1916 } 1917 1918 init_completion(&fmc2->complete); 1919 1920 fmc2->clk = devm_clk_get(dev, NULL); 1921 if (IS_ERR(fmc2->clk)) 1922 return PTR_ERR(fmc2->clk); 1923 1924 ret = clk_prepare_enable(fmc2->clk); 1925 if (ret) { 1926 dev_err(dev, "can not enable the clock\n"); 1927 return ret; 1928 } 1929 1930 rstc = devm_reset_control_get(dev, NULL); 1931 if (IS_ERR(rstc)) { 1932 ret = PTR_ERR(rstc); 1933 if (ret == -EPROBE_DEFER) 1934 goto err_clk_disable; 1935 } else { 1936 reset_control_assert(rstc); 1937 reset_control_deassert(rstc); 1938 } 1939 1940 ret = stm32_fmc2_dma_setup(fmc2); 1941 if (ret) 1942 goto err_release_dma; 1943 1944 stm32_fmc2_init(fmc2); 1945 1946 nand = &fmc2->nand; 1947 chip = &nand->chip; 1948 mtd = nand_to_mtd(chip); 1949 mtd->dev.parent = dev; 1950 1951 chip->controller = &fmc2->base; 1953 chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE; 1954 1955 /* Default ECC settings */ 1956 chip->ecc.mode = NAND_ECC_HW; 1957 chip->ecc.size = FMC2_ECC_STEP_SIZE; 1958 chip->ecc.strength = FMC2_ECC_BCH8; 1959 1960 /* Scan to find existence of the device */ 1961 ret = nand_scan(chip, nand->ncs); 1962 if (ret) 1963 goto err_release_dma; 1964 1965 ret = mtd_device_register(mtd, NULL, 0); 1966 if (ret) 1967 goto err_nand_cleanup; 1968 1969 platform_set_drvdata(pdev, fmc2); 1970 1971 return 0; 1972 1973 err_nand_cleanup: 1974 nand_cleanup(chip); 1975 1976 err_release_dma: 1977 if (fmc2->dma_ecc_ch) 1978 dma_release_channel(fmc2->dma_ecc_ch); 1979 if (fmc2->dma_tx_ch) 1980 dma_release_channel(fmc2->dma_tx_ch); 1981 if (fmc2->dma_rx_ch) 1982 dma_release_channel(fmc2->dma_rx_ch); 1983 1984 sg_free_table(&fmc2->dma_data_sg); 1985 sg_free_table(&fmc2->dma_ecc_sg); 1986 1987 err_clk_disable: 1988 clk_disable_unprepare(fmc2->clk); 1989 1990 return ret; 1991 } 1992 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org