tree: https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git mediatek-cmdq3 head: a0ad19aa8862537be5cd96ac2622f226cf2773d3 commit: a0ad19aa8862537be5cd96ac2622f226cf2773d3 [23/23] mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data config: powerpc64-randconfig-s032-20210219 (attached as .config) compiler: powerpc64-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # apt-get install sparse # sparse version: v0.6.3-229-g60c1f270-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/co... git remote add chunkuang.hu https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git git fetch --no-tags chunkuang.hu mediatek-cmdq3 git checkout a0ad19aa8862537be5cd96ac2622f226cf2773d3 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=powerpc64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All error/warnings (new ones prefixed by >>): In file included from drivers/mailbox/mtk-cmdq-mailbox.c:17: 68 | typedef void (*cmdq_async_flush_cb)(struct cmdq_cb_data data); | ^~~~~~~~~~~~ drivers/mailbox/mtk-cmdq-mailbox.c: In function 'cmdq_task_exec_done': 193 | cb->cb(data); | ^~~~ drivers/mailbox/mtk-cmdq-mailbox.c: In function 'cmdq_mbox_flush': drivers/mailbox/mtk-cmdq-mailbox.c:463:11: error: type of formal parameter 1 is incomplete 463 | cb->cb(data); | ^~~~ vim +193 drivers/mailbox/mtk-cmdq-mailbox.c 623a6143a845bd Houlong Wei 2018-07-25 4 623a6143a845bd Houlong Wei 2018-07-25 5 #include <linux/bitops.h> 623a6143a845bd Houlong Wei 2018-07-25 6 #include <linux/clk.h> 623a6143a845bd Houlong Wei 2018-07-25 7 #include <linux/clk-provider.h> 623a6143a845bd Houlong Wei 2018-07-25 8 #include <linux/dma-mapping.h> 623a6143a845bd Houlong Wei 2018-07-25 9 #include <linux/errno.h> 623a6143a845bd Houlong Wei 2018-07-25 10 #include <linux/interrupt.h> 62e59c4e69b3cd Stephen Boyd 2019-04-18 11 #include <linux/io.h> 623a6143a845bd Houlong Wei 2018-07-25 12 #include <linux/iopoll.h> 623a6143a845bd Houlong Wei 2018-07-25 13 #include <linux/kernel.h> 623a6143a845bd Houlong Wei 2018-07-25 14 #include <linux/module.h> 623a6143a845bd Houlong Wei 2018-07-25 15 #include <linux/platform_device.h> 623a6143a845bd Houlong Wei 2018-07-25 16 #include <linux/mailbox_controller.h> 623a6143a845bd Houlong Wei 2018-07-25 @17 #include <linux/mailbox/mtk-cmdq-mailbox.h> 623a6143a845bd Houlong Wei 2018-07-25 18 #include <linux/of_device.h> 623a6143a845bd Houlong Wei 2018-07-25 19 623a6143a845bd Houlong Wei 2018-07-25 20 #define CMDQ_OP_CODE_MASK (0xff << CMDQ_OP_CODE_SHIFT) 623a6143a845bd Houlong Wei 2018-07-25 21 #define CMDQ_NUM_CMD(t) (t->cmd_buf_size / CMDQ_INST_SIZE) 623a6143a845bd Houlong Wei 2018-07-25 22 623a6143a845bd Houlong Wei 2018-07-25 23 #define CMDQ_CURR_IRQ_STATUS 0x10 6058f11870b8e6 Bibby Hsieh 2019-08-29 24 #define CMDQ_SYNC_TOKEN_UPDATE 0x68 623a6143a845bd Houlong Wei 2018-07-25 25 #define CMDQ_THR_SLOT_CYCLES 0x30 623a6143a845bd Houlong Wei 2018-07-25 26 #define CMDQ_THR_BASE 0x100 623a6143a845bd Houlong Wei 2018-07-25 27 #define CMDQ_THR_SIZE 0x80 623a6143a845bd Houlong Wei 2018-07-25 28 #define CMDQ_THR_WARM_RESET 0x00 623a6143a845bd Houlong Wei 2018-07-25 29 #define CMDQ_THR_ENABLE_TASK 0x04 623a6143a845bd Houlong Wei 2018-07-25 30 #define CMDQ_THR_SUSPEND_TASK 0x08 623a6143a845bd Houlong Wei 2018-07-25 31 #define CMDQ_THR_CURR_STATUS 0x0c 623a6143a845bd Houlong Wei 2018-07-25 32 #define CMDQ_THR_IRQ_STATUS 0x10 623a6143a845bd Houlong Wei 2018-07-25 33 #define CMDQ_THR_IRQ_ENABLE 0x14 623a6143a845bd Houlong Wei 2018-07-25 34 #define CMDQ_THR_CURR_ADDR 0x20 623a6143a845bd Houlong Wei 2018-07-25 35 #define CMDQ_THR_END_ADDR 0x24 623a6143a845bd Houlong Wei 2018-07-25 36 #define CMDQ_THR_WAIT_TOKEN 0x30 623a6143a845bd Houlong Wei 2018-07-25 37 #define CMDQ_THR_PRIORITY 0x40 623a6143a845bd Houlong Wei 2018-07-25 38 623a6143a845bd Houlong Wei 2018-07-25 39 #define CMDQ_THR_ACTIVE_SLOT_CYCLES 0x3200 623a6143a845bd Houlong Wei 2018-07-25 40 #define CMDQ_THR_ENABLED 0x1 623a6143a845bd Houlong Wei 2018-07-25 41 #define CMDQ_THR_DISABLED 0x0 623a6143a845bd Houlong Wei 2018-07-25 42 #define CMDQ_THR_SUSPEND 0x1 623a6143a845bd Houlong Wei 2018-07-25 43 #define CMDQ_THR_RESUME 0x0 623a6143a845bd Houlong Wei 2018-07-25 44 #define CMDQ_THR_STATUS_SUSPENDED BIT(1) 623a6143a845bd Houlong Wei 2018-07-25 45 #define CMDQ_THR_DO_WARM_RESET BIT(0) 623a6143a845bd Houlong Wei 2018-07-25 46 #define CMDQ_THR_IRQ_DONE 0x1 623a6143a845bd Houlong Wei 2018-07-25 47 #define CMDQ_THR_IRQ_ERROR 0x12 623a6143a845bd Houlong Wei 2018-07-25 48 #define CMDQ_THR_IRQ_EN (CMDQ_THR_IRQ_ERROR | CMDQ_THR_IRQ_DONE) 623a6143a845bd Houlong Wei 2018-07-25 49 #define CMDQ_THR_IS_WAITING BIT(31) 623a6143a845bd Houlong Wei 2018-07-25 50 623a6143a845bd Houlong Wei 2018-07-25 51 #define CMDQ_JUMP_BY_OFFSET 0x10000000 623a6143a845bd Houlong Wei 2018-07-25 52 #define CMDQ_JUMP_BY_PA 0x10000001 623a6143a845bd Houlong Wei 2018-07-25 53 623a6143a845bd Houlong Wei 2018-07-25 54 struct cmdq_thread { 623a6143a845bd Houlong Wei 2018-07-25 55 struct mbox_chan *chan; 623a6143a845bd Houlong Wei 2018-07-25 56 void __iomem *base; 623a6143a845bd Houlong Wei 2018-07-25 57 struct list_head task_busy_list; 623a6143a845bd Houlong Wei 2018-07-25 58 u32 priority; 623a6143a845bd Houlong Wei 2018-07-25 59 }; 623a6143a845bd Houlong Wei 2018-07-25 60 623a6143a845bd Houlong Wei 2018-07-25 61 struct cmdq_task { 623a6143a845bd Houlong Wei 2018-07-25 62 struct cmdq *cmdq; 623a6143a845bd Houlong Wei 2018-07-25 63 struct list_head list_entry; 623a6143a845bd Houlong Wei 2018-07-25 64 dma_addr_t pa_base; 623a6143a845bd Houlong Wei 2018-07-25 65 struct cmdq_thread *thread; 623a6143a845bd Houlong Wei 2018-07-25 66 struct cmdq_pkt *pkt; /* the packet sent from mailbox client */ 623a6143a845bd Houlong Wei 2018-07-25 67 }; 623a6143a845bd Houlong Wei 2018-07-25 68 623a6143a845bd Houlong Wei 2018-07-25 69 struct cmdq { 623a6143a845bd Houlong Wei 2018-07-25 70 struct mbox_controller mbox; 623a6143a845bd Houlong Wei 2018-07-25 71 void __iomem *base; 558e4c36ec9f27 Krzysztof Kozlowski 2020-08-27 72 int irq; 623a6143a845bd Houlong Wei 2018-07-25 73 u32 thread_nr; 2c49e4e846bf36 Bibby Hsieh 2019-08-29 74 u32 irq_mask; 623a6143a845bd Houlong Wei 2018-07-25 75 struct cmdq_thread *thread; 623a6143a845bd Houlong Wei 2018-07-25 76 struct clk *clock; 623a6143a845bd Houlong Wei 2018-07-25 77 bool suspended; 0858fde496f84f Dennis YC Hsieh 2020-07-05 78 u8 shift_pa; 623a6143a845bd Houlong Wei 2018-07-25 79 }; 623a6143a845bd Houlong Wei 2018-07-25 80 0858fde496f84f Dennis YC Hsieh 2020-07-05 81 struct gce_plat { 0858fde496f84f Dennis YC Hsieh 2020-07-05 82 u32 thread_nr; 0858fde496f84f Dennis YC Hsieh 2020-07-05 83 u8 shift; 0858fde496f84f Dennis YC Hsieh 2020-07-05 84 }; 0858fde496f84f Dennis YC Hsieh 2020-07-05 85 0858fde496f84f Dennis YC Hsieh 2020-07-05 86 u8 cmdq_get_shift_pa(struct mbox_chan *chan) 0858fde496f84f Dennis YC Hsieh 2020-07-05 87 { 0858fde496f84f Dennis YC Hsieh 2020-07-05 88 struct cmdq *cmdq = container_of(chan->mbox, struct cmdq, mbox); 0858fde496f84f Dennis YC Hsieh 2020-07-05 89 0858fde496f84f Dennis YC Hsieh 2020-07-05 90 return cmdq->shift_pa; 0858fde496f84f Dennis YC Hsieh 2020-07-05 91 } 0858fde496f84f Dennis YC Hsieh 2020-07-05 92 EXPORT_SYMBOL(cmdq_get_shift_pa); 0858fde496f84f Dennis YC Hsieh 2020-07-05 93 623a6143a845bd Houlong Wei 2018-07-25 94 static int cmdq_thread_suspend(struct cmdq *cmdq, struct cmdq_thread *thread) 623a6143a845bd Houlong Wei 2018-07-25 95 { 623a6143a845bd Houlong Wei 2018-07-25 96 u32 status; 623a6143a845bd Houlong Wei 2018-07-25 97 623a6143a845bd Houlong Wei 2018-07-25 98 writel(CMDQ_THR_SUSPEND, thread->base + CMDQ_THR_SUSPEND_TASK); 623a6143a845bd Houlong Wei 2018-07-25 99 623a6143a845bd Houlong Wei 2018-07-25 100 /* If already disabled, treat as suspended successful. */ 623a6143a845bd Houlong Wei 2018-07-25 101 if (!(readl(thread->base + CMDQ_THR_ENABLE_TASK) & CMDQ_THR_ENABLED)) 623a6143a845bd Houlong Wei 2018-07-25 102 return 0; 623a6143a845bd Houlong Wei 2018-07-25 103 623a6143a845bd Houlong Wei 2018-07-25 104 if (readl_poll_timeout_atomic(thread->base + CMDQ_THR_CURR_STATUS, 623a6143a845bd Houlong Wei 2018-07-25 105 status, status & CMDQ_THR_STATUS_SUSPENDED, 0, 10)) { 623a6143a845bd Houlong Wei 2018-07-25 106 dev_err(cmdq->mbox.dev, "suspend GCE thread 0x%x failed\n", 623a6143a845bd Houlong Wei 2018-07-25 107 (u32)(thread->base - cmdq->base)); 623a6143a845bd Houlong Wei 2018-07-25 108 return -EFAULT; 623a6143a845bd Houlong Wei 2018-07-25 109 } 623a6143a845bd Houlong Wei 2018-07-25 110 623a6143a845bd Houlong Wei 2018-07-25 111 return 0; 623a6143a845bd Houlong Wei 2018-07-25 112 } 623a6143a845bd Houlong Wei 2018-07-25 113 623a6143a845bd Houlong Wei 2018-07-25 114 static void cmdq_thread_resume(struct cmdq_thread *thread) 623a6143a845bd Houlong Wei 2018-07-25 115 { 623a6143a845bd Houlong Wei 2018-07-25 116 writel(CMDQ_THR_RESUME, thread->base + CMDQ_THR_SUSPEND_TASK); 623a6143a845bd Houlong Wei 2018-07-25 117 } 623a6143a845bd Houlong Wei 2018-07-25 118 623a6143a845bd Houlong Wei 2018-07-25 119 static void cmdq_init(struct cmdq *cmdq) 623a6143a845bd Houlong Wei 2018-07-25 120 { 6058f11870b8e6 Bibby Hsieh 2019-08-29 121 int i; 6058f11870b8e6 Bibby Hsieh 2019-08-29 122 623a6143a845bd Houlong Wei 2018-07-25 123 WARN_ON(clk_enable(cmdq->clock) < 0); 623a6143a845bd Houlong Wei 2018-07-25 124 writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES); 6058f11870b8e6 Bibby Hsieh 2019-08-29 125 for (i = 0; i <= CMDQ_MAX_EVENT; i++) 6058f11870b8e6 Bibby Hsieh 2019-08-29 126 writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); 623a6143a845bd Houlong Wei 2018-07-25 127 clk_disable(cmdq->clock); 623a6143a845bd Houlong Wei 2018-07-25 128 } 623a6143a845bd Houlong Wei 2018-07-25 129 623a6143a845bd Houlong Wei 2018-07-25 130 static int cmdq_thread_reset(struct cmdq *cmdq, struct cmdq_thread *thread) 623a6143a845bd Houlong Wei 2018-07-25 131 { 623a6143a845bd Houlong Wei 2018-07-25 132 u32 warm_reset; 623a6143a845bd Houlong Wei 2018-07-25 133 623a6143a845bd Houlong Wei 2018-07-25 134 writel(CMDQ_THR_DO_WARM_RESET, thread->base + CMDQ_THR_WARM_RESET); 623a6143a845bd Houlong Wei 2018-07-25 135 if (readl_poll_timeout_atomic(thread->base + CMDQ_THR_WARM_RESET, 623a6143a845bd Houlong Wei 2018-07-25 136 warm_reset, !(warm_reset & CMDQ_THR_DO_WARM_RESET), 623a6143a845bd Houlong Wei 2018-07-25 137 0, 10)) { 623a6143a845bd Houlong Wei 2018-07-25 138 dev_err(cmdq->mbox.dev, "reset GCE thread 0x%x failed\n", 623a6143a845bd Houlong Wei 2018-07-25 139 (u32)(thread->base - cmdq->base)); 623a6143a845bd Houlong Wei 2018-07-25 140 return -EFAULT; 623a6143a845bd Houlong Wei 2018-07-25 141 } 623a6143a845bd Houlong Wei 2018-07-25 142 623a6143a845bd Houlong Wei 2018-07-25 143 return 0; 623a6143a845bd Houlong Wei 2018-07-25 144 } 623a6143a845bd Houlong Wei 2018-07-25 145 623a6143a845bd Houlong Wei 2018-07-25 146 static void cmdq_thread_disable(struct cmdq *cmdq, struct cmdq_thread *thread) 623a6143a845bd Houlong Wei 2018-07-25 147 { 623a6143a845bd Houlong Wei 2018-07-25 148 cmdq_thread_reset(cmdq, thread); 623a6143a845bd Houlong Wei 2018-07-25 149 writel(CMDQ_THR_DISABLED, thread->base + CMDQ_THR_ENABLE_TASK); 623a6143a845bd Houlong Wei 2018-07-25 150 } 623a6143a845bd Houlong Wei 2018-07-25 151 623a6143a845bd Houlong Wei 2018-07-25 152 /* notify GCE to re-fetch commands by setting GCE thread PC */ 623a6143a845bd Houlong Wei 2018-07-25 153 static void cmdq_thread_invalidate_fetched_data(struct cmdq_thread *thread) 623a6143a845bd Houlong Wei 2018-07-25 154 { 623a6143a845bd Houlong Wei 2018-07-25 155 writel(readl(thread->base + CMDQ_THR_CURR_ADDR), 623a6143a845bd Houlong Wei 2018-07-25 156 thread->base + CMDQ_THR_CURR_ADDR); 623a6143a845bd Houlong Wei 2018-07-25 157 } 623a6143a845bd Houlong Wei 2018-07-25 158 623a6143a845bd Houlong Wei 2018-07-25 159 static void cmdq_task_insert_into_thread(struct cmdq_task *task) 623a6143a845bd Houlong Wei 2018-07-25 160 { 623a6143a845bd Houlong Wei 2018-07-25 161 struct device *dev = task->cmdq->mbox.dev; 623a6143a845bd Houlong Wei 2018-07-25 162 struct cmdq_thread *thread = task->thread; 623a6143a845bd Houlong Wei 2018-07-25 163 struct cmdq_task *prev_task = list_last_entry( 623a6143a845bd Houlong Wei 2018-07-25 164 &thread->task_busy_list, typeof(*task), list_entry); 623a6143a845bd Houlong Wei 2018-07-25 165 u64 *prev_task_base = prev_task->pkt->va_base; 623a6143a845bd Houlong Wei 2018-07-25 166 623a6143a845bd Houlong Wei 2018-07-25 167 /* let previous task jump to this task */ 623a6143a845bd Houlong Wei 2018-07-25 168 dma_sync_single_for_cpu(dev, prev_task->pa_base, 623a6143a845bd Houlong Wei 2018-07-25 169 prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE); 623a6143a845bd Houlong Wei 2018-07-25 170 prev_task_base[CMDQ_NUM_CMD(prev_task->pkt) - 1] = 623a6143a845bd Houlong Wei 2018-07-25 171 (u64)CMDQ_JUMP_BY_PA << 32 | task->pa_base; 623a6143a845bd Houlong Wei 2018-07-25 172 dma_sync_single_for_device(dev, prev_task->pa_base, 623a6143a845bd Houlong Wei 2018-07-25 173 prev_task->pkt->cmd_buf_size, DMA_TO_DEVICE); 623a6143a845bd Houlong Wei 2018-07-25 174 623a6143a845bd Houlong Wei 2018-07-25 175 cmdq_thread_invalidate_fetched_data(thread); 623a6143a845bd Houlong Wei 2018-07-25 176 } 623a6143a845bd Houlong Wei 2018-07-25 177 623a6143a845bd Houlong Wei 2018-07-25 178 static bool cmdq_thread_is_in_wfe(struct cmdq_thread *thread) 623a6143a845bd Houlong Wei 2018-07-25 179 { 623a6143a845bd Houlong Wei 2018-07-25 180 return readl(thread->base + CMDQ_THR_WAIT_TOKEN) & CMDQ_THR_IS_WAITING; 623a6143a845bd Houlong Wei 2018-07-25 181 } 623a6143a845bd Houlong Wei 2018-07-25 182 b3c9588dcf542c Chun-Kuang Hu 2021-02-06 183 static void cmdq_task_exec_done(struct cmdq_task *task, int sta) 623a6143a845bd Houlong Wei 2018-07-25 184 { 623a6143a845bd Houlong Wei 2018-07-25 185 struct cmdq_task_cb *cb = &task->pkt->async_cb; 623a6143a845bd Houlong Wei 2018-07-25 186 struct cmdq_cb_data data; 623a6143a845bd Houlong Wei 2018-07-25 187 623a6143a845bd Houlong Wei 2018-07-25 188 WARN_ON(cb->cb == (cmdq_async_flush_cb)NULL); 623a6143a845bd Houlong Wei 2018-07-25 189 data.sta = sta; 623a6143a845bd Houlong Wei 2018-07-25 190 data.data = cb->data; a0ad19aa886253 Chun-Kuang Hu 2021-02-19 191 data.pkt = task->pkt; 5d2d760ebd29c7 Chun-Kuang Hu 2021-02-07 192 if (cb->cb) 623a6143a845bd Houlong Wei 2018-07-25 @193 cb->cb(data); 623a6143a845bd Houlong Wei 2018-07-25 194 5d2d760ebd29c7 Chun-Kuang Hu 2021-02-07 195 mbox_chan_received_data(task->thread->chan, &data); 5d2d760ebd29c7 Chun-Kuang Hu 2021-02-07 196 623a6143a845bd Houlong Wei 2018-07-25 197 list_del(&task->list_entry); 623a6143a845bd Houlong Wei 2018-07-25 198 } 623a6143a845bd Houlong Wei 2018-07-25 199 :::::: The code at line 193 was first introduced by commit :::::: 623a6143a845bd485b00ba684f0ccef11835edab mailbox: mediatek: Add Mediatek CMDQ driver :::::: TO: Houlong Wei <houlong.wei(a)mediatek.com&gt; :::::: CC: Jassi Brar <jaswinder.singh(a)linaro.org&gt; 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