Hi Peter,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on arm-perf/for-next/perf]
[also build test WARNING on linus/master v5.7-rc6]
[cannot apply to arm64/for-next/core next-20200519]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see
https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Peter-Collingbourne/arm64-Expose...
base:
https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git for-next/perf
config: arm64-randconfig-r005-20200520 (attached as .config)
compiler: clang version 11.0.0 (
https://github.com/llvm/llvm-project
3393cc4cebf9969db94dc424b7a2b6195589c33b)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
> arch/arm64/kernel/traps.c:283:55: warning: format specifies type
'unsigned int' but the argument has type 'unsigned long' [-Wformat]
WARN(1, "ESR 0x%x is not DABT or IABT from EL0n", esr);
~~ ^~~
%lx
include/asm-generic/bug.h:124:29: note: expanded from macro 'WARN'
__WARN_printf(TAINT_WARN, format);
^~~~~~
include/asm-generic/bug.h:92:17: note: expanded from macro '__WARN_printf'
__warn_printk(arg);
^~~
arch/arm64/kernel/traps.c:826:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
^~~~~~~~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:827:22: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_WFx] = "WFI/WFE",
^~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:828:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
^~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:829:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
^~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:830:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
^~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:831:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
^~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:832:27: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_FP_ASIMD] = "ASIMD",
^~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:833:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
^~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:834:22: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_PAC] = "PAC",
^~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:835:26: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
^~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:836:22: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_ILL] = "PSTATE.IL",
^~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:837:24: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_SVC32] = "SVC (AArch32)",
^~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:838:24: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_HVC32] = "HVC (AArch32)",
^~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:839:24: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_SMC32] = "SMC (AArch32)",
^~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:840:24: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
[ESR_ELx_EC_SVC64] = "SVC (AArch64)",
^~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:825:28: note: previous initialization is here
[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^~~~~~~~~~~~~~~~~
arch/arm64/kernel/traps.c:841:24: warning: initializer overrides prior initialization of
this subobject [-Winitializer-overrides]
vim +283 arch/arm64/kernel/traps.c
236
237 static unsigned long esr_to_error_code(unsigned long esr, unsigned long far)
238 {
239 /*
240 * If the faulting address is in the kernel, we must sanitize the ESR.
241 * From userspace's point of view, kernel-only mappings don't exist
242 * at all, so we report them as level 0 translation faults.
243 * (This is not quite the way that "no mapping there at all" behaves:
244 * an alignment fault not caused by the memory type would take
245 * precedence over translation fault for a real access to empty
246 * space. Unfortunately we can't easily distinguish "alignment fault
247 * not caused by memory type" from "alignment fault caused by memory
248 * type", so we ignore this wrinkle and just return the translation
249 * fault.)
250 */
251 if (!is_ttbr0_addr(untagged_addr(far))) {
252 switch (ESR_ELx_EC(esr)) {
253 case ESR_ELx_EC_DABT_LOW:
254 /*
255 * These bits provide only information about the
256 * faulting instruction, which userspace knows already.
257 * We explicitly clear bits which are architecturally
258 * RES0 in case they are given meanings in future.
259 * We always report the ESR as if the fault was taken
260 * to EL1 and so ISV and the bits in ISS[23:14] are
261 * clear. (In fact it always will be a fault to EL1.)
262 */
263 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
264 ESR_ELx_CM | ESR_ELx_WNR;
265 esr |= ESR_ELx_FSC_FAULT;
266 break;
267 case ESR_ELx_EC_IABT_LOW:
268 /*
269 * Claim a level 0 translation fault.
270 * All other bits are architecturally RES0 for faults
271 * reported with that DFSC value, so we clear them.
272 */
273 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
274 esr |= ESR_ELx_FSC_FAULT;
275 break;
276 default:
277 /*
278 * This should never happen (entry.S only brings us
279 * into this code for insn and data aborts from a lower
280 * exception level). Fail safe by not providing an ESR
281 * context record at all.
282 */
283 WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n",
esr);
284 esr = 0;
285 break;
286 }
287 }
288
289 if (is_compat_task()) {
290 /* Use the compat FSR WnR */
291 return !!(esr & ESR_ELx_WNR) << FSR_WRITE_SHIFT;
292 }
293
294 return esr;
295 }
296
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org