Hi Daire, Thank you for the patch! Yet something to improve: [auto build test ERROR on c0cc271173b2e1c2d8d0ceaef14e4dfa79eefc0d] url: https://github.com/0day-ci/linux/commits/Daire-McNamara/PCI-microchip-Add... base: c0cc271173b2e1c2d8d0ceaef14e4dfa79eefc0d config: arm-allyesconfig (attached as .config) compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project bee6c234ed28ae7349cb83afa322dfd8394590ee) reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm cross compiling tool for clang build # apt-get install binutils-arm-linux-gnueabi # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): of_get_address(node, 0, &size, 0)); ^~~~~ include/linux/of_address.h:52:12: note: passing argument to parameter 'size' here u64 *size, unsigned int *flags); ^ if (of_property_read_u64(node, "vector-slave", &msi->vector_phy)) ^~~~~~~~~~~~~~~~ include/linux/of.h:327:32: note: passing argument to parameter 'out_value' here const char *propname, u64 *out_value); ^ 2 errors generated. vim +229 drivers/pci/controller/pcie-microchip-host.c 208 209 static int mc_pcie_parse_dt(struct mc_pcie *pcie) 210 { 211 struct platform_device *pdev = pcie->pdev; 212 struct device *dev = &pcie->pdev->dev; 213 struct device_node *node = dev->of_node; 214 struct mc_msi *msi = &pcie->msi; 215 struct resource res; 216 const char *type; 217 resource_size_t size; 218 int ret; 219 void __iomem *axi_base_addr; 220 u64 cfg_addr; 221 222 type = of_get_property(node, "device_type", NULL); 223 if (!type || strcmp(type, "pci")) { 224 dev_err(dev, "invalid \"device_type\" %s\n", type); 225 return -EINVAL; 226 } 227 228 cfg_addr = of_translate_address(node, 230 if (cfg_addr == OF_BAD_ADDR) { 231 dev_err(dev, "missing \"cfg reg\" property\n"); 232 return -ENODEV; 233 } 234 235 pcie->cfg_base_addr = devm_ioremap(dev, cfg_addr, size); 236 pcie->hw_base_addr = cfg_addr; 237 238 pcie->atr_sz = find_first_bit((const unsigned long *)&size, 64) - 1; 239 240 ret = of_address_to_resource(node, 1, &res); 241 if (ret) { 242 dev_err(dev, "missing \"reg\" property\n"); 243 return ret; 244 } 245 246 axi_base_addr = devm_ioremap_resource(dev, &res); 247 if (IS_ERR(axi_base_addr)) 248 return PTR_ERR(axi_base_addr); 249 250 pcie->bridge_base_addr = axi_base_addr + MC_PCIE1_BRIDGE_ADDR; 251 pcie->ctrl_base_addr = axi_base_addr + MC_PCIE1_CTRL_ADDR; 252 254 msi->vector_phy = MC_MSI_OFFSET; 255 256 if (of_property_read_u32(node, "num-vectors", &msi->num_vectors)) 257 msi->num_vectors = MC_NUM_MSI_IRQS; 258 259 pcie->irq = platform_get_irq(pdev, 0); 260 if (pcie->irq < 0) { 261 dev_err(dev, "unable to request IRQ%d\n", pcie->irq); 262 return -ENODEV; 263 } 264 265 return 0; 266 } 267 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org