Hi Khalil, I love your patch! Perhaps something to improve: [auto build test WARNING on wsa/i2c/for-next] [also build test WARNING on robh/for-next linus/master v5.9-rc5 next-20200916] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Khalil-Blaiech/i2c-add-driver-fo... base: https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/for-next config: arm64-allyesconfig (attached as .config) compiler: aarch64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All warnings (new ones prefixed by >>): drivers/i2c/busses/i2c-mlxbf.c: In function 'mlxbf_slave_enable': 1571 | bool exist, avail, disabled; | ^~~~~ # https://github.com/0day-ci/linux/commit/6ba51d0c1d85db9937ab994fa454b0a06... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Khalil-Blaiech/i2c-add-driver-for-Mellanox-BlueField-SoC/20200917-024300 git checkout 6ba51d0c1d85db9937ab994fa454b0a06f98617c vim +/exist +1571 drivers/i2c/busses/i2c-mlxbf.c 1566 1567 static int mlxbf_slave_enable(struct mlxbf_i2c_priv *priv, u8 addr) 1568 { 1569 u32 slave_reg, slave_reg_tmp, slave_reg_avail, slave_addr_mask; 1570 u8 reg, reg_cnt, byte, addr_tmp, reg_avail, byte_avail; 1572 1573 disabled = false; 1574 exist = false; 1575 avail = false; 1576 1577 if (!priv) 1578 return -EPERM; 1579 1580 reg_cnt = MLXBF_I2C_SMBUS_SLAVE_ADDR_CNT >> 2; 1581 slave_addr_mask = MLXBF_I2C_SMBUS_SLAVE_ADDR_MASK; 1582 1583 /* 1584 * Read the slave registers. There are 4 * 32-bit slave registers. 1585 * Each slave register can hold up to 4 * 8-bit slave configuration 1586 * (7-bit address, 1 status bit (1 if enabled, 0 if not)). 1587 */ 1588 for (reg = 0; reg < reg_cnt; reg++) { 1589 slave_reg = mlxbf_i2c_read(priv->smbus->io, 1590 MLXBF_I2C_SMBUS_SLAVE_ADDR_CFG + reg * 0x4); 1591 /* 1592 * Each register holds 4 slave addresses. So, we have to keep 1593 * the byte order consistent with the value read in order to 1594 * update the register correctly, if needed. 1595 */ 1596 slave_reg_tmp = slave_reg; 1597 for (byte = 0; byte < 4; byte++) { 1598 addr_tmp = slave_reg_tmp & GENMASK(7, 0); 1599 1600 /* 1601 * Mark the first available slave address slot, i.e. its 1602 * enabled bit should be unset. This slot might be used 1603 * later on to register our slave. 1604 */ 1605 if (!avail && !MLXBF_I2C_SLAVE_ADDR_ENABLED(addr_tmp)) { 1606 avail = true; 1607 reg_avail = reg; 1608 byte_avail = byte; 1609 slave_reg_avail = slave_reg; 1610 } 1611 1612 /* 1613 * Parse slave address bytes and check whether the 1614 * slave address already exists and it's enabled, 1615 * i.e. most significant bit is set. 1616 */ 1617 if ((addr_tmp & slave_addr_mask) == addr) { 1618 if (MLXBF_I2C_SLAVE_ADDR_ENABLED(addr_tmp)) 1619 return 0; 1620 disabled = true; 1621 break; 1622 } 1623 1624 /* Parse next byte. */ 1625 slave_reg_tmp >>= 8; 1626 } 1627 1628 /* Exit the loop if the slave address is found. */ 1629 if (disabled) 1630 break; 1631 } 1632 1633 if (!avail && !disabled) 1634 return -EINVAL; /* No room for a new slave address. */ 1635 1636 if (avail && !disabled) { 1637 reg = reg_avail; 1638 byte = byte_avail; 1639 /* Set the slave address. */ 1640 slave_reg_avail &= ~(slave_addr_mask << (byte * 8)); 1641 slave_reg_avail |= addr << (byte * 8); 1642 slave_reg = slave_reg_avail; 1643 } 1644 1645 /* Enable the slave address and update the register. */ 1646 slave_reg |= (1 << MLXBF_I2C_SMBUS_SLAVE_ADDR_EN_BIT) << (byte * 8); 1647 mlxbf_i2c_write(priv->smbus->io, 1648 MLXBF_I2C_SMBUS_SLAVE_ADDR_CFG + reg * 0x4, slave_reg); 1649 1650 return 0; 1651 } 1652 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org