tree: https://github.com/miquelraynal/linux-0day.git perso/nand-next/flags head: c5212e24213cba25bcc57e3bbe0781f3e9d83611 commit: e4eb1c918c1ffe4492ebc725336053bceabd4316 [82/102] use macro bit in bbm.h config: h8300-randconfig-r004-20200512 (attached as .config) compiler: h8300-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout e4eb1c918c1ffe4492ebc725336053bceabd4316 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=h8300 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All error/warnings (new ones prefixed by >>): In file included from drivers/mtd/nand/raw/nand_bbt.c:59: drivers/mtd/nand/raw/nand_bbt.c: In function 'read_bbt': 61 | NAND_BBT_3BIT | NAND_BBT_4BIT) | ^~~~~~~~~~~~~ 173 | int bits = td->options & NAND_BBT_NRBITS_MSK; | ^~~~~~~~~~~~~~~~~~~ include/linux/mtd/bbm.h:61:6: note: each undeclared identifier is reported only once for each function it appears in 61 | NAND_BBT_3BIT | NAND_BBT_4BIT) | ^~~~~~~~~~~~~ 173 | int bits = td->options & NAND_BBT_NRBITS_MSK; | ^~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/nand_bbt.c: In function 'write_bbt': 61 | NAND_BBT_3BIT | NAND_BBT_4BIT) | ^~~~~~~~~~~~~ drivers/mtd/nand/raw/nand_bbt.c:768:24: note: in expansion of macro 'NAND_BBT_NRBITS_MSK' 768 | bits = td->options & NAND_BBT_NRBITS_MSK; | ^~~~~~~~~~~~~~~~~~~ drivers/mtd/nand/raw/nand_bbt.c: In function 'verify_bbt_descr': 61 | NAND_BBT_3BIT | NAND_BBT_4BIT) | ^~~~~~~~~~~~~ drivers/mtd/nand/raw/nand_bbt.c:1170:23: note: in expansion of macro 'NAND_BBT_NRBITS_MSK' 1170 | bits = bd->options & NAND_BBT_NRBITS_MSK; | ^~~~~~~~~~~~~~~~~~~ vim +61 include/linux/mtd/bbm.h 54 55 /* The number of bits used per block in the bbt on the device */ 56 #define NAND_BBT_1BIT BIT(0) 57 #define NAND_BBT_2BIT BIT(1) 58 #define NAND_BBT_4BIT BIT(2) 59 #define NAND_BBT_8BIT BIT(3) 60 #define NAND_BBT_NRBITS_MSK (NAND_BBT_1BIT | NAND_BBT_2BIT | \ 62 /* The bad block table is in the last good block of the device */ 63 #define NAND_BBT_LASTBLOCK BIT(4) 64 /* The bbt is at the given page, else we must scan for the bbt */ 65 #define NAND_BBT_ABSPAGE BIT(5) 66 /* bbt is stored per chip on multichip devices */ 67 #define NAND_BBT_PERCHIP BIT(7) 68 /* bbt has a version counter at offset veroffs */ 69 #define NAND_BBT_VERSION BIT(8) 70 /* Create a bbt if none exists */ 71 #define NAND_BBT_CREATE BIT(9) 72 /* 73 * Create an empty BBT with no vendor information. Vendor's information may be 74 * unavailable, for example, if the NAND controller has a different data and OOB 75 * layout or if this information is already purged. Must be used in conjunction 76 * with NAND_BBT_CREATE. 77 */ 78 #define NAND_BBT_CREATE_EMPTY BIT(10) 79 /* Write bbt if neccecary */ 80 #define NAND_BBT_WRITE BIT(13) 81 /* Read and write back block contents when writing bbt */ 82 #define NAND_BBT_SAVECONTENT BIT(14) 83 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org