tree:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
head: fb57b1fabcb28f358901b2df90abd2b48abc1ca8
commit: 4259ff7ae509ed880b3a7bb685972c3a3bf4b74b [10249/10701] drm/msm/dpu: add support
for pcc color block in dpu driver
config: arm-randconfig-r013-20200519 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 4259ff7ae509ed880b3a7bb685972c3a3bf4b74b
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp(a)intel.com>
All warnings (new ones prefixed by >>, old ones prefixed by <<):
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c:25:6: warning: no
previous prototype for 'dpu_setup_dspp_pcc' [-Wmissing-prototypes]
25 | void
dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
| ^~~~~~~~~~~~~~~~~~
vim +/dpu_setup_dspp_pcc +25 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
24
25 void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
26 struct dpu_hw_pcc_cfg *cfg)
27 {
28
29 u32 base = ctx->cap->sblk->pcc.base;
30
31 if (!ctx || !base) {
32 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base);
33 return;
34 }
35
36 if (!cfg) {
37 DRM_DEBUG_DRIVER("disable pcc feature\n");
38 DPU_REG_WRITE(&ctx->hw, base, PCC_DIS);
39 return;
40 }
41
42 DPU_REG_WRITE(&ctx->hw, base + PCC_RED_R_OFF, cfg->r.r);
43 DPU_REG_WRITE(&ctx->hw, base + PCC_RED_G_OFF, cfg->r.g);
44 DPU_REG_WRITE(&ctx->hw, base + PCC_RED_B_OFF, cfg->r.b);
45
46 DPU_REG_WRITE(&ctx->hw, base + PCC_GREEN_R_OFF, cfg->g.r);
47 DPU_REG_WRITE(&ctx->hw, base + PCC_GREEN_G_OFF, cfg->g.g);
48 DPU_REG_WRITE(&ctx->hw, base + PCC_GREEN_B_OFF, cfg->g.b);
49
50 DPU_REG_WRITE(&ctx->hw, base + PCC_BLUE_R_OFF, cfg->b.r);
51 DPU_REG_WRITE(&ctx->hw, base + PCC_BLUE_G_OFF, cfg->b.g);
52 DPU_REG_WRITE(&ctx->hw, base + PCC_BLUE_B_OFF, cfg->b.b);
53
54 DPU_REG_WRITE(&ctx->hw, base, PCC_EN);
55 }
56
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org