tree: https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux.git smccc_v1_2_soc_id head: 115a25be0455e18591cddf3336fd6afaa904ac61 commit: 115a25be0455e18591cddf3336fd6afaa904ac61 [5/5] arm/arm64: smccc: Add ARCH_SOC_ID support config: mips-allyesconfig (attached as .config) compiler: mips-linux-gcc (GCC) 9.3.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 115a25be0455e18591cddf3336fd6afaa904ac61 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day GCC_VERSION=9.3.0 make.cross ARCH=mips If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp(a)intel.com&gt; All error/warnings (new ones prefixed by >>): In file included from drivers/firmware/psci/soc_id.c:6: drivers/firmware/psci/soc_id.c: In function 'smccc_soc_id_support_check': 330 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) | ^~~~~~~~~~~~~~ include/linux/arm-smccc.h:294:16: note: in definition of macro '__arm_smccc_1_1' 294 | asm volatile(inst "\n" \ | ^~~~ 373 | arm_smccc_1_1_hvc(__VA_ARGS__); \ | ^~~~~~~~~~~~~~~~~ 43 | arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, | ^~~~~~~~~~~~~~~~~~~~ 314 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) | ^~~~~~~~~~~~~~ include/linux/arm-smccc.h:294:16: note: in definition of macro '__arm_smccc_1_1' 294 | asm volatile(inst "\n" \ | ^~~~ 376 | arm_smccc_1_1_smc(__VA_ARGS__); \ | ^~~~~~~~~~~~~~~~~ 43 | arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_FEATURES_FUNC_ID, | ^~~~~~~~~~~~~~~~~~~~ drivers/firmware/psci/soc_id.c: In function 'smccc_soc_init': 330 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) | ^~~~~~~~~~~~~~ include/linux/arm-smccc.h:294:16: note: in definition of macro '__arm_smccc_1_1' 294 | asm volatile(inst "\n" \ | ^~~~ 373 | arm_smccc_1_1_hvc(__VA_ARGS__); \ | ^~~~~~~~~~~~~~~~~ drivers/firmware/psci/soc_id.c:89:2: note: in expansion of macro 'arm_smccc_1_1_invoke' 89 | arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res); | ^~~~~~~~~~~~~~~~~~~~ 314 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) | ^~~~~~~~~~~~~~ include/linux/arm-smccc.h:294:16: note: in definition of macro '__arm_smccc_1_1' 294 | asm volatile(inst "\n" \ | ^~~~ 376 | arm_smccc_1_1_smc(__VA_ARGS__); \ | ^~~~~~~~~~~~~~~~~ drivers/firmware/psci/soc_id.c:89:2: note: in expansion of macro 'arm_smccc_1_1_invoke' 89 | arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 0, &res); | ^~~~~~~~~~~~~~~~~~~~ 330 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) | ^~~~~~~~~~~~~~ include/linux/arm-smccc.h:294:16: note: in definition of macro '__arm_smccc_1_1' 294 | asm volatile(inst "\n" \ | ^~~~ 373 | arm_smccc_1_1_hvc(__VA_ARGS__); \ | ^~~~~~~~~~~~~~~~~ drivers/firmware/psci/soc_id.c:97:2: note: in expansion of macro 'arm_smccc_1_1_invoke' 97 | arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res); | ^~~~~~~~~~~~~~~~~~~~ 314 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) | ^~~~~~~~~~~~~~ include/linux/arm-smccc.h:294:16: note: in definition of macro '__arm_smccc_1_1' 294 | asm volatile(inst "\n" \ | ^~~~ 376 | arm_smccc_1_1_smc(__VA_ARGS__); \ | ^~~~~~~~~~~~~~~~~ drivers/firmware/psci/soc_id.c:97:2: note: in expansion of macro 'arm_smccc_1_1_invoke' 97 | arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_SOC_ID, 1, &res); | ^~~~~~~~~~~~~~~~~~~~ vim +/SMCCC_HVC_INST +330 include/linux/arm-smccc.h f2d3b2e8759a58 Marc Zyngier 2018-02-06 285 f2d3b2e8759a58 Marc Zyngier 2018-02-06 286 /* f2d3b2e8759a58 Marc Zyngier 2018-02-06 287 * We have an output list that is not necessarily used, and GCC feels f2d3b2e8759a58 Marc Zyngier 2018-02-06 288 * entitled to optimise the whole sequence away. "volatile" is what f2d3b2e8759a58 Marc Zyngier 2018-02-06 289 * makes it stick. f2d3b2e8759a58 Marc Zyngier 2018-02-06 290 */ f2d3b2e8759a58 Marc Zyngier 2018-02-06 291 #define __arm_smccc_1_1(inst, ...) \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 292 do { \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 293 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 @294 asm volatile(inst "\n" \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 295 __constraints(__count_args(__VA_ARGS__))); \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 296 if (___res) \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 297 *___res = (typeof(*___res)){r0, r1, r2, r3}; \ f2d3b2e8759a58 Marc Zyngier 2018-02-06 298 } while (0) f2d3b2e8759a58 Marc Zyngier 2018-02-06 299 f2d3b2e8759a58 Marc Zyngier 2018-02-06 300 /* f2d3b2e8759a58 Marc Zyngier 2018-02-06 301 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call f2d3b2e8759a58 Marc Zyngier 2018-02-06 302 * f2d3b2e8759a58 Marc Zyngier 2018-02-06 303 * This is a variadic macro taking one to eight source arguments, and f2d3b2e8759a58 Marc Zyngier 2018-02-06 304 * an optional return structure. f2d3b2e8759a58 Marc Zyngier 2018-02-06 305 * f2d3b2e8759a58 Marc Zyngier 2018-02-06 306 * @a0-a7: arguments passed in registers 0 to 7 f2d3b2e8759a58 Marc Zyngier 2018-02-06 307 * @res: result values from registers 0 to 3 f2d3b2e8759a58 Marc Zyngier 2018-02-06 308 * f2d3b2e8759a58 Marc Zyngier 2018-02-06 309 * This macro is used to make SMC calls following SMC Calling Convention v1.1. f2d3b2e8759a58 Marc Zyngier 2018-02-06 310 * The content of the supplied param are copied to registers 0 to 7 prior f2d3b2e8759a58 Marc Zyngier 2018-02-06 311 * to the SMC instruction. The return values are updated with the content f2d3b2e8759a58 Marc Zyngier 2018-02-06 312 * from register 0 to 3 on return from the SMC instruction if not NULL. f2d3b2e8759a58 Marc Zyngier 2018-02-06 313 */ f2d3b2e8759a58 Marc Zyngier 2018-02-06 @314 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) f2d3b2e8759a58 Marc Zyngier 2018-02-06 315 f2d3b2e8759a58 Marc Zyngier 2018-02-06 316 /* f2d3b2e8759a58 Marc Zyngier 2018-02-06 317 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call f2d3b2e8759a58 Marc Zyngier 2018-02-06 318 * f2d3b2e8759a58 Marc Zyngier 2018-02-06 319 * This is a variadic macro taking one to eight source arguments, and f2d3b2e8759a58 Marc Zyngier 2018-02-06 320 * an optional return structure. f2d3b2e8759a58 Marc Zyngier 2018-02-06 321 * f2d3b2e8759a58 Marc Zyngier 2018-02-06 322 * @a0-a7: arguments passed in registers 0 to 7 f2d3b2e8759a58 Marc Zyngier 2018-02-06 323 * @res: result values from registers 0 to 3 f2d3b2e8759a58 Marc Zyngier 2018-02-06 324 * f2d3b2e8759a58 Marc Zyngier 2018-02-06 325 * This macro is used to make HVC calls following SMC Calling Convention v1.1. f2d3b2e8759a58 Marc Zyngier 2018-02-06 326 * The content of the supplied param are copied to registers 0 to 7 prior f2d3b2e8759a58 Marc Zyngier 2018-02-06 327 * to the HVC instruction. The return values are updated with the content f2d3b2e8759a58 Marc Zyngier 2018-02-06 328 * from register 0 to 3 on return from the HVC instruction if not NULL. f2d3b2e8759a58 Marc Zyngier 2018-02-06 329 */ f2d3b2e8759a58 Marc Zyngier 2018-02-06 @330 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) f2d3b2e8759a58 Marc Zyngier 2018-02-06 331 1a2eead6cb33b0 Sudeep Holla 2020-04-17 332 /* 1a2eead6cb33b0 Sudeep Holla 2020-04-17 333 * Return codes defined in ARM DEN 0070A 1a2eead6cb33b0 Sudeep Holla 2020-04-17 334 * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028C 1a2eead6cb33b0 Sudeep Holla 2020-04-17 335 */ eff0e9e1078ea7 Marc Zyngier 2018-05-29 336 #define SMCCC_RET_SUCCESS 0 eff0e9e1078ea7 Marc Zyngier 2018-05-29 337 #define SMCCC_RET_NOT_SUPPORTED -1 eff0e9e1078ea7 Marc Zyngier 2018-05-29 338 #define SMCCC_RET_NOT_REQUIRED -2 1a2eead6cb33b0 Sudeep Holla 2020-04-17 339 #define SMCCC_RET_INVALID_PARAMETER -3 eff0e9e1078ea7 Marc Zyngier 2018-05-29 340 541625ac47ce9d Steven Price 2019-10-21 341 /* 541625ac47ce9d Steven Price 2019-10-21 342 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED. 541625ac47ce9d Steven Price 2019-10-21 343 * Used when the SMCCC conduit is not defined. The empty asm statement 541625ac47ce9d Steven Price 2019-10-21 344 * avoids compiler warnings about unused variables. 541625ac47ce9d Steven Price 2019-10-21 345 */ 541625ac47ce9d Steven Price 2019-10-21 346 #define __fail_smccc_1_1(...) \ 541625ac47ce9d Steven Price 2019-10-21 347 do { \ 541625ac47ce9d Steven Price 2019-10-21 348 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ 541625ac47ce9d Steven Price 2019-10-21 349 asm ("" __constraints(__count_args(__VA_ARGS__))); \ 541625ac47ce9d Steven Price 2019-10-21 350 if (___res) \ 541625ac47ce9d Steven Price 2019-10-21 351 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \ 541625ac47ce9d Steven Price 2019-10-21 352 } while (0) 541625ac47ce9d Steven Price 2019-10-21 353 541625ac47ce9d Steven Price 2019-10-21 354 /* 541625ac47ce9d Steven Price 2019-10-21 355 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call 541625ac47ce9d Steven Price 2019-10-21 356 * 541625ac47ce9d Steven Price 2019-10-21 357 * This is a variadic macro taking one to eight source arguments, and 541625ac47ce9d Steven Price 2019-10-21 358 * an optional return structure. 541625ac47ce9d Steven Price 2019-10-21 359 * 541625ac47ce9d Steven Price 2019-10-21 360 * @a0-a7: arguments passed in registers 0 to 7 541625ac47ce9d Steven Price 2019-10-21 361 * @res: result values from registers 0 to 3 541625ac47ce9d Steven Price 2019-10-21 362 * 541625ac47ce9d Steven Price 2019-10-21 363 * This macro will make either an HVC call or an SMC call depending on the 541625ac47ce9d Steven Price 2019-10-21 364 * current SMCCC conduit. If no valid conduit is available then -1 541625ac47ce9d Steven Price 2019-10-21 365 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied). 541625ac47ce9d Steven Price 2019-10-21 366 * 541625ac47ce9d Steven Price 2019-10-21 367 * The return value also provides the conduit that was used. 541625ac47ce9d Steven Price 2019-10-21 368 */ 541625ac47ce9d Steven Price 2019-10-21 369 #define arm_smccc_1_1_invoke(...) ({ \ 541625ac47ce9d Steven Price 2019-10-21 370 int method = arm_smccc_1_1_get_conduit(); \ 541625ac47ce9d Steven Price 2019-10-21 371 switch (method) { \ 541625ac47ce9d Steven Price 2019-10-21 372 case SMCCC_CONDUIT_HVC: \ 541625ac47ce9d Steven Price 2019-10-21 @373 arm_smccc_1_1_hvc(__VA_ARGS__); \ 541625ac47ce9d Steven Price 2019-10-21 374 break; \ 541625ac47ce9d Steven Price 2019-10-21 375 case SMCCC_CONDUIT_SMC: \ 541625ac47ce9d Steven Price 2019-10-21 @376 arm_smccc_1_1_smc(__VA_ARGS__); \ 541625ac47ce9d Steven Price 2019-10-21 377 break; \ 541625ac47ce9d Steven Price 2019-10-21 378 default: \ 541625ac47ce9d Steven Price 2019-10-21 379 __fail_smccc_1_1(__VA_ARGS__); \ 541625ac47ce9d Steven Price 2019-10-21 380 method = SMCCC_CONDUIT_NONE; \ 541625ac47ce9d Steven Price 2019-10-21 381 break; \ 541625ac47ce9d Steven Price 2019-10-21 382 } \ 541625ac47ce9d Steven Price 2019-10-21 383 method; \ 541625ac47ce9d Steven Price 2019-10-21 384 }) 541625ac47ce9d Steven Price 2019-10-21 385 :::::: The code at line 330 was first introduced by commit :::::: f2d3b2e8759a5833df6f022e42df2d581e6d843c arm/arm64: smccc: Implement SMCCC v1.1 inline primitive :::::: TO: Marc Zyngier <marc.zyngier(a)arm.com&gt; :::::: CC: Catalin Marinas <catalin.marinas(a)arm.com&gt; --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org