tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 66f4beaa6c1d28161f534471484b2daa2de1dce0 commit: e39397d1fd6851bef4dfb63a631b8e15d1f43329 x86/hyperv: implement an MSI domain for root partition date: 9 months ago config: i386-randconfig-s002-20211109 (attached as .config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 reproduce: # apt-get install sparse # sparse version: v0.6.4-dirty # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit... git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout e39397d1fd6851bef4dfb63a631b8e15d1f43329 # save the attached .config to linux build tree make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=i386 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; sparse warnings: (new ones prefixed by >>) arch/x86/hyperv/irqdomain.c:27:18: sparse: expected void const [noderef] __percpu *__vpp_verify arch/x86/hyperv/irqdomain.c:27:18: sparse: got void [noderef] __percpu ** arch/x86/hyperv/irqdomain.c:27:15: sparse: expected struct hv_input_map_device_interrupt *input arch/x86/hyperv/irqdomain.c:27:15: sparse: got void [noderef] __percpu * arch/x86/hyperv/irqdomain.c:28:19: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void const [noderef] __percpu *__vpp_verify @@ got void [noderef] __percpu ** @@ arch/x86/hyperv/irqdomain.c:28:19: sparse: expected void const [noderef] __percpu *__vpp_verify arch/x86/hyperv/irqdomain.c:28:19: sparse: got void [noderef] __percpu ** arch/x86/hyperv/irqdomain.c:28:16: sparse: expected struct hv_output_map_device_interrupt *output arch/x86/hyperv/irqdomain.c:28:16: sparse: got void [noderef] __percpu * arch/x86/hyperv/irqdomain.c:80:18: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected void const [noderef] __percpu *__vpp_verify @@ got void [noderef] __percpu ** @@ arch/x86/hyperv/irqdomain.c:80:18: sparse: expected void const [noderef] __percpu *__vpp_verify arch/x86/hyperv/irqdomain.c:80:18: sparse: got void [noderef] __percpu ** arch/x86/hyperv/irqdomain.c:80:15: sparse: expected struct hv_input_unmap_device_interrupt *input arch/x86/hyperv/irqdomain.c:80:15: sparse: got void [noderef] __percpu * vim +27 arch/x86/hyperv/irqdomain.c 14 15 static int hv_map_interrupt(union hv_device_id device_id, bool level, 16 int cpu, int vector, struct hv_interrupt_entry *entry) 17 { 18 struct hv_input_map_device_interrupt *input; 19 struct hv_output_map_device_interrupt *output; 20 struct hv_device_interrupt_descriptor *intr_desc; 21 unsigned long flags; 22 u64 status; 23 int nr_bank, var_size; 24 25 local_irq_save(flags); 26 29 30 intr_desc = &input->interrupt_descriptor; 31 memset(input, 0, sizeof(*input)); 32 input->partition_id = hv_current_partition_id; 33 input->device_id = device_id.as_uint64; 34 intr_desc->interrupt_type = HV_X64_INTERRUPT_TYPE_FIXED; 35 intr_desc->vector_count = 1; 36 intr_desc->target.vector = vector; 37 38 if (level) 39 intr_desc->trigger_mode = HV_INTERRUPT_TRIGGER_MODE_LEVEL; 40 else 41 intr_desc->trigger_mode = HV_INTERRUPT_TRIGGER_MODE_EDGE; 42 43 intr_desc->target.vp_set.valid_bank_mask = 0; 44 intr_desc->target.vp_set.format = HV_GENERIC_SET_SPARSE_4K; 45 nr_bank = cpumask_to_vpset(&(intr_desc->target.vp_set), cpumask_of(cpu)); 46 if (nr_bank < 0) { 47 local_irq_restore(flags); 48 pr_err("%s: unable to generate VP set\n", __func__); 49 return EINVAL; 50 } 51 intr_desc->target.flags = HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET; 52 53 /* 54 * var-sized hypercall, var-size starts after vp_mask (thus 55 * vp_set.format does not count, but vp_set.valid_bank_mask 56 * does). 57 */ 58 var_size = nr_bank + 1; 59 60 status = hv_do_rep_hypercall(HVCALL_MAP_DEVICE_INTERRUPT, 0, var_size, 61 input, output); 62 *entry = output->interrupt_entry; 63 64 local_irq_restore(flags); 65 66 if ((status & HV_HYPERCALL_RESULT_MASK) != HV_STATUS_SUCCESS) 67 pr_err("%s: hypercall failed, status %lld\n", __func__, status); 68 69 return status & HV_HYPERCALL_RESULT_MASK; 70 } 71 72 static int hv_unmap_interrupt(u64 id, struct hv_interrupt_entry *old_entry) 73 { 74 unsigned long flags; 75 struct hv_input_unmap_device_interrupt *input; 76 struct hv_interrupt_entry *intr_entry; 77 u64 status; 78 79 local_irq_save(flags); 81 82 memset(input, 0, sizeof(*input)); 83 intr_entry = &input->interrupt_entry; 84 input->partition_id = hv_current_partition_id; 85 input->device_id = id; 86 *intr_entry = *old_entry; 87 88 status = hv_do_hypercall(HVCALL_UNMAP_DEVICE_INTERRUPT, input, NULL); 89 local_irq_restore(flags); 90 91 return status & HV_HYPERCALL_RESULT_MASK; 92 } 93 94 #ifdef CONFIG_PCI_MSI 95 struct rid_data { 96 struct pci_dev *bridge; 97 u32 rid; 98 }; 99 100 static int get_rid_cb(struct pci_dev *pdev, u16 alias, void *data) 101 { 102 struct rid_data *rd = data; 103 u8 bus = PCI_BUS_NUM(rd->rid); 104 105 if (pdev->bus->number != bus || PCI_BUS_NUM(alias) != bus) { 106 rd->bridge = pdev; 107 rd->rid = alias; 108 } 109 110 return 0; 111 } 112 113 static union hv_device_id hv_build_pci_dev_id(struct pci_dev *dev) 114 { 115 union hv_device_id dev_id; 116 struct rid_data data = { 117 .bridge = NULL, 118 .rid = PCI_DEVID(dev->bus->number, dev->devfn) 119 }; 120 121 pci_for_each_dma_alias(dev, get_rid_cb, &data); 122 123 dev_id.as_uint64 = 0; 125 dev_id.pci.segment = pci_domain_nr(dev->bus); 126 127 dev_id.pci.bdf.bus = PCI_BUS_NUM(data.rid); 128 dev_id.pci.bdf.device = PCI_SLOT(data.rid); 129 dev_id.pci.bdf.function = PCI_FUNC(data.rid); 130 dev_id.pci.source_shadow = HV_SOURCE_SHADOW_NONE; 131 132 if (data.bridge) { 133 int pos; 134 135 /* 136 * Microsoft Hypervisor requires a bus range when the bridge is 137 * running in PCI-X mode. 138 * 139 * To distinguish conventional vs PCI-X bridge, we can check 140 * the bridge's PCI-X Secondary Status Register, Secondary Bus 141 * Mode and Frequency bits. See PCI Express to PCI/PCI-X Bridge 142 * Specification Revision 1.0 5.2.2.1.3. 143 * 144 * Value zero means it is in conventional mode, otherwise it is 145 * in PCI-X mode. 146 */ 147 148 pos = pci_find_capability(data.bridge, PCI_CAP_ID_PCIX); 149 if (pos) { 150 u16 status; 151 152 pci_read_config_word(data.bridge, pos + 153 PCI_X_BRIDGE_SSTATUS, &status); 154 155 if (status & PCI_X_SSTATUS_FREQ) { 156 /* Non-zero, PCI-X mode */ 157 u8 sec_bus, sub_bus; 158 159 dev_id.pci.source_shadow = HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE; 160 161 pci_read_config_byte(data.bridge, PCI_SECONDARY_BUS, &sec_bus); 162 dev_id.pci.shadow_bus_range.secondary_bus = sec_bus; 163 pci_read_config_byte(data.bridge, PCI_SUBORDINATE_BUS, &sub_bus); 164 dev_id.pci.shadow_bus_range.subordinate_bus = sub_bus; 165 } 166 } 167 } 168 169 return dev_id; 170 } 171 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org