Hi Jon, Thank you for the patch! Yet something to improve: [auto build test ERROR on pci/next] [also build test ERROR on v5.14-rc7 next-20210823] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Jon-Derrick/PCI-pciehp-Quirk-to-... base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next config: arm-randconfig-r021-20210822 (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/64e85d3cc3a64aea26c4b89c9661ee4ee... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Jon-Derrick/PCI-pciehp-Quirk-to-ignore-spurious-DLLSC-when-off/20210824-025108 git checkout 64e85d3cc3a64aea26c4b89c9661ee4eef99ac5e # save the attached .config to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arm SHELL=/bin/bash drivers/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): drivers/pci/quirks.c: In function 'shared_pcc_and_link_slot': 5778 | parent->shared_pcc_and_link_slot = 1; | ^~ vim +5778 drivers/pci/quirks.c 5745 5746 static void apex_pci_fixup_class(struct pci_dev *pdev) 5747 { 5748 pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class; 5749 } 5750 DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a, 5751 PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class); 5752 5753 /* 5754 * This is a special card that sits in a x8 pciehp slot but is bifurcated as 5755 * a x4x4 and manifests as two slots with respect to PCIe hot plug register 5756 * states. However, the hotplug controller treats these slots as a single x8 5757 * slot for link and power. Either one of the two slots can be powered down 5758 * separately but real power and link will be active till the last of the two 5759 * slots is powered down. When the last of the two x4 slots is turned off, 5760 * power and link will be turned off for the x8 slot by the HP controller. 5761 * This configuration causes some interesting behavior in bringup sequence 5762 * 5763 * When the second slot is powered off to remove the card, this will cause 5764 * the link to go down for both x4 slots. So, the x4 that is already powered 5765 * down earlier will see a DLLSC event and attempt to bring itself up (card 5766 * present, link change event, link state is down). Special handling is 5767 * required in pciehp_handle_presence_or_link_change to prevent this unintended 5768 * bring up 5769 * 5770 */ 5771 static void shared_pcc_and_link_slot(struct pci_dev *pdev) 5772 { 5773 struct pci_dev *parent = pci_upstream_bridge(pdev); 5774 5775 if (pdev->subsystem_vendor == 0x108e && 5776 pdev->subsystem_device == 0x487d) { 5777 if (parent) --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org